DE3485201D1 - Gleichzeitige plazierung und verbindung von vlsi-chips. - Google Patents

Gleichzeitige plazierung und verbindung von vlsi-chips.

Info

Publication number
DE3485201D1
DE3485201D1 DE8484107439T DE3485201T DE3485201D1 DE 3485201 D1 DE3485201 D1 DE 3485201D1 DE 8484107439 T DE8484107439 T DE 8484107439T DE 3485201 T DE3485201 T DE 3485201T DE 3485201 D1 DE3485201 D1 DE 3485201D1
Authority
DE
Germany
Prior art keywords
connection
vlsi chips
simultaneous placement
simultaneous
placement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484107439T
Other languages
English (en)
Inventor
Michael Burstein
Se June Hong
Richard Neil Pelavin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3485201D1 publication Critical patent/DE3485201D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
DE8484107439T 1983-08-12 1984-06-28 Gleichzeitige plazierung und verbindung von vlsi-chips. Expired - Fee Related DE3485201D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/522,900 US4593363A (en) 1983-08-12 1983-08-12 Simultaneous placement and wiring for VLSI chips

Publications (1)

Publication Number Publication Date
DE3485201D1 true DE3485201D1 (de) 1991-11-28

Family

ID=24082842

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484107439T Expired - Fee Related DE3485201D1 (de) 1983-08-12 1984-06-28 Gleichzeitige plazierung und verbindung von vlsi-chips.

Country Status (4)

Country Link
US (1) US4593363A (de)
EP (1) EP0133466B1 (de)
JP (1) JPS6047444A (de)
DE (1) DE3485201D1 (de)

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Also Published As

Publication number Publication date
EP0133466A3 (en) 1987-03-04
JPS6047444A (ja) 1985-03-14
US4593363A (en) 1986-06-03
EP0133466B1 (de) 1991-10-23
JPH0473622B2 (de) 1992-11-24
EP0133466A2 (de) 1985-02-27

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