DE3584102D1 - Integrierte halbleiterschaltungsvorrichtung. - Google Patents

Integrierte halbleiterschaltungsvorrichtung.

Info

Publication number
DE3584102D1
DE3584102D1 DE8585102640T DE3584102T DE3584102D1 DE 3584102 D1 DE3584102 D1 DE 3584102D1 DE 8585102640 T DE8585102640 T DE 8585102640T DE 3584102 T DE3584102 T DE 3584102T DE 3584102 D1 DE3584102 D1 DE 3584102D1
Authority
DE
Germany
Prior art keywords
circuit device
semiconductor circuit
integrated semiconductor
integrated
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585102640T
Other languages
English (en)
Inventor
Akihiro C O Patent Divis Sueda
Hiroaki C O Patent Di Murakami
Hitoshi C O Patent Divi Kondoh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP4460284A external-priority patent/JPS60189240A/ja
Priority claimed from JP59053806A external-priority patent/JPS60196966A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3584102D1 publication Critical patent/DE3584102D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE8585102640T 1984-03-08 1985-03-08 Integrierte halbleiterschaltungsvorrichtung. Expired - Lifetime DE3584102D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4460284A JPS60189240A (ja) 1984-03-08 1984-03-08 半導体集積回路装置
JP59053806A JPS60196966A (ja) 1984-03-21 1984-03-21 相補型半導体装置

Publications (1)

Publication Number Publication Date
DE3584102D1 true DE3584102D1 (de) 1991-10-24

Family

ID=26384550

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585102640T Expired - Lifetime DE3584102D1 (de) 1984-03-08 1985-03-08 Integrierte halbleiterschaltungsvorrichtung.

Country Status (3)

Country Link
US (1) US4974049A (de)
EP (1) EP0154346B1 (de)
DE (1) DE3584102D1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0693480B2 (ja) * 1985-03-29 1994-11-16 株式会社東芝 半導体集積回路装置
JPH0254576A (ja) * 1988-08-18 1990-02-23 Mitsubishi Electric Corp ゲートアレイ
JP2788783B2 (ja) * 1990-08-29 1998-08-20 日本電気アイシーマイコンシステム株式会社 半導体集積回路
JP2938955B2 (ja) * 1990-10-02 1999-08-25 株式会社日立製作所 半導体集積装置の配線方法
JP3052519B2 (ja) * 1992-01-14 2000-06-12 日本電気株式会社 集積回路の電源配線設計方法
US5489538A (en) * 1992-08-21 1996-02-06 Lsi Logic Corporation Method of die burn-in
JPH08330434A (ja) * 1994-12-09 1996-12-13 Mitsubishi Electric Corp 半導体集積回路装置およびその配置配線方法並びにレイアウト方法
JPH1140736A (ja) * 1997-07-16 1999-02-12 Nec Ic Microcomput Syst Ltd 半導体装置
JP2000067102A (ja) * 1998-08-18 2000-03-03 Hitachi Ltd 半導体集積回路の階層配線方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2445368A1 (de) * 1974-09-23 1976-04-01 Siemens Ag Verfahren zur herstellung fuer maskenvorlagen fuer integrierte halbleiterschaltungen
CA1102009A (en) * 1977-09-06 1981-05-26 Algirdas J. Gruodis Integrated circuit layout utilizing separated active circuit and wiring regions
US4249193A (en) * 1978-05-25 1981-02-03 International Business Machines Corporation LSI Semiconductor device and fabrication thereof
EP0020116B1 (de) * 1979-05-24 1984-03-14 Fujitsu Limited Halbleitervorrichtung vom "MASTERSLICE"-Typ und Herstellungsverfahren
FR2495834A1 (fr) * 1980-12-05 1982-06-11 Cii Honeywell Bull Dispositif a circuits integres de haute densite
JPS5871652A (ja) * 1981-10-26 1983-04-28 Hitachi Ltd 半導体記憶装置
JPH0644593B2 (ja) * 1984-11-09 1994-06-08 株式会社東芝 半導体集積回路装置

Also Published As

Publication number Publication date
EP0154346A2 (de) 1985-09-11
EP0154346B1 (de) 1991-09-18
EP0154346A3 (en) 1986-10-08
US4974049A (en) 1990-11-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee