DE3751235T2 - Vielfachknotenrechner mit rekonfigurierbarer Pipelinestruktur. - Google Patents

Vielfachknotenrechner mit rekonfigurierbarer Pipelinestruktur.

Info

Publication number
DE3751235T2
DE3751235T2 DE3751235T DE3751235T DE3751235T2 DE 3751235 T2 DE3751235 T2 DE 3751235T2 DE 3751235 T DE3751235 T DE 3751235T DE 3751235 T DE3751235 T DE 3751235T DE 3751235 T2 DE3751235 T2 DE 3751235T2
Authority
DE
Germany
Prior art keywords
pipeline structure
node computer
reconfigurable pipeline
reconfigurable
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3751235T
Other languages
English (en)
Other versions
DE3751235D1 (de
Inventor
Daniel Mark Nosenchuck
Michael Geist Littman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Princeton University
Original Assignee
Princeton University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Princeton University filed Critical Princeton University
Application granted granted Critical
Publication of DE3751235D1 publication Critical patent/DE3751235D1/de
Publication of DE3751235T2 publication Critical patent/DE3751235T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8092—Array of vector units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
DE3751235T 1986-11-14 1987-11-13 Vielfachknotenrechner mit rekonfigurierbarer Pipelinestruktur. Expired - Fee Related DE3751235T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/931,549 US4811214A (en) 1986-11-14 1986-11-14 Multinode reconfigurable pipeline computer

Publications (2)

Publication Number Publication Date
DE3751235D1 DE3751235D1 (de) 1995-05-18
DE3751235T2 true DE3751235T2 (de) 1995-08-24

Family

ID=25460953

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3751235T Expired - Fee Related DE3751235T2 (de) 1986-11-14 1987-11-13 Vielfachknotenrechner mit rekonfigurierbarer Pipelinestruktur.

Country Status (9)

Country Link
US (1) US4811214A (de)
EP (1) EP0268435B1 (de)
JP (1) JPS63147258A (de)
AU (1) AU599428B2 (de)
CA (1) CA1288170C (de)
DE (1) DE3751235T2 (de)
DK (1) DK595887A (de)
ES (1) ES2070825T3 (de)
NO (1) NO874742L (de)

Families Citing this family (176)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5093920A (en) * 1987-06-25 1992-03-03 At&T Bell Laboratories Programmable processing elements interconnected by a communication network including field operation unit for performing field operations
US5008882A (en) * 1987-08-17 1991-04-16 California Institute Of Technology Method and apparatus for eliminating unsuccessful tries in a search tree
US5148547A (en) * 1988-04-08 1992-09-15 Thinking Machines Corporation Method and apparatus for interfacing bit-serial parallel processors to a coprocessor
US5005120A (en) * 1988-07-29 1991-04-02 Lsi Logic Corporation Compensating time delay in filtering signals of multi-dimensional reconvigurable array processors
US5452231A (en) * 1988-10-05 1995-09-19 Quickturn Design Systems, Inc. Hierarchically connected reconfigurable logic assembly
US5241635A (en) * 1988-11-18 1993-08-31 Massachusetts Institute Of Technology Tagged token data processing system with operand matching in activation frames
US5329470A (en) * 1988-12-02 1994-07-12 Quickturn Systems, Inc. Reconfigurable hardware emulation system
US5109353A (en) * 1988-12-02 1992-04-28 Quickturn Systems, Incorporated Apparatus for emulation of electronic hardware system
US5280620A (en) * 1988-12-16 1994-01-18 U.S. Philips Corporation Coupling network for a data processor, including a series connection of a cross-bar switch and an array of silos
NL8803079A (nl) * 1988-12-16 1990-07-16 Philips Nv Koppelnetwerk voor een dataprocessor, voorzien van een serie-schakeling met ten minste een herconfigureerbare schakelmatrix en ten minste een batterij silo's alsmede dataprocessor voorzien van zo een koppelnetwerk.
US5099421A (en) * 1988-12-30 1992-03-24 International Business Machine Corporation Variable length pipe operations sequencing
US5155820A (en) * 1989-02-21 1992-10-13 Gibson Glenn A Instruction format with designations for operand lengths of byte, half word, word, or double word encoded in address bits
US5353243A (en) * 1989-05-31 1994-10-04 Synopsys Inc. Hardware modeling system and method of use
US5369593A (en) 1989-05-31 1994-11-29 Synopsys Inc. System for and method of connecting a hardware modeling element to a hardware modeling system
US5345578A (en) * 1989-06-30 1994-09-06 Digital Equipment Corporation Competitive snoopy caching for large-scale multiprocessors
EP0420339A3 (en) * 1989-09-29 1992-06-03 N.V. Philips' Gloeilampenfabrieken Multi-plane random access memory system
US5450557A (en) * 1989-11-07 1995-09-12 Loral Aerospace Corp. Single-chip self-configurable parallel processor
JPH05506526A (ja) * 1990-01-05 1993-09-22 マスパー・コンピューター・コーポレイション クワッドクロスバー及びハイパーバーパーソナリティを備えるラウタチップ
US5133073A (en) * 1990-05-29 1992-07-21 Wavetracer, Inc. Processor array of N-dimensions which is physically reconfigurable into N-1
US5193202A (en) * 1990-05-29 1993-03-09 Wavetracer, Inc. Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor
US5157785A (en) * 1990-05-29 1992-10-20 Wavetracer, Inc. Process cell for an n-dimensional processor array having a single input element with 2n data inputs, memory, and full function arithmetic logic unit
US5313645A (en) * 1991-05-13 1994-05-17 International Business Machines Corporation Method for interconnecting and system of interconnected processing elements by controlling network density
GB9027186D0 (en) * 1990-12-14 1991-02-06 Int Computers Ltd Data processing network
GB9027663D0 (en) * 1990-12-20 1991-02-13 Sandoz Ltd Light-stabilizing compositions
WO1992022029A1 (en) * 1991-05-24 1992-12-10 British Technology Group Usa, Inc. Optimizing compiler for computers
CN1042677C (zh) * 1991-10-07 1999-03-24 中国人民解放军国防大学 并行计算机系统及其应用
GB2263565B (en) * 1992-01-23 1995-08-30 Intel Corp Microprocessor with apparatus for parallel execution of instructions
US6067417A (en) * 1992-06-30 2000-05-23 Discovision Associates Picture start token
DE69229338T2 (de) * 1992-06-30 1999-12-16 Discovision Ass Datenpipelinesystem
US6330665B1 (en) 1992-06-30 2001-12-11 Discovision Associates Video parser
US6047112A (en) * 1992-06-30 2000-04-04 Discovision Associates Technique for initiating processing of a data stream of encoded video information
US7095783B1 (en) 1992-06-30 2006-08-22 Discovision Associates Multistandard video decoder and decompression system for processing encoded bit streams including start codes and methods relating thereto
US6263422B1 (en) 1992-06-30 2001-07-17 Discovision Associates Pipeline processing machine with interactive stages operable in response to tokens and system and methods relating thereto
US5809270A (en) * 1992-06-30 1998-09-15 Discovision Associates Inverse quantizer
US5768561A (en) * 1992-06-30 1998-06-16 Discovision Associates Tokens-based adaptive video processing arrangement
US6079009A (en) * 1992-06-30 2000-06-20 Discovision Associates Coding standard token in a system compromising a plurality of pipeline stages
US5828907A (en) 1992-06-30 1998-10-27 Discovision Associates Token-based adaptive video processing arrangement
US5842033A (en) * 1992-06-30 1998-11-24 Discovision Associates Padding apparatus for passing an arbitrary number of bits through a buffer in a pipeline system
US6112017A (en) * 1992-06-30 2000-08-29 Discovision Associates Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus
US5315701A (en) * 1992-08-07 1994-05-24 International Business Machines Corporation Method and system for processing graphics data streams utilizing scalable processing nodes
WO1994017488A1 (en) * 1993-01-22 1994-08-04 University Corporation For Atmospheric Research Multipipeline multiprocessor system
JPH06325005A (ja) * 1993-05-14 1994-11-25 Fujitsu Ltd 再構成可能なトーラス・ネットワーク方式
JPH0713945A (ja) * 1993-06-16 1995-01-17 Nippon Sheet Glass Co Ltd 演算処理部および制御・記憶部分離型マルチプロセッサ ・システムのバス構造
US5805914A (en) * 1993-06-24 1998-09-08 Discovision Associates Data pipeline system and data encoding method
US5861894A (en) * 1993-06-24 1999-01-19 Discovision Associates Buffer manager
US5680583A (en) * 1994-02-16 1997-10-21 Arkos Design, Inc. Method and apparatus for a trace buffer in an emulation system
JP3308770B2 (ja) * 1994-07-22 2002-07-29 三菱電機株式会社 情報処理装置および情報処理装置における計算方法
US5699536A (en) * 1995-04-13 1997-12-16 International Business Machines Corporation Computer processing system employing dynamic instruction formatting
US5794062A (en) * 1995-04-17 1998-08-11 Ricoh Company Ltd. System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization
US5943242A (en) 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
US7266725B2 (en) * 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
WO2002029600A2 (de) 2000-10-06 2002-04-11 Pact Informationstechnologie Gmbh Zellenarordnung mit segmentierterwischenzellstruktur
US5841967A (en) * 1996-10-17 1998-11-24 Quickturn Design Systems, Inc. Method and apparatus for design verification using emulation and simulation
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) * 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
US6338106B1 (en) 1996-12-20 2002-01-08 Pact Gmbh I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
DE19654593A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
DE19654846A1 (de) * 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
ATE243390T1 (de) * 1996-12-27 2003-07-15 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen umladen von datenflussprozessoren (dfps) sowie bausteinen mit zwei- oder mehrdimensionalen programmierbaren zellstrukturen (fpgas, dpgas, o.dgl.)
DE19704044A1 (de) * 1997-02-04 1998-08-13 Pact Inf Tech Gmbh Verfahren zur automatischen Adressgenerierung von Bausteinen innerhalb Clustern aus einer Vielzahl dieser Bausteine
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704728A1 (de) 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
DE19704742A1 (de) * 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
US6421251B1 (en) 1997-05-02 2002-07-16 Axis Systems Inc Array board interconnect system and method
US6389379B1 (en) 1997-05-02 2002-05-14 Axis Systems, Inc. Converification system and method
US6134516A (en) * 1997-05-02 2000-10-17 Axis Systems, Inc. Simulation server system and method
US6009256A (en) * 1997-05-02 1999-12-28 Axis Systems, Inc. Simulation/emulation system and method
US6321366B1 (en) 1997-05-02 2001-11-20 Axis Systems, Inc. Timing-insensitive glitch-free logic system and method
US6026230A (en) * 1997-05-02 2000-02-15 Axis Systems, Inc. Memory simulation system and method
US5960191A (en) 1997-05-30 1999-09-28 Quickturn Design Systems, Inc. Emulation system with time-multiplexed interconnect
US5970240A (en) * 1997-06-25 1999-10-19 Quickturn Design Systems, Inc. Method and apparatus for configurable memory emulation
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
US6101181A (en) * 1997-11-17 2000-08-08 Cray Research Inc. Virtual channel assignment in large torus systems
US6085303A (en) * 1997-11-17 2000-07-04 Cray Research, Inc. Seralized race-free virtual barrier network
US5970232A (en) * 1997-11-17 1999-10-19 Cray Research, Inc. Router table lookup mechanism
US6230252B1 (en) * 1997-11-17 2001-05-08 Silicon Graphics, Inc. Hybrid hypercube/torus architecture
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
DE19807872A1 (de) 1998-02-25 1999-08-26 Pact Inf Tech Gmbh Verfahren zur Verwaltung von Konfigurationsdaten in Datenflußprozessoren sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstruktur (FPGAs, DPGAs, o. dgl.
US6205537B1 (en) * 1998-07-16 2001-03-20 University Of Rochester Mechanism for dynamically adapting the complexity of a microprocessor
US6216174B1 (en) 1998-09-29 2001-04-10 Silicon Graphics, Inc. System and method for fast barrier synchronization
US8230411B1 (en) * 1999-06-10 2012-07-24 Martin Vorbach Method for interleaving a program over a plurality of cells
US6674720B1 (en) 1999-09-29 2004-01-06 Silicon Graphics, Inc. Age-based network arbitration system and method
US6751698B1 (en) * 1999-09-29 2004-06-15 Silicon Graphics, Inc. Multiprocessor node controller circuit and method
WO2005048134A2 (en) 2002-05-21 2005-05-26 Washington University Intelligent data storage and processing using fpga devices
EP2226732A3 (de) 2000-06-13 2016-04-06 PACT XPP Technologies AG Cachehierarchie für einen Multicore-Prozessor
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US20040015899A1 (en) * 2000-10-06 2004-01-22 Frank May Method for processing data
US6990555B2 (en) * 2001-01-09 2006-01-24 Pact Xpp Technologies Ag Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
US20090300262A1 (en) * 2001-03-05 2009-12-03 Martin Vorbach Methods and devices for treating and/or processing data
US7210129B2 (en) 2001-08-16 2007-04-24 Pact Xpp Technologies Ag Method for translating programs for reconfigurable architectures
US7844796B2 (en) * 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US9037807B2 (en) * 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US20090210653A1 (en) * 2001-03-05 2009-08-20 Pact Xpp Technologies Ag Method and device for treating and processing data
US7581076B2 (en) 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US7653710B2 (en) 2002-06-25 2010-01-26 Qst Holdings, Llc. Hardware task manager
US7489779B2 (en) 2001-03-22 2009-02-10 Qstholdings, Llc Hardware implementation of the secure hash standard
US6836839B2 (en) 2001-03-22 2004-12-28 Quicksilver Technology, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US7752419B1 (en) 2001-03-22 2010-07-06 Qst Holdings, Llc Method and system for managing hardware resources to implement system functions using an adaptive computing architecture
US7962716B2 (en) 2001-03-22 2011-06-14 Qst Holdings, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US7249242B2 (en) 2002-10-28 2007-07-24 Nvidia Corporation Input pipeline registers for a node in an adaptive computing engine
US7400668B2 (en) * 2001-03-22 2008-07-15 Qst Holdings, Llc Method and system for implementing a system acquisition function for use with a communication device
US6577678B2 (en) * 2001-05-08 2003-06-10 Quicksilver Technology Method and system for reconfigurable channel coding
EP1402382B1 (de) * 2001-06-20 2010-08-18 Richter, Thomas Verfahren zur bearbeitung von daten
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) * 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7376811B2 (en) * 2001-11-06 2008-05-20 Netxen, Inc. Method and apparatus for performing computations and operations on data using data steering
US7046635B2 (en) 2001-11-28 2006-05-16 Quicksilver Technology, Inc. System for authorizing functionality in adaptable hardware devices
US6986021B2 (en) 2001-11-30 2006-01-10 Quick Silver Technology, Inc. Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements
US8412915B2 (en) * 2001-11-30 2013-04-02 Altera Corporation Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements
US7602740B2 (en) * 2001-12-10 2009-10-13 Qst Holdings, Inc. System for adapting device standards after manufacture
US7215701B2 (en) 2001-12-12 2007-05-08 Sharad Sambhwani Low I/O bandwidth method and system for implementing detection and identification of scrambling codes
US7088825B2 (en) * 2001-12-12 2006-08-08 Quicksilver Technology, Inc. Low I/O bandwidth method and system for implementing detection and identification of scrambling codes
US7231508B2 (en) * 2001-12-13 2007-06-12 Quicksilver Technologies Configurable finite state machine for operation of microinstruction providing execution enable control value
US7577822B2 (en) * 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
US7403981B2 (en) * 2002-01-04 2008-07-22 Quicksilver Technology, Inc. Apparatus and method for adaptive multimedia reception and transmission in communication environments
US20050132344A1 (en) * 2002-01-18 2005-06-16 Martin Vorbach Method of compilation
AU2003208266A1 (en) * 2002-01-19 2003-07-30 Pact Xpp Technologies Ag Reconfigurable processor
WO2003071432A2 (de) 2002-02-18 2003-08-28 Pact Xpp Technologies Ag Bussysteme und rekonfigurationsverfahren
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
WO2003081454A2 (de) * 2002-03-21 2003-10-02 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
US7493375B2 (en) 2002-04-29 2009-02-17 Qst Holding, Llc Storage and delivery of device features
US7328414B1 (en) * 2003-05-13 2008-02-05 Qst Holdings, Llc Method and system for creating and programming an adaptive computing engine
US7660984B1 (en) 2003-05-13 2010-02-09 Quicksilver Technology Method and system for achieving individualized protected space in an operating system
US7471643B2 (en) * 2002-07-01 2008-12-30 Panasonic Corporation Loosely-biased heterogeneous reconfigurable arrays
US7461234B2 (en) * 2002-07-01 2008-12-02 Panasonic Corporation Loosely-biased heterogeneous reconfigurable arrays
US20040199894A1 (en) * 2002-07-23 2004-10-07 Klein Robert C. Interconnect structure for electrical devices
US20040019765A1 (en) * 2002-07-23 2004-01-29 Klein Robert C. Pipelined reconfigurable dynamic instruction set processor
WO2004010286A2 (en) * 2002-07-23 2004-01-29 Gatechange Technologies, Inc. Self-configuring processing element
US20070083730A1 (en) * 2003-06-17 2007-04-12 Martin Vorbach Data processing device and method
US7657861B2 (en) * 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
AU2003286131A1 (en) * 2002-08-07 2004-03-19 Pact Xpp Technologies Ag Method and device for processing data
US8108656B2 (en) 2002-08-29 2012-01-31 Qst Holdings, Llc Task definition for specifying resource requirements
US7394284B2 (en) 2002-09-06 2008-07-01 Pact Xpp Technologies Ag Reconfigurable sequencer structure
AU2003273333A1 (en) * 2002-09-18 2004-04-08 Netezza Corporation Field oriented pipeline architecture for a programmable data streaming processor
US7937591B1 (en) 2002-10-25 2011-05-03 Qst Holdings, Llc Method and system for providing a device which can be adapted on an ongoing basis
CA2503620A1 (en) * 2002-10-31 2004-05-21 Lockheed Martin Corporation Programmable circuit and related computing machine and method
US7478031B2 (en) 2002-11-07 2009-01-13 Qst Holdings, Llc Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information
US8276135B2 (en) 2002-11-07 2012-09-25 Qst Holdings Llc Profiling of software and circuit designs utilizing data operation analyses
US7225301B2 (en) 2002-11-22 2007-05-29 Quicksilver Technologies External memory controller node
EP1611528A2 (de) * 2003-04-04 2006-01-04 PACT XPP Technologies AG Verfahren und vorrichtung für die datenverarbeitung
US7609297B2 (en) * 2003-06-25 2009-10-27 Qst Holdings, Inc. Configurable hardware based digital imaging apparatus
US7379424B1 (en) 2003-08-18 2008-05-27 Cray Inc. Systems and methods for routing packets in multiprocessor computer systems
US7200837B2 (en) * 2003-08-21 2007-04-03 Qst Holdings, Llc System, method and software for static and dynamic programming and configuration of an adaptive computing architecture
EP1676208A2 (de) * 2003-08-28 2006-07-05 PACT XPP Technologies AG Datenverarbeitungseinrichtung und verfahren
US7343362B1 (en) * 2003-10-07 2008-03-11 United States Of America As Represented By The Secretary Of The Army Low complexity classification from a single unattended ground sensor node
US8782654B2 (en) 2004-03-13 2014-07-15 Adaptive Computing Enterprises, Inc. Co-allocating a reservation spanning different compute resources types
US20070266388A1 (en) 2004-06-18 2007-11-15 Cluster Resources, Inc. System and method for providing advanced reservations in a compute environment
US8176490B1 (en) 2004-08-20 2012-05-08 Adaptive Computing Enterprises, Inc. System and method of interfacing a workload manager and scheduler with an identity manager
CA2586763C (en) 2004-11-08 2013-12-17 Cluster Resources, Inc. System and method of providing system jobs within a compute environment
JP2008530642A (ja) * 2005-02-07 2008-08-07 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト 低レイテンシーの大量並列データ処理装置
US7917299B2 (en) 2005-03-03 2011-03-29 Washington University Method and apparatus for performing similarity searching on a data stream with respect to a query string
US8863143B2 (en) 2006-03-16 2014-10-14 Adaptive Computing Enterprises, Inc. System and method for managing a hybrid compute environment
US9015324B2 (en) 2005-03-16 2015-04-21 Adaptive Computing Enterprises, Inc. System and method of brokering cloud computing resources
US9231886B2 (en) 2005-03-16 2016-01-05 Adaptive Computing Enterprises, Inc. Simple integration of an on-demand compute environment
EP2348409B1 (de) 2005-03-16 2017-10-04 III Holdings 12, LLC Automatische Arbeitslastübertragung auf ein On-Demand-Center
EP3203374B1 (de) 2005-04-07 2021-11-24 III Holdings 12, LLC Zugang auf anfrage zu computerressourcen
US8782120B2 (en) 2005-04-07 2014-07-15 Adaptive Computing Enterprises, Inc. Elastic management of compute resources between a web server and an on-demand compute environment
WO2007062327A2 (en) * 2005-11-18 2007-05-31 Ideal Industries, Inc. Releasable wire connector
EP1974265A1 (de) 2006-01-18 2008-10-01 PACT XPP Technologies AG Hardwaredefinitionsverfahren
US7660793B2 (en) 2006-11-13 2010-02-09 Exegy Incorporated Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US8041773B2 (en) 2007-09-24 2011-10-18 The Research Foundation Of State University Of New York Automatic clustering for self-organizing grids
US20100272811A1 (en) * 2008-07-23 2010-10-28 Alkermes,Inc. Complex of trospium and pharmaceutical compositions thereof
US11720290B2 (en) 2009-10-30 2023-08-08 Iii Holdings 2, Llc Memcached server functionality in a cluster of data processing nodes
US10877695B2 (en) 2009-10-30 2020-12-29 Iii Holdings 2, Llc Memcached server functionality in a cluster of data processing nodes
CN102122275A (zh) * 2010-01-08 2011-07-13 上海芯豪微电子有限公司 一种可配置处理器
EP2526494B1 (de) 2010-01-21 2020-01-15 SVIRAL, Inc. Verfahren und vorrichtung für ein mehrzweck- und multikern-system zur implementierung von berechnungen auf stream-basis
US8589867B2 (en) 2010-06-18 2013-11-19 Microsoft Corporation Compiler-generated invocation stubs for data parallel programming model
US20110314256A1 (en) * 2010-06-18 2011-12-22 Microsoft Corporation Data Parallel Programming Model
US10037568B2 (en) 2010-12-09 2018-07-31 Ip Reservoir, Llc Method and apparatus for managing orders in financial markets
US10121196B2 (en) 2012-03-27 2018-11-06 Ip Reservoir, Llc Offload processing of data packets containing financial market data
US11436672B2 (en) 2012-03-27 2022-09-06 Exegy Incorporated Intelligent switch for processing financial market data
WO2015035320A1 (en) * 2013-09-06 2015-03-12 Huawei Technologies Co., Ltd. System and method for an asynchronous processor with a hierarchical token system
GB2535547B (en) * 2015-04-21 2017-01-11 Adaptive Array Systems Ltd Data processor
US11074213B2 (en) * 2019-06-29 2021-07-27 Intel Corporation Apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3787673A (en) * 1972-04-28 1974-01-22 Texas Instruments Inc Pipelined high speed arithmetic unit
US3875391A (en) * 1973-11-02 1975-04-01 Raytheon Co Pipeline signal processor
US3978452A (en) * 1974-02-28 1976-08-31 Burroughs Corporation System and method for concurrent and pipeline processing employing a data driven network
CH587180A5 (de) * 1974-09-26 1977-04-29 Knotex Maschinenbau Gmbh
US4051551A (en) * 1976-05-03 1977-09-27 Burroughs Corporation Multidimensional parallel access computer memory system
US4174514A (en) * 1976-11-15 1979-11-13 Environmental Research Institute Of Michigan Parallel partitioned serial neighborhood processors
US4101960A (en) * 1977-03-29 1978-07-18 Burroughs Corporation Scientific processor
US4161036A (en) * 1977-11-08 1979-07-10 United States Of America, Director National Security Agency Method and apparatus for random and sequential accessing in dynamic memories
US4228497A (en) * 1977-11-17 1980-10-14 Burroughs Corporation Template micromemory structure for a pipelined microprogrammable data processing system
US4363094A (en) * 1977-12-29 1982-12-07 M/A-COM DDC, Inc. Communications processor
US4244019A (en) * 1978-06-29 1981-01-06 Amdahl Corporation Data processing system including a program-executing secondary system controlling a program-executing primary system
JPS6024985B2 (ja) * 1978-08-31 1985-06-15 富士通株式会社 デ−タ処理方式
US4225920A (en) * 1978-09-11 1980-09-30 Burroughs Corporation Operator independent template control architecture
US4247892A (en) * 1978-10-12 1981-01-27 Lawrence Patrick N Arrays of machines such as computers
US4307447A (en) * 1979-06-19 1981-12-22 Gould Inc. Programmable controller
CA1174370A (en) * 1980-05-19 1984-09-11 Hidekazu Matsumoto Data processing unit with pipelined operands
US4482953A (en) * 1980-05-30 1984-11-13 Fairchild Camera & Instrument Corporation Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU
IT1131598B (it) * 1980-07-16 1986-06-25 Telettra Lab Telefon Cavita' per microonde stabili in temperatura
US4467409A (en) * 1980-08-05 1984-08-21 Burroughs Corporation Flexible computer architecture using arrays of standardized microprocessors customized for pipeline and parallel operations
JPS57155666A (en) * 1981-03-20 1982-09-25 Fujitsu Ltd Instruction controlling system of vector processor
US4442498A (en) * 1981-04-23 1984-04-10 Josh Rosen Arithmetic unit for use in data processing systems
US4438494A (en) * 1981-08-25 1984-03-20 Intel Corporation Apparatus of fault-handling in a multiprocessing system
JPS5883257A (ja) * 1981-11-13 1983-05-19 Noritoshi Nakabachi 超音波顕微鏡
US4498134A (en) * 1982-01-26 1985-02-05 Hughes Aircraft Company Segregator functional plane for use in a modular array processor
US4612628A (en) * 1983-02-14 1986-09-16 Data General Corp. Floating-point unit constructed of identical modules
US4594655A (en) * 1983-03-14 1986-06-10 International Business Machines Corporation (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
US4589067A (en) * 1983-05-27 1986-05-13 Analogic Corporation Full floating point vector processor with dynamically configurable multifunction pipelined ALU
US4621339A (en) * 1983-06-13 1986-11-04 Duke University SIMD machine using cube connected cycles network architecture for vector processing
JPS6057467A (ja) * 1983-09-09 1985-04-03 Nec Corp ベクトルデ−タ処理装置
JPH0642237B2 (ja) * 1983-12-28 1994-06-01 株式会社日立製作所 並列処理装置
JPS6113379A (ja) * 1984-06-28 1986-01-21 Fujitsu Ltd 画像処理装置
US4761755A (en) * 1984-07-11 1988-08-02 Prime Computer, Inc. Data processing system and method having an improved arithmetic unit
JPH07113884B2 (ja) * 1985-12-28 1995-12-06 株式会社東芝 論理回路

Also Published As

Publication number Publication date
AU599428B2 (en) 1990-07-19
JPS63147258A (ja) 1988-06-20
DE3751235D1 (de) 1995-05-18
CA1288170C (en) 1991-08-27
EP0268435A3 (en) 1990-12-05
DK595887D0 (da) 1987-11-13
EP0268435B1 (de) 1995-04-12
DK595887A (da) 1988-05-15
AU7982287A (en) 1988-05-19
NO874742L (no) 1988-05-16
EP0268435A2 (de) 1988-05-25
NO874742D0 (no) 1987-11-13
ES2070825T3 (es) 1995-06-16
US4811214A (en) 1989-03-07

Similar Documents

Publication Publication Date Title
DE3751235D1 (de) Vielfachknotenrechner mit rekonfigurierbarer Pipelinestruktur.
DE3781873D1 (de) Rekonfigurierbare rechenanordnung.
DE3786862T2 (de) Fehlertolerante Rechnerarchitektur.
DE3779150D1 (de) Multiprozessorsystem.
DE3854568T2 (de) SIMD-Feldrechner.
DE68917388D1 (de) Rechneranlage mit einer zentralen Zwischenverbindung.
DE3751609T2 (de) Datenprozessor mit Hochgeschwindigkeitsdatenübertragung.
DE3787886D1 (de) Parallelprozessor mit binärer baumstruktur.
DE3750938D1 (de) Multiprozessorsystem.
DE3750625T2 (de) Datenverarbeitungssystem mit zwei Ausführungseinheiten.
DE68925646T2 (de) Pipeline-multiprozessorsystem
DE3689226D1 (de) Multiprozessorsystem mit multihierarchischen Ebenen.
DE3751005D1 (de) Datenübertragungssystem mit Mehrfachausnützung.
DE3750028T2 (de) Pipelineprozessor mit schwacher Kopplung.
DE3789044D1 (de) Cachespeicherungspriorität.
DE69033239T2 (de) Rechner mit Pipeline-Struktur
DE3751252T2 (de) Mikroprozessor mit selektivem Cachespeicher.
DE3579924D1 (de) Superrechnersystemarchitektur.
DE3750530D1 (de) Mehrfachrechnersystem.
DE3767236D1 (de) Rohrleitungskupplung.
DE3775299D1 (de) Zentrale recheneinheit.
NO882750D0 (no) Tilholderlaas.
DE3784223T2 (de) Paralleler rechner.
DE3765986D1 (de) Flache bildroehre.
DE3786052T2 (de) Mehrfachknoten-Datenverarbeitungssystem.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee