DE3787399T2 - Verfahren zum Herstellen eines keramischen Mehrshictsubstrates mit massivem nicht-porösem Metall-Leiter. - Google Patents
Verfahren zum Herstellen eines keramischen Mehrshictsubstrates mit massivem nicht-porösem Metall-Leiter.Info
- Publication number
- DE3787399T2 DE3787399T2 DE87105869T DE3787399T DE3787399T2 DE 3787399 T2 DE3787399 T2 DE 3787399T2 DE 87105869 T DE87105869 T DE 87105869T DE 3787399 T DE3787399 T DE 3787399T DE 3787399 T2 DE3787399 T2 DE 3787399T2
- Authority
- DE
- Germany
- Prior art keywords
- producing
- porous metal
- layer substrate
- metal conductor
- solid non
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0317—Thin film conductor layer; Thin film passive component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0156—Temporary polymeric carrier or foil, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/859,092 US4753694A (en) | 1986-05-02 | 1986-05-02 | Process for forming multilayered ceramic substrate having solid metal conductors |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3787399D1 DE3787399D1 (de) | 1993-10-21 |
DE3787399T2 true DE3787399T2 (de) | 1994-04-21 |
Family
ID=25330009
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE87105869T Expired - Fee Related DE3787399T2 (de) | 1986-05-02 | 1987-04-22 | Verfahren zum Herstellen eines keramischen Mehrshictsubstrates mit massivem nicht-porösem Metall-Leiter. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4753694A (de) |
EP (1) | EP0244696B1 (de) |
JP (1) | JPS6399596A (de) |
DE (1) | DE3787399T2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19758797B4 (de) * | 1996-03-13 | 2008-05-08 | Murata Mfg. Co., Ltd., Nagaokakyo | Verfahren zum Herstellen eines Keramikmehrschichtsubstrats |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63240096A (ja) * | 1987-03-27 | 1988-10-05 | 富士通株式会社 | グリ−ンシ−ト多層法 |
JPH0272695A (ja) * | 1988-09-07 | 1990-03-12 | Toshiba Lighting & Technol Corp | 混成集積回路 |
US5085720A (en) * | 1990-01-18 | 1992-02-04 | E. I. Du Pont De Nemours And Company | Method for reducing shrinkage during firing of green ceramic bodies |
US5292548A (en) * | 1990-04-03 | 1994-03-08 | Vistatech Corporation | Substrates used in multilayered integrated circuits and multichips |
EP0457071A3 (en) * | 1990-05-12 | 1992-09-16 | Du Pont De Nemours (Deutschland) Gmbh | Process for generating fine conductor lines |
KR100200902B1 (ko) * | 1990-09-19 | 1999-06-15 | 가나이 쓰도무 | 다층세라믹 소결체 및 그 제조방법 |
US6007652A (en) * | 1990-11-05 | 1999-12-28 | Murata Manufacturing Co., Ltd. | Method of preparing metal thin film having excellent transferability |
US5211786A (en) * | 1990-12-21 | 1993-05-18 | W. R. Grace & Co.-Conn. | Use of permeable materials to improve hot pressing process |
US5108541A (en) * | 1991-03-06 | 1992-04-28 | International Business Machines Corp. | Processes for electrically conductive decals filled with inorganic insulator material |
US5338900A (en) * | 1991-03-06 | 1994-08-16 | International Business Machines Corporation | Structures for electrically conductive decals filled with inorganic insulator material |
US5116459A (en) * | 1991-03-06 | 1992-05-26 | International Business Machines Corporation | Processes for electrically conductive decals filled with organic insulator material |
JP3223199B2 (ja) * | 1991-10-25 | 2001-10-29 | ティーディーケイ株式会社 | 多層セラミック部品の製造方法および多層セラミック部品 |
DE69328390T2 (de) * | 1992-05-20 | 2000-12-07 | Matsushita Electric Ind Co Ltd | Verfahren zur Herstellung eines mehrlagigen Substrats |
US5470412A (en) * | 1992-07-30 | 1995-11-28 | Sumitomo Metal Ceramics Inc. | Process for producing a circuit substrate |
US5456778A (en) * | 1992-08-21 | 1995-10-10 | Sumitomo Metal Ceramics Inc. | Method of fabricating ceramic circuit substrate |
US5662755A (en) * | 1993-10-15 | 1997-09-02 | Matsushita Electric Industrial Co., Ltd. | Method of making multi-layered ceramic substrates |
WO1995026935A1 (en) * | 1994-04-05 | 1995-10-12 | The University Of Queensland | Coating of substrates |
KR100231356B1 (ko) | 1994-09-12 | 1999-11-15 | 모리시타요이찌 | 적층형 세라믹칩 인덕터 및 그 제조방법 |
US6911887B1 (en) * | 1994-09-12 | 2005-06-28 | Matsushita Electric Industrial Co., Ltd. | Inductor and method for producing the same |
KR100276052B1 (ko) * | 1994-10-04 | 2000-12-15 | 모리시타 요이찌 | 전사도체의 제조방법 및 적층용 그린시트의 제조방법 |
DE19509554A1 (de) * | 1995-03-16 | 1996-09-19 | Bosch Gmbh Robert | Verfahren zur Herstellung einer Multilayerschaltung |
US5707480A (en) * | 1995-09-19 | 1998-01-13 | International Business Machines Corporation | Apparatus for forming multiple cavity products |
US5707476A (en) * | 1995-09-19 | 1998-01-13 | International Business Machines Corporation | Method for forming multiple cavity products |
US5635000A (en) * | 1995-12-22 | 1997-06-03 | International Business Machines Corporation | Method for screening using electrostatic adhesion |
US6042667A (en) * | 1996-03-13 | 2000-03-28 | Sumotomo Metal Electronics Devices, Inc. | Method of fabricating ceramic multilayer substrate |
JP3771099B2 (ja) | 1999-01-27 | 2006-04-26 | 松下電器産業株式会社 | グリーンシート及びその製造方法、多層配線基板の製造方法、両面配線基板の製造方法 |
US6139666A (en) * | 1999-05-26 | 2000-10-31 | International Business Machines Corporation | Method for producing ceramic surfaces with easily removable contact sheets |
JP2002305123A (ja) * | 2001-04-06 | 2002-10-18 | Murata Mfg Co Ltd | 積層セラミック電子部品の製造方法及び積層インダクタの製造方法 |
US6627020B2 (en) * | 2001-08-31 | 2003-09-30 | International Business Machines Corporation | Method for sinter distortion control |
JP4770095B2 (ja) * | 2001-09-12 | 2011-09-07 | 大日本印刷株式会社 | 多層配線基板の製造方法 |
AU2003297642A1 (en) * | 2003-12-05 | 2005-08-12 | International Business Machines Corporation | Hot pressing ceramic distortion control |
US7332805B2 (en) * | 2004-01-06 | 2008-02-19 | International Business Machines Corporation | Electronic package with improved current carrying capability and method of forming the same |
JP4404139B2 (ja) * | 2005-10-26 | 2010-01-27 | 株式会社村田製作所 | 積層型基板、電子装置および積層型基板の製造方法 |
TW201345869A (zh) | 2012-04-18 | 2013-11-16 | Nitto Denko Corp | 用於燒結平面陶瓷之方法及裝置 |
US9205571B2 (en) | 2012-04-18 | 2015-12-08 | Nitto Denko Corporation | Method and apparatus for sintering flat ceramics |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3059320A (en) * | 1958-06-23 | 1962-10-23 | Ibm | Method of making electrical circuit |
US3852877A (en) * | 1969-08-06 | 1974-12-10 | Ibm | Multilayer circuits |
US3879509A (en) * | 1971-09-07 | 1975-04-22 | Gilbert James Elderbaum | Method of producing thin ceramic sheets with minimal distortion |
FR2163443B1 (de) * | 1971-12-13 | 1976-06-04 | Ibm | |
US3948706A (en) * | 1973-12-13 | 1976-04-06 | International Business Machines Corporation | Method for metallizing ceramic green sheets |
US3899554A (en) * | 1973-12-14 | 1975-08-12 | Ibm | Process for forming a ceramic substrate |
JPS511503A (ja) * | 1974-06-27 | 1976-01-08 | Ngk Insulators Ltd | Tasoseramitsukukibanno seizoho |
DE3064555D1 (en) * | 1979-02-26 | 1983-09-22 | Nat Res Dev | Method of incorporating a distributed microwave circuit element in a microwave integrated circuit |
US4221047A (en) * | 1979-03-23 | 1980-09-09 | International Business Machines Corporation | Multilayered glass-ceramic substrate for mounting of semiconductor device |
US4340436A (en) * | 1980-07-14 | 1982-07-20 | International Business Machines Corporation | Process for flattening glass-ceramic substrates |
JPS6014494A (ja) * | 1983-07-04 | 1985-01-25 | 株式会社日立製作所 | セラミツク多層配線基板およびその製造方法 |
NL8303447A (nl) * | 1983-10-07 | 1985-05-01 | Philips Nv | Werkwijze voor het maken van meerlaags condensatoren. |
US4510000A (en) * | 1983-11-30 | 1985-04-09 | International Business Machines Corporation | Method for palladium activating molybdenum metallized features on a ceramic substrate |
US4555285A (en) * | 1983-12-14 | 1985-11-26 | International Business Machines Corporation | Forming patterns in metallic or ceramic substrates |
US4521449A (en) * | 1984-05-21 | 1985-06-04 | International Business Machines Corporation | Process for forming a high density metallurgy system on a substrate and structure thereof |
JPS60254697A (ja) * | 1984-05-31 | 1985-12-16 | 富士通株式会社 | 多層セラミック回路基板および製法 |
US4584039A (en) * | 1984-12-26 | 1986-04-22 | Hughes Aircraft Co. | Fine line flexible cable fabrication process |
JPH0634452B2 (ja) * | 1985-08-05 | 1994-05-02 | 株式会社日立製作所 | セラミツクス回路基板 |
-
1986
- 1986-05-02 US US06/859,092 patent/US4753694A/en not_active Expired - Fee Related
-
1987
- 1987-04-22 DE DE87105869T patent/DE3787399T2/de not_active Expired - Fee Related
- 1987-04-22 EP EP87105869A patent/EP0244696B1/de not_active Expired - Lifetime
- 1987-05-01 JP JP62106531A patent/JPS6399596A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19758797B4 (de) * | 1996-03-13 | 2008-05-08 | Murata Mfg. Co., Ltd., Nagaokakyo | Verfahren zum Herstellen eines Keramikmehrschichtsubstrats |
Also Published As
Publication number | Publication date |
---|---|
EP0244696B1 (de) | 1993-09-15 |
DE3787399D1 (de) | 1993-10-21 |
EP0244696A3 (en) | 1988-11-09 |
JPS6399596A (ja) | 1988-04-30 |
JPH0150119B2 (de) | 1989-10-27 |
US4753694A (en) | 1988-06-28 |
EP0244696A2 (de) | 1987-11-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |