DE3867670D1 - Verfahren zur herstellung einer halbleiteranordnung vom feldeffekttransistor-typ. - Google Patents

Verfahren zur herstellung einer halbleiteranordnung vom feldeffekttransistor-typ.

Info

Publication number
DE3867670D1
DE3867670D1 DE8888200513T DE3867670T DE3867670D1 DE 3867670 D1 DE3867670 D1 DE 3867670D1 DE 8888200513 T DE8888200513 T DE 8888200513T DE 3867670 T DE3867670 T DE 3867670T DE 3867670 D1 DE3867670 D1 DE 3867670D1
Authority
DE
Germany
Prior art keywords
producing
field effect
effect transistor
transistor type
semiconductor arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8888200513T
Other languages
English (en)
Inventor
Patrick Daniel Rabinzohn
Serge Gourrier
Christian Rocher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3867670D1 publication Critical patent/DE3867670D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863Lateral single gate transistors
    • H01L29/66871Processes wherein the final gate is made after the formation of the source and drain regions in the active layer, e.g. dummy-gate processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes
    • H01L29/475Schottky barrier electrodes on AIII-BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863Lateral single gate transistors
    • H01L29/66886Lateral transistors with two or more independent gates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • H01L29/8124Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate with multiple gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/105Masks, metal
DE8888200513T 1987-03-24 1988-03-21 Verfahren zur herstellung einer halbleiteranordnung vom feldeffekttransistor-typ. Expired - Lifetime DE3867670D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8704072A FR2613134B1 (fr) 1987-03-24 1987-03-24 Dispositif semiconducteur du type transistor a effet de champ

Publications (1)

Publication Number Publication Date
DE3867670D1 true DE3867670D1 (de) 1992-02-27

Family

ID=9349362

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888200513T Expired - Lifetime DE3867670D1 (de) 1987-03-24 1988-03-21 Verfahren zur herstellung einer halbleiteranordnung vom feldeffekttransistor-typ.

Country Status (6)

Country Link
US (1) US4892835A (de)
EP (1) EP0285206B1 (de)
JP (1) JP2596962B2 (de)
KR (1) KR0134382B1 (de)
DE (1) DE3867670D1 (de)
FR (1) FR2613134B1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787195B2 (ja) * 1987-10-22 1995-09-20 三菱電機株式会社 ショットキゲート電界効果トランジスタの製造方法
US5143857A (en) * 1988-11-07 1992-09-01 Triquint Semiconductor, Inc. Method of fabricating an electronic device with reduced susceptiblity to backgating effects
US5849630A (en) * 1989-03-29 1998-12-15 Vitesse Semiconductor Corporation Process for forming ohmic contact for III-V semiconductor devices
US5155054A (en) * 1989-09-28 1992-10-13 Oki Electric Industry Co., Ltd. Method of manufacturing a semiconductor MOSFET having a projection T-shaped semiconductor portion
US5279990A (en) * 1990-03-02 1994-01-18 Motorola, Inc. Method of making a small geometry contact using sidewall spacers
US5176792A (en) * 1991-10-28 1993-01-05 At&T Bell Laboratories Method for forming patterned tungsten layers
US5602501A (en) * 1992-09-03 1997-02-11 Sumitomo Electric Industries, Ltd. Mixer circuit using a dual gate field effect transistor
JPH0685286A (ja) * 1992-09-03 1994-03-25 Sumitomo Electric Ind Ltd 電界効果トランジスタおよびその製造方法
US5384269A (en) * 1992-12-09 1995-01-24 Motorola, Inc. Methods for making and using a shallow semiconductor junction
US5516710A (en) * 1994-11-10 1996-05-14 Northern Telecom Limited Method of forming a transistor
JP3380344B2 (ja) * 1994-11-30 2003-02-24 富士通株式会社 半導体装置及びその製造方法
US5733806A (en) * 1995-09-05 1998-03-31 Motorola, Inc. Method for forming a self-aligned semiconductor device
US6091129A (en) * 1996-06-19 2000-07-18 Cypress Semiconductor Corporation Self-aligned trench isolated structure
US5830797A (en) * 1996-06-20 1998-11-03 Cypress Semiconductor Corporation Interconnect methods and apparatus
US6004874A (en) * 1996-06-26 1999-12-21 Cypress Semiconductor Corporation Method for forming an interconnect
US5911887A (en) * 1996-07-19 1999-06-15 Cypress Semiconductor Corporation Method of etching a bond pad
US5861676A (en) * 1996-11-27 1999-01-19 Cypress Semiconductor Corp. Method of forming robust interconnect and contact structures in a semiconductor and/or integrated circuit
JP3844561B2 (ja) * 1997-06-10 2006-11-15 株式会社半導体エネルギー研究所 半導体装置の作製方法
US20020008257A1 (en) * 1998-09-30 2002-01-24 John P. Barnak Mosfet gate electrodes having performance tuned work functions and methods of making same
US6433372B1 (en) 2000-03-17 2002-08-13 International Business Machines Corporation Dense multi-gated device design
US6461904B1 (en) * 2001-01-09 2002-10-08 Cypress Semiconductor Corp. Structure and method for making a notched transistor with spacers
US6864161B1 (en) * 2003-02-20 2005-03-08 Taiwan Semiconductor Manufacturing Company Method of forming a gate structure using a dual step polysilicon deposition procedure
WO2005024923A1 (en) * 2003-09-05 2005-03-17 Intrinsic Semiconductor Ab Method and device
FR2943802B1 (fr) 2009-03-24 2011-09-30 Univ Paris Sud Modulateur optique a haut debit en semi-conducteur sur isolant
RU2641617C1 (ru) * 2016-10-07 2018-01-18 Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" Способ изготовления полупроводникового прибора

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55110038A (en) * 1979-02-19 1980-08-25 Nippon Telegr & Teleph Corp <Ntt> Method for making electrode
CA1148274A (en) * 1980-03-24 1983-06-14 International Business Machines Corporation Method for making stable nitride-defined schottky barrier diodes
JPS57103363A (en) * 1980-12-18 1982-06-26 Nippon Telegr & Teleph Corp <Ntt> Manufacture of field effect transistor
JPS5950567A (ja) * 1982-09-16 1984-03-23 Hitachi Ltd 電界効果トランジスタの製造方法
JPS59117172A (ja) * 1982-12-23 1984-07-06 Nec Corp 電界効果型トランジスタの製造方法
JPS60123026A (ja) * 1983-12-08 1985-07-01 Toshiba Corp 半導体装置の製造方法
JPS61220376A (ja) * 1985-03-26 1986-09-30 Sumitomo Electric Ind Ltd ショットキゲート電界効果トランジスタの製造方法
JPS6229175A (ja) * 1985-07-29 1987-02-07 Nippon Telegr & Teleph Corp <Ntt> 電界効果型トランジスタの製造方法
DE3609274A1 (de) * 1986-03-19 1987-09-24 Siemens Ag Verfahren zur herstellung eines selbstjustiert positionierten metallkontaktes
US4808545A (en) * 1987-04-20 1989-02-28 International Business Machines Corporation High speed GaAs MESFET having refractory contacts and a self-aligned cold gate fabrication process
JPH06173377A (ja) * 1992-12-10 1994-06-21 Natl House Ind Co Ltd 床パネル支持構造

Also Published As

Publication number Publication date
KR880011936A (ko) 1988-10-31
FR2613134B1 (fr) 1990-03-09
JP2596962B2 (ja) 1997-04-02
KR0134382B1 (ko) 1998-04-20
EP0285206A1 (de) 1988-10-05
US4892835A (en) 1990-01-09
JPS63254771A (ja) 1988-10-21
EP0285206B1 (de) 1992-01-15
FR2613134A1 (fr) 1988-09-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee