DE4033363A1 - Fast and sensitive photodiode integrated with other circuits - features an etched trench in which the optical fibre is placed and pin-diode opposite the end of the fibre - Google Patents

Abstract

The photo-diode consists of a cathode (10) and an anode (11) contacting highly doped semiconductor regions, and an area of high resistivity for charge generation (9). The semiconductor (3) is pref. Si. The diode features at least on 2 sides vertical, or nearly vertical, parallel surfaces formed by trench walls. Light enters the diode through one of these surfaces, pref. from an optical fibre which has a thickness equivalent to the depth of the trench and is contained at a right angle to the diode surface. The diode wall next to the fibre pref. has an anti-reflection layer or layers, pref. a Si-dioxide/-nitride double layer. The region between the surfaces of the diode has surface layers, pref. more highly doped than the generation region and pref. of opposite type on the 2 sides, electrically connected with at least one electrode. Also claimed is the use of a MOS-structure, without heavier doping than the generation region and a metal or pref. polysi electrode, instead of at least one of these layers. USE/ADVANTAGE - The diodes have high sensitivity because of the use of highly doped material for the detection part together with a high drift field. The use of reflecting layers increases the apparent thickness of the region without requiring a high biasing voltage to maintain field strength, improving also the spectral response. The lowly doped region, e.g. 2x10power 14 cm-3, used for generating charge carriers can be integrated with circuits such as differential amplifiers with good yield on large area wafers because of the use of epitaxy. The diode has a low capacitance and therefore a short reaction time.

Description

The invention relates to a photodiode, which together with electronic Circuits can be integrated monolithically and at low cathode-anode voltages over a high spectral Sensitivity.

As receiver diodes for light in the wavelength range from 0.5 to 1.1 µm pin silicon diodes are usually used. To The manufacture of such diodes becomes very high-resistance semiconductor materials with resistivities in the range of a few kOhm cm used to with a low cathode anode voltage to cause a large barrier layer expansion and thus a high spectral sensitivity and a low parasitic capacitance to guarantee.

In receiver systems of optical fiber technology, the photodiode be connected to an evaluation electronics. The Electronic can due to the required for the pin silicon diodes resistivity of the semiconductor material is not immediate be integrated into this material because this material only up to a wheel diameter of 4 inches in the required Perfection can be provided; modern mass production facilities however designed for 5 or 6 inch disc diameter are. Therefore, one has to go from low-impedance to integrated solutions Czochralski substrate material of the electronic chip go out, reducing the sensitivity and switching times of the Diode will deteriorate significantly. The conventional one Manufacture in hybrid technology, d. H. the assembly of a photodiode and an electronic chip in a housing, is due to the additional assembly steps very costly and can therefore not satisfy as a final solution.  

In the previously known integrations of photodiodes with the associated evaluation electronics on silicon chips, a compromise is made between the requirements of the photodiode and those of the transistors. For example, with simultaneous preparation of bipolar transistors and photodiodes, a relatively high-resistance n-doped layer of approx. 5 × 10¹⁴ cm ^-3 with a thickness of approx. 5 µm is epitaxized onto a highly doped n-layer. This highly doped layer acts as a sub-collector in the bipolar transistors and as a cathode in the photodiode. The p-doped base doping of the bipolar transistor introduced later acts as an anode in the photodiode region. The requirements of both components on the epitaxial layer are, however, of a contradictory nature. While a large epitaxial layer thickness and low doping are desirable for the photodiode in order to ensure a large light absorption path in the barrier layer and a low parallel capacitance for a given cathode-anode voltage, fast bipolar transistors require a relatively high doping and an epitaxial layer thickness in the range of 1 to 2 µm.

In addition, the construction of very sensitive and fast photodiodes for use in the widespread light wave range from 800 nm to 850 nm requires an expansion of the barrier layer of approx. 20 µm, since light absorption of approx. 80% is only guaranteed at this depth in single-crystal silicon . For this purpose, however, with a lower realizable doping limit of 2 × 10¹⁴ cm ^-3 for epitaxial layers or for Czochralski substrate materials, a cathode anode voltage of more than 60 V is required, which would have to be generated very stably on the chip, because if the chip is used within a In more complex systems, only a supply voltage of 5 V is usually provided externally.

The coupling of the Optical fiber to the photodiode. Here are solutions favors the longest possible routing of the optical fiber allow, so that on the one hand tears off the connection between optical fiber and chip due to mechanical stress or thermal tension can be avoided and on the other hand, a simple adjustment of the optical waveguide Photodiode is enabled in the chip assembly. This is often the case V-shaped trenches to guide the optical fiber  used.

The object of the invention is to provide a sensitive and fast photodiode, together with information processing Integrated circuits on a semiconductor chip high spectral sensitivity can be guaranteed and a lateral coupling of a fiber of an optical waveguide enables.

This object is achieved by a semiconductor diode solved according to the characterizing part of claim 1.

Favorable designs are the subject of the subclaims. According to the invention, this is one of at least two vertical ones Trenches laterally bounded semiconductor area, which from one part of the semiconductor chip exists and largely generation-active Region of the photodiode forms, from the side in the area of the vertical Walls attached electrodes depleted, the depth of the trenches in the same size range as the diameter of the Fiber of the optical fiber lies, so that this in a vertical a guide helps the trench running towards the diode. This can take several using the entire chip length Millimeters. Depending on the arrangement of the electrodes on the vertical walls can use both very sensitive photodiodes extremely low parallel capacitance and high spectral sensitivity as well as very fast photodiodes with very short ones Carrier transit times in the junction as well as interim solutions both extremes can be realized.

The invention is described in more detail with reference to FIGS. 1 to 7. Figs. 1a to c show basic arrangement possibilities of the photodiode 1 according to the invention and the coupled optical fiber 2 on a semiconductor chip 3 in a schematic representation. In FIGS. 1a and b, the photodiode 1 is formed web-like, wherein the fiber 2 of the optical fiber serving by one of the separation of the photodiode trench 4 brought up to this (Fig. 1a) or the operation is removed at the end of the fiber (Figure . 1b). As will be explained later, the latter can be advantageous in order to be able to change the width of the web in the area outside the coupling surface. In Fig. 1c, the photodiode is surrounded on four sides by trenches, so that the block-shaped diode 5 is formed.

Before making electronic components on others To divide the chip it is recommended to cover the trenches with one layer made of polysilicon or silicon dioxide and fill this filling layer to planarize to a flat surface, e.g. B. for to ensure lithographic steps. After that the Trenches etched free again, whereby, as will be explained later, remains the filling layer can be left in the trench.

The first embodiment describes a very sensitive silicon photodiode with a coupled multimode fiber, the diameter of which is in the range of approximately 50 μm, the photodiode having a low parallel capacitance and a long light absorption path. The starting point is the configuration shown in FIG. 1b. The depth of the trench 3 is approximately 55 µm. It is thereby achieved that the entire end face of the fiber 2 is used as a coupling surface and this is completely embedded in the trench 4 . In the following description of the arrangement of the doped regions, a p-doped generation region 9 is assumed. The inverse doping structure is of course also possible. The vertical walls 6 and 7 are provided with a highly doped n-layer 8 ( FIG. 2), while the doping of the generation-active region 9 is in the range of approx. 2 × 10¹⁴ cm ^-3 ; a value that can still be achieved with the Czochralski crystal growth method commonly used for chip production. The highly doped layer 8 is electrically connected to the cathode 10 of the photodiode. The anode 11 is connected to a highly doped p-type layer 12 , which in this exemplary embodiment is located on the surface and is connected to a load element, e.g. B. a resistor, and the input of the simultaneous on-chip amplifier (not shown in the figures) is connected. The generation-active region 9 is delimited at the bottom by a likewise n-doped layer 13 , which is located approximately at the level of the trench bottom 14 . The wall 7 of the photodiode opposite the optical waveguide coupling is mirrored with an aluminum layer.

When operating the photodiode, a cathode-anode voltage of approx. 4 V is applied. This causes the generation region 9 to be depleted, starting from the n-layer 8 located on both vertical walls 6 and 7 . Each of these barrier layers expands to approximately 5.5 µm at the specified doping and voltage values. With a cathode-anode voltage of 4 V, a total zone of 11 µm is depleted. A planar photodiode would require a cathode-anode voltage of approx. 18 V due to the quadratic relationship between the applied voltage and the junction depth. If the barrier layers in the middle of the generation-active region 9 touch, this is completely impoverished; and the parallel capacitance reaches an extremely small value, which is explained by the small extent of the highly doped p-region 12 . Fig. 3 shows the computer simulation of a capacitance-voltage characteristic for the given in the embodiment boundary conditions. It can be seen that the cathode-anode capacitance at a voltage of 4 V has dropped to a value of 20 fF (without taking account of the interconnect capacitance). Such a small parasitic capacitance allows the evaluation of signals with extremely low light intensities. This high signal sensitivity is reinforced by the fact that the light path within the barrier layer is almost doubled due to the reflective metal layer, which would require a cathode-anode voltage of approx. 62 V for a planar photodiode. The boundary layer 13 isolates the generation-active region from the semiconductor substrate. So that z. B. avoided that the substrate bias of the n-channel transistors of a CMOS technology carried out on the same chip is modulated by the photodiode current. The introduction of this layer, which requires the use of an epitaxial process, is not absolutely necessary in order to achieve the desired isolation effect. Raising the fiber optic fiber by approx. 5 µm ensures that the lower region of the generation-active region is not or only very slightly irradiated and can therefore also act as an insulation layer. The raising of the optical fiber can be achieved by incomplete removal of the filler layer mentioned above. On the other hand, the anode 11 attached to the surface and the p-layer 12 connected to it can be dispensed with. In this case, the p-doped semiconductor substrate takes over the anode function. The electrical signal is picked up at the cathode.

Instead of the reflective metal layer, a suitable geometric design of the wall 7 opposite the light entry surface can also bring about the desired extension of the light absorption path. One possible embodiment is the zigzag-shaped surface profile of the trench wall 7 shown in FIG. 4, in which an angle of 45 ° is set between the side surfaces of the wall 7 and the direction of the coupled optical waveguide. This arrangement, as shown schematically in FIG. 4, would cause a double reflection of almost all of the light incident on the wall 7 if one had a refractive index ratio of approximately 0.5 (critical angle for total reflection approximately 30 ° C.) between the silicon dioxide layer 15 and the silicon as well as a numerical aperture of <0.25 of the optical waveguide.

The dynamic behavior of the photodiode according to the first exemplary embodiment, ie the response time (90% of the signal current), can be improved by increasing the vertical component of the electrical drift field by means of an introduced doping gradient, the doping increasing uniformly from top to bottom . With a gradient of 2 × 10¹² cm ^-3 / µm, a response time of 25 ns was calculated using the two-dimensional device simulation.

Another possibility for producing edge electrodes on the trench walls is to attach a MOS (metal oxide semiconductor) structure to the vertical trench walls, the metal layer preferably being replaced by a thin, largely translucent, electrically conductive layer such as polysilicon. If the semiconductor layer on the trench wall is to act as a cathode, as in the example above, then a positive voltage is applied to the polysilicon, e.g. B. 5 V and to arrange an on-cathode n-doped region as a source for electrons in the field region of the MOS structure. As a result, an inversion layer with electrons which is at the cathode potential is formed on the trench walls and has the same function as an n-doped layer. An advantage of this arrangement is that the width of the light-absorbing but not contributing to the evaluable signal zone of the photodiode is determined by the polysilicon thickness and not by the depth of the pn junction between the highly doped layer 8 and the generation-active region 9 , which is determined by the process-related temperature-time load on the doping profile can be relatively large.

A further improvement in the dynamic behavior is achieved by the diode described in the second exemplary embodiment. This is based on the block-shaped diode structure 5 according to FIG. 1c. In order to facilitate the routing of the connecting interconnects between the photodiode and the evaluation electronics, it is advisable to leave the planarized filling layer in the trench at least on one side of the block, which thus serves as a base for the interconnects.

In contrast to the first exemplary embodiment, the doping in the generation-active central region 9 at the foot of the block and in the middle thereof has the zones of increased p-doping 16 and 17 ( FIG. 5). The block that contains the diode is widened to the side of the coupling surface of the optical waveguide. Fig. 6 shows a schematic section parallel to the chip surface in the region of the vertically not increased doping. The central areas in the widened part of the block are marked with 18 . Even when the cathode-anode voltage is applied, these regions are not depleted due to the widening of the block, so that the more highly doped layers 16 and 17 pass through the undeveloped layers 18 to the layer 12 which extends into the widened edge region of the block and thus to the anode is electrically connected and is at anode potential during operation. As a result, the holes generated as a result of the incidence of light are suctioned off both by the zones 16 and 17 and (in the edge region) by the layers 18 . The response time of the diode is reduced compared to the first embodiment by the reduced path of the holes in the electrical drift field and by increasing the drift field strength. As a result of the lateral electric field generated by them, the undepleted layers 18 would of course bring about an improvement in the time behavior of the photodiode even if the increase in doping in zones 16 and 17 were dispensed with. This type of embodiment of the invention is also possible with the web-shaped photodiodes.

In the exemplary embodiments presented, the Running time of the holes in the drift field the dynamic behavior, during the transit time of the electrons to the vertical walls Because of the short distance it does not have a limiting effect. It is therefore close to exploiting the higher electron mobility and by Diode structures with inverse doping the response time of the  Reduce photodiodes to almost a third.

One possibility of realizing a very fast photodiode, whose response time is less than 1 ns, is also within the scope of the invention. The main idea of this variant is to use the semiconductor layers on the two opposite trench walls 6 and 7 as cathode and anode and, as in the exemplary embodiments mentioned above, to completely deplete the generation-active region 9 . This minimizes the runtime of the load carriers. In this variant, the guide aid for the optical waveguide fiber through the trench and the option of an extended light path through a reflection layer on the trench wall opposite the optical waveguide also have an advantage over planar photodiodes.

The third embodiment describes a very fast photodiode ( Fig. 7). As already mentioned in the first exemplary embodiment, metal-oxide semiconductor structures or combinations of both variants can also be used instead of the doping. In this example, each of the two opposite trench walls is provided with a polysilicon oxide semiconductor structure. A polysilicon layer 21 is connected to a positive supply voltage V⁺, for example 5 V. This layer is laterally connected to the highly doped n-layer 19 in the semiconductor, which is connected to the cathode 10 . The other polysilicon layer 20 is connected to the anode 11 , which is also connected to the p-doped wall layer 23 via the highly doped p-conducting layer 12 . The polysilicon layers 20 and 21 are insulated from the semiconductor material by an oxide 22 .

As a further difference from the previous exemplary embodiments here was one essentially parallel to the opposite trench walls provided with electrodes Light coupling selected. The length of the photodiode can be any be adapted to the respective absorption length, so that a maximum spectral sensitivity is achieved. This design option the photodiode according to the invention, depending on Diameter of the optical fiber, of course also on the first two embodiments transferable.

The applied voltages and the introduced doping lead to an accumulation layer for holes which is at anode potential and to an electron inversion layer at cathode potential on the respective trench walls. A prerequisite for fast operation of the photodiode is a complete depletion of the generation-active layer 9 .

In the event of light, the generated charge carriers drift to the respective electrodes and the electrical signal can be tapped, for example, at the anode. The polysilicon layer 20 has no electrical function. However, it does not have to be removed if, for. B. is at the potential of the anode and its capacity is not significantly increased.

Although the cathode-anode capacity is larger than in the previous ones Exemplary embodiments are such photodiodes due to the higher drift field strength for use cases high speed requirements more suitable.

As shown in FIG. 7, the photodiode is only surrounded on three sides by vertical trench walls, so that, as in the case of the web-shaped variant, the routing of the interconnects does not have to take place via the trenches. An arrangement with inverse doping is of course also possible here, for example in the interest of simplifying production.

characters

1a web-shaped photodiode with a guide of the optical fiber directly to the photodiode

1b Web-shaped photodiode with removal of the guidance of the optical fiber just before the photodiode

1c Block-shaped photodiode

2 section through the photodiode according to the first embodiment

3 Calculated capacitance-voltage characteristic (C = f (V)) for the photodiode according to the first embodiment

4 Horizontal section through a zigzag shaped photodiode designed trench wall (detail)

5 Vertical section through the photodiode of the second embodiment

6 Horizontal section through the photodiode of the second embodiment

7 Coupling of the optical fiber and diode structure in the photodiode of the third embodiment

Designations

1 bar-shaped photodiode
2 optical fiber
3 semiconductor chip
4 trenches
5 block-shaped photodiode
6 Vertical trench wall on the side of the photodiode facing the optical waveguide
7 Vertical trench wall on the side of the photodiode facing away from the optical waveguide
8 Highly doped n-type layer on the trench wall
9 generation-active layer (p-doped)
10 cathode
11 anode
12 Highly doped p-type layer
13 lower boundary layer (n-doped)
14 trench floor
15 silicon dioxide layer
16 1st zone of increased p-doping
17 2nd zone of increased p-doping
18 Not depleted center areas in the widened diode areas
19 Highly doped n-type surface layer
20 1. Insulated polysilicon electrode
21 2. Insulated polysilicon electrode
22 silicon dioxide layer
23 Highly doped p-type layer

Claims (21)

1. Arranged on a semiconductor substrate photodiode for receiver systems of optical fiber technology, consisting of a cathode and an anode, hereinafter referred to as electrodes, through this contacted highly doped semiconductor layers and a generation-active low-doped part, characterized in that the photodiode at least on two sides by vertical or approximately vertical trench walls running largely in parallel is laterally limited so that the light enters the photodiode on a trench wall and that in the region of the trench walls there are semiconductor layers which are electrically connected to at least one of the electrodes. 2. Photodiode according to claim 1, characterized in that it is the semiconductor substrate is a silicon chip. 3. Photodiode according to claim 1 or 2, characterized in that on at least one trench wall of the photodiode directly or indirectly the fiber of an optical fiber is coupled, that the height of this trench wall corresponds approximately to the thickness of the fiber and that the fiber is in a perpendicular to the trench wall tapered trench is arranged. 4. Photodiode according to one of the preceding claims, characterized characterized in that at least the vertical wall of the photodiode, where the light comes in with an anti-reflection layer or is provided with an anti-reflection layer combination, which preferably consists of a silicon dioxide-silicon nitride double layer consists. 5. Photodiode according to one of the preceding claims, characterized characterized in that the photodiode in the area of the vertical Walls opposite the generation active part of the photodiode has increased doping of the opposite conductivity type and that these regions of increased doping with the cathode or anode are electrically connected. 6. Photodiode according to one of the preceding claims, characterized characterized in that the semiconductor material in the region of the vertical Walls opposite the generation active part of the photodiode has increased doping and that the doping on the  two opposite vertical walls from the opposite Are line type. 7. Photodiode according to one of the preceding claims, characterized characterized in that on the vertical walls of the photodiode at least one metal oxide semiconductor structure is located, wherein the semiconductor region of this structure with the semiconductor of the Photodiode in the area of the trench wall is identical and that that Metal of this structure connected to a power supply becomes. 8. Photodiode according to claim 7, characterized in that the Metal of the metal oxide semiconductor structure through a polysilicon layer is replaced. 9. Photodiode according to one of claims 7 or 8, characterized in that the metal oxide semiconductor structure in two Areas assigned to the opposite sides of the photodiode subdivided, in which the metal or polysilicon layers connected to different power supplies will. 10. Photodiode according to one of the preceding claims, characterized characterized in that there is a filling layer on the bottom of the trenches is located on which the fiber of the optical fiber lies. 11. Photodiode according to one of the preceding claims, characterized characterized in that the generation-active part of the photodiode after below the semiconductor substrate by a highly doped Layer of the opposite conduction type of the generation-active Part, which is preferably approximately at the level of the trench floor located is limited. 12. Photodiode according to one of the preceding claims, characterized characterized that the doping within the generation-active Range of the diode in the vertical direction at least increased once. 13. Photodiode according to claim 12, characterized in that the or the areas of increased doping even with applied operating voltages are not depleted and with an electrode of Photodiode are electrically connected.   14. Photo diode according to one of the preceding claims, characterized characterized in that the distance between the vertical walls, Width of the photodiode called, preferably in the area outside the butt coupling area is increased. 15. Photodiode according to one of the preceding claims, characterized characterized in that the photodiode is completely surrounded by trenches is. 16. Photodiode according to one of the preceding claims, characterized characterized in that the incidence of light essentially on the narrow side of the photodiode. 17. Photodiode according to one of the preceding claims, characterized characterized in that the photodiode has at least one side connects laterally to the semiconductor substrate. 18. Photodiode according to one of the preceding claims, characterized characterized in that on the trench wall of the photodiode, which the Opposite light incidence, a light reflecting Layer, preferably a metal layer. 19. Photodiode according to one of the preceding claims, characterized characterized in that at least one trench wall, preferably the opposite the light incidence side, in the lateral direction has a zigzag or meandering surface course and that this trench wall with a light reflecting layer, preferably silicon dioxide. 20. Photodiode according to one of the preceding claims, characterized characterized in that the photodiode on the semiconductor substrate is carried out twice, with a photodiode not with light is irradiated and that both photodiodes indirectly or directly connected to the two inputs of a differential amplifier are. 21. Photo diode according to one of the preceding claims, characterized characterized in that on the same semiconductor substrate information processing circuits.