DE4040767A1 - Transformation hardware equipment for graphical symbols - uses shift register process to change symbol orientation - Google Patents

Abstract

Graphics processing equipment is used with a computer system to change the format and orientation of symbols. The equipment includes a transfer buffer (10), multiple shift register stages (20), a second group of transfer buffers (30) and a control counter (40). The input transfer buffer receives the output of the computer, the following stage (12) having the inverted values. The multiple shift register stages (20) receive sequential data from the transfer buffer. A unit (40) controls the data movement to the output buffer such that a 90 deg. orientation of the symbol can be obtained. USE - Allows graphical symbol orientation to be transformed.

Description

The invention relates to a computer hardware Device, especially a computer hardware Device for reshaping characters / graphic patterns.

A computer outputs readable alphanumeric text or graphics to a peripheral device such as a display screen or a printer / plotter. However, there are some functions that the computer has difficulty performing. An example is shown in Figures 1A, 1B. In these figures, character A is represented by an 8x8 matrix and it is desired to print that character sideways, that is, character A of Fig. 1A is rotated 90 ° counterclockwise as shown in Fig. 1B. The common way to accomplish this function is to use computer software that first reads the digital representation of the pattern of the character, then shifts the digital reproduction a predetermined number of positions before sending the shifted data to the printer / plotter will. This process is complicated, requires a large amount of computer memory, and is relatively slow.

Therefore, this invention is based on the object Hardware device to provide the function of the Shifting the digital reproduction of a Character pattern for transforming the character pattern takes place.

Another object of this invention is to provide a To create hardware facility which is the above mentioned function with a larger one Working speed and a lower Runs as a computer software that executes memory requirements performs the same function.

The object is achieved by the features of claim 1 solved.

Accordingly, the hardware device of this invention is intended be integrated into the computer hardware and points on: a first group of bit transition buffers for Receive digital reproduction of the pattern one Character / graphic; several shift registers for Receive the data from the first group of Bit transition buffers come; a second group of Bit transition buffers for receiving the content of the Shift registers; and a control counter for controlling the Distribution of the incoming data to the shift register and the flow of data from the shift registers data shifted out to the second group of Bit transition buffers. The output of the second group of Bit transition buffers is the digital representation of the  Pattern of the character / graphic in one of the following Shapes: the sign rotated 90 ° clockwise, the Character rotated 90 ° counterclockwise, or a mirror image mirrored on an imaginary X axis of the previous two forms.

Further advantageous configurations can be found in the Subclaims.

Other features and advantages of this invention will be by the following detailed description of a preferred embodiment with reference to the Drawings become clear, in which show:

Fig. 1A, 1B, the operation principle according to the prior art;

Fig. 2 is a circuit diagram of a preferred embodiment of this invention;

Fig. 3A, 4A, an image represented by an 8 x 8 matrix character pattern;

Fig. 3B, the 90 ° counter-clockwise rotated character pattern of Fig. 3A;

FIG. 3C shows an image of the character pattern from FIG. 3B mirrored on an imaginary Y axis; FIG.

FIG. 4B shows the drawing pattern of FIG. 4A rotated 90 ° clockwise; and

Fig. 4C a mirrored on an imaginary Y-axis image of the character pattern of Fig. 4B.

Referring to FIG. 2, a circuit diagram of the preferred embodiment of a transformation device of the present invention, a first group of Bitübergangspuffern 10, a plurality of shift register 20, a second group of Bitübergangspuffern 30 and a control counter 40.

The first group of bit transition buffers 10 has a first bit transition buffer 11 and a second bit transition buffer 12 . The first bit transition buffer 11 receives the bits of the digital representation of the pattern of a character from a computer, while the second bit transition buffer 12 receives the reverse order thereof.

Each of the shift registers 21 , 22 , 23 , 24 , 25 , 26 , 27 , 28 of the plurality of shift registers 20 sequentially receives data coming from either the first bit transition buffer 11 or the second bit transition buffer 12 and temporarily stores this information.

The second group of bit transition buffers 30 has a third bit transition buffer 31 and a fourth bit transition buffer 32 . The third bit transition buffer 31 receives bit by bit the contents of each of the plurality of shift registers 20 , while the fourth bit transition buffer 32 receives the reverse order thereof.

The control counter 40 is electrically connected to the first group of bit transition buffers 10 , to the second group of bit transition buffers 30 and the plurality of shift registers 20 . The control counter 40 controls the distribution of the incoming data among the shift registers 20 and the data flow, which comprises all bits that are shifted out by the shift register 20 at a specific point in time to the second group of bit transition buffers 30 .

Referring to Fig. 3A, a character pattern represented by an 8 x 8 matrix is shown. Each rectangle in the matrix is either a space step (0) or a color step (1). Each line is represented by an 8-bit byte as follows:

If the character pattern of Fig. 3A is to be rotated 90 ° counterclockwise as shown in Fig. 3B, the control counter 40 controls the second bit transition buffers 12 to fill each of the shift registers 20 point by point. The contents of each of the shift registers 20 (shift registers 21 to 28 ) are as follows:

After each of the shift registers 20 has received the data coming from the second bit transition buffer 12 , the control counter 40 controls the shift registers 20 for the serial output of the bits (I7) to the fourth bit transition buffer 32 , a first byte output H being formed. The first byte output H is received by the computer and the shift registers 20 , then the bits (I6) which form a second byte G are output, etc. The eight byte output signals now represent a character pattern as shown in FIG. 38 . The eight bit byte output signals are as follows.

If the control counter 40 controls the shift registers 20 to serially output their contents to the third bit transition buffers 31 , the order of the information received by the third bit transition buffers 31 is reversed from the information received by the fourth bit transition buffers 32 . The generated character is, as shown in FIG. 3C, a mirror image of the character from FIG. 3 mirrored on an imaginary Y axis. The character pattern of Fig. 3C is represented by the following eight-bit bytes.

If the character pattern of Fig. 4A is to be rotated 90 ° clockwise as shown in Fig. 4B, the control counter 40 controls the first bit transition buffers 11 to fill the shift registers 20 point by point. The contents of the shift register 20 are as follows:

The control counter 40 controls the plurality of shift registers 20 for serial output of the bits (I7) and the third bit transition buffer 31 , a first byte H being formed. The first byte output H is received by the computer and the plurality of shift registers 20 , then the bits (I6) which form a second byte G are output, etc. The eight byte outputs form a character pattern as shown in Fig. 4B. The eight byte outputs are as follows:

If the control counter 40 controls the plurality of shift registers 20 to serially output their contents to the fourth bit transition buffers 32 , the character pattern generated by the byte outputs as shown in Fig. 4C is an image mirrored on an imaginary Y axis of that shown in Fig. 4B Character pattern. The character pattern from Fig. 4C is represented by the following bytes:

Claims (5)

1. A character / graphic pattern transformation apparatus for use in a computer, comprising:

• - a first device ( 10 ) for receiving data representing a character pattern of the computer according to a first sequence and for outputting the digital data according to a second sequence;
• - a plurality of second devices ( 20 ), each of which successively receives the digital output data of the first device ( 10 ) and temporarily stores the data and then outputs them serially;
• - third means ( 30 ) for receiving the serial digital data from each of the plurality of second means in accordance with a third sequence and for outputting the serial digital data to the computer in accordance with a fourth sequence; and
• - A control device ( 40 ) for controlling the information flow formed by an exchange of the digital data between the first and the plurality of second devices, the control device ( 40 ) simultaneously the information flow between the plurality of second devices ( 20 ) and the third devices ( 30 ) controls.

2. Device according to claim 1, characterized in that the second episode in the same order as that first episode is. 3. Device according to claim 1, characterized in that the second episode in reverse order of first episode is. 4. The device according to claim 1, characterized in that the first device ( 10 ) and the third device ( 30 ) are bit transition buffer devices. 5. The device according to claim 1, characterized in that the plurality of second devices ( 20 ) are a plurality of shift register devices ( 21 to 28 ).