DE60106541D1 - LVDS Schaltungen, die für die Stromversorgung in Serie geschaltet sind - Google Patents

LVDS Schaltungen, die für die Stromversorgung in Serie geschaltet sind

Info

Publication number
DE60106541D1
DE60106541D1 DE60106541T DE60106541T DE60106541D1 DE 60106541 D1 DE60106541 D1 DE 60106541D1 DE 60106541 T DE60106541 T DE 60106541T DE 60106541 T DE60106541 T DE 60106541T DE 60106541 D1 DE60106541 D1 DE 60106541D1
Authority
DE
Germany
Prior art keywords
series
power supply
lvds circuits
lvds
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60106541T
Other languages
English (en)
Other versions
DE60106541T2 (de
Inventor
Thaddeus John Gabara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems Guardian Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems Guardian Corp filed Critical Agere Systems Guardian Corp
Application granted granted Critical
Publication of DE60106541D1 publication Critical patent/DE60106541D1/de
Publication of DE60106541T2 publication Critical patent/DE60106541T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0019—Arrangements for reducing power consumption by energy recovery or adiabatic operation
DE2001606541 2000-08-25 2001-08-23 LVDS Schaltungen, die für die Stromversorgung in Serie geschaltet sind Expired - Lifetime DE60106541T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/648,162 US6552581B1 (en) 2000-08-25 2000-08-25 Current recycling circuit and a method of current recycling
US648162 2000-08-25

Publications (2)

Publication Number Publication Date
DE60106541D1 true DE60106541D1 (de) 2004-11-25
DE60106541T2 DE60106541T2 (de) 2005-10-13

Family

ID=24599682

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2001606541 Expired - Lifetime DE60106541T2 (de) 2000-08-25 2001-08-23 LVDS Schaltungen, die für die Stromversorgung in Serie geschaltet sind

Country Status (4)

Country Link
US (1) US6552581B1 (de)
EP (1) EP1184986B1 (de)
JP (1) JP4019168B2 (de)
DE (1) DE60106541T2 (de)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7355358B2 (en) * 2003-10-23 2008-04-08 Hewlett-Packard Development Company, L.P. Configurable H-bridge circuit
US7342420B2 (en) * 2004-09-24 2008-03-11 Integrated Device Technology, Inc. Low power output driver
US7215173B2 (en) * 2005-01-31 2007-05-08 Intel Corporation Low-swing level shifter
TWI309101B (en) * 2005-08-16 2009-04-21 Realtek Semiconductor Corp Voltage converting circuit, voltage converting apparatus, and related circuit systems
US7411431B2 (en) * 2006-02-06 2008-08-12 Fairchild Semiconductor Corporation Dual output differential line driver using single current
US7683673B2 (en) * 2007-04-24 2010-03-23 National Semiconductor Corporation Stacked differential signal transmission circuitry
US7551006B2 (en) * 2007-10-04 2009-06-23 International Business Machines Corporation Low voltage differential signalling driver
JP5420847B2 (ja) * 2008-02-19 2014-02-19 ピーエスフォー ルクスコ エスエイアールエル 信号伝送回路及びこれを用いた信号伝送システム
US20110035540A1 (en) * 2009-08-10 2011-02-10 Adtron, Inc. Flash blade system architecture and method
US8476962B2 (en) * 2009-11-18 2013-07-02 Freescale Semiconductor, Inc. System having multiple voltage tiers and method therefor
US8169257B2 (en) * 2009-11-18 2012-05-01 Freescale Semiconductor, Inc. System and method for communicating between multiple voltage tiers
US8909851B2 (en) 2011-02-08 2014-12-09 SMART Storage Systems, Inc. Storage control system with change logging mechanism and method of operation thereof
US8952725B2 (en) 2011-02-24 2015-02-10 Via Technologies, Inc. Low voltage differential signal driving circuit and electronic device compatible with wired transmission
US8368426B2 (en) * 2011-02-24 2013-02-05 Via Technologies, Inc. Low voltage differential signal driving circuit and digital signal transmitter
US8935466B2 (en) 2011-03-28 2015-01-13 SMART Storage Systems, Inc. Data storage system with non-volatile memory and method of operation thereof
US9098399B2 (en) 2011-08-31 2015-08-04 SMART Storage Systems, Inc. Electronic system with storage management mechanism and method of operation thereof
US9021319B2 (en) 2011-09-02 2015-04-28 SMART Storage Systems, Inc. Non-volatile memory management system with load leveling and method of operation thereof
US9063844B2 (en) 2011-09-02 2015-06-23 SMART Storage Systems, Inc. Non-volatile memory management system with time measure mechanism and method of operation thereof
US9021231B2 (en) 2011-09-02 2015-04-28 SMART Storage Systems, Inc. Storage control system with write amplification control mechanism and method of operation thereof
US20130132623A1 (en) * 2011-11-17 2013-05-23 Velocio Networks, Inc. Method for Interconnecting Modules for High Speed Bidirectional Communications
US9239781B2 (en) 2012-02-07 2016-01-19 SMART Storage Systems, Inc. Storage control system with erase block mechanism and method of operation thereof
US9298252B2 (en) 2012-04-17 2016-03-29 SMART Storage Systems, Inc. Storage control system with power down mechanism and method of operation thereof
US8949689B2 (en) 2012-06-11 2015-02-03 SMART Storage Systems, Inc. Storage control system with data management mechanism and method of operation thereof
US9671962B2 (en) 2012-11-30 2017-06-06 Sandisk Technologies Llc Storage control system with data management mechanism of parity and method of operation thereof
US9123445B2 (en) 2013-01-22 2015-09-01 SMART Storage Systems, Inc. Storage control system with data management mechanism and method of operation thereof
US9214965B2 (en) 2013-02-20 2015-12-15 Sandisk Enterprise Ip Llc Method and system for improving data integrity in non-volatile storage
US9329928B2 (en) 2013-02-20 2016-05-03 Sandisk Enterprise IP LLC. Bandwidth optimization in a non-volatile memory system
US9183137B2 (en) 2013-02-27 2015-11-10 SMART Storage Systems, Inc. Storage control system with data management mechanism and method of operation thereof
US9470720B2 (en) 2013-03-08 2016-10-18 Sandisk Technologies Llc Test system with localized heating and method of manufacture thereof
US9043780B2 (en) 2013-03-27 2015-05-26 SMART Storage Systems, Inc. Electronic system with system modification control mechanism and method of operation thereof
US10049037B2 (en) 2013-04-05 2018-08-14 Sandisk Enterprise Ip Llc Data management in a storage system
US9170941B2 (en) 2013-04-05 2015-10-27 Sandisk Enterprises IP LLC Data hardening in a storage system
US9543025B2 (en) 2013-04-11 2017-01-10 Sandisk Technologies Llc Storage control system with power-off time estimation mechanism and method of operation thereof
US10546648B2 (en) 2013-04-12 2020-01-28 Sandisk Technologies Llc Storage control system with data management mechanism and method of operation thereof
US9898056B2 (en) 2013-06-19 2018-02-20 Sandisk Technologies Llc Electronic assembly with thermal channel and method of manufacture thereof
US9313874B2 (en) 2013-06-19 2016-04-12 SMART Storage Systems, Inc. Electronic system with heat extraction and method of manufacture thereof
US9367353B1 (en) 2013-06-25 2016-06-14 Sandisk Technologies Inc. Storage control system with power throttling mechanism and method of operation thereof
US9244519B1 (en) 2013-06-25 2016-01-26 Smart Storage Systems. Inc. Storage system with data transfer rate adjustment for power throttling
US9146850B2 (en) 2013-08-01 2015-09-29 SMART Storage Systems, Inc. Data storage system with dynamic read threshold mechanism and method of operation thereof
US9448946B2 (en) 2013-08-07 2016-09-20 Sandisk Technologies Llc Data storage system with stale data mechanism and method of operation thereof
US9431113B2 (en) 2013-08-07 2016-08-30 Sandisk Technologies Llc Data storage system with dynamic erase block grouping mechanism and method of operation thereof
US9361222B2 (en) 2013-08-07 2016-06-07 SMART Storage Systems, Inc. Electronic system with storage drive life estimation mechanism and method of operation thereof
US9152555B2 (en) 2013-11-15 2015-10-06 Sandisk Enterprise IP LLC. Data management with modular erase in a data storage system
US11953963B2 (en) * 2022-02-16 2024-04-09 Zetagig Inc. Apparatuses and methods for an array of devices

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58210722A (ja) 1982-06-02 1983-12-08 Hitachi Ltd 半導体集積回路
JPH01157121A (ja) * 1987-09-29 1989-06-20 Toshiba Corp 論理回路
US5032745A (en) * 1989-02-22 1991-07-16 National Semiconductor Corporation Current sensing of DC or a stepper motor
KR920010346B1 (ko) * 1990-05-23 1992-11-27 삼성전자 주식회사 반도체 메모리의 센스앰프 구동회로
JP2806050B2 (ja) * 1991-02-06 1998-09-30 日本電気株式会社 電源回路
JP3525195B2 (ja) * 1994-08-02 2004-05-10 光洋精工株式会社 電動パワーステアリング装置
FR2731570B1 (fr) * 1995-03-07 1997-05-23 Sgs Thomson Microelectronics Circuit logique a etage differentiel
US5867057A (en) * 1996-02-02 1999-02-02 United Microelectronics Corp. Apparatus and method for generating bias voltages for liquid crystal display
US5708389A (en) * 1996-03-15 1998-01-13 Lucent Technologies Inc. Integrated circuit employing quantized feedback
JPH09261038A (ja) 1996-03-22 1997-10-03 Nec Corp 論理回路
US5977796A (en) 1997-06-26 1999-11-02 Lucent Technologies, Inc. Low voltage differential swing interconnect buffer circuit
US6154044A (en) * 1998-11-20 2000-11-28 Trw Inc. Superconductive logic gate and random access memory

Also Published As

Publication number Publication date
US6552581B1 (en) 2003-04-22
JP2002111478A (ja) 2002-04-12
EP1184986A1 (de) 2002-03-06
JP4019168B2 (ja) 2007-12-12
DE60106541T2 (de) 2005-10-13
EP1184986B1 (de) 2004-10-20

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Legal Events

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