DE60112566D1 - Cmos signaltreibersystem für hohe spannungen und zugehöriges verfahren - Google Patents

Cmos signaltreibersystem für hohe spannungen und zugehöriges verfahren

Info

Publication number
DE60112566D1
DE60112566D1 DE60112566T DE60112566T DE60112566D1 DE 60112566 D1 DE60112566 D1 DE 60112566D1 DE 60112566 T DE60112566 T DE 60112566T DE 60112566 T DE60112566 T DE 60112566T DE 60112566 D1 DE60112566 D1 DE 60112566D1
Authority
DE
Germany
Prior art keywords
high voltages
signal driver
related method
driver system
cmos signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60112566T
Other languages
English (en)
Other versions
DE60112566T2 (de
Inventor
W Mattos
M Appold
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE60112566D1 publication Critical patent/DE60112566D1/de
Publication of DE60112566T2 publication Critical patent/DE60112566T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
DE60112566T 2000-03-30 2001-03-08 Cmos signaltreibersystem für hohe spannungen und zugehöriges verfahren Expired - Lifetime DE60112566T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/539,289 US6388470B1 (en) 2000-03-30 2000-03-30 High voltage CMOS signal driver with minimum power dissipation
PCT/US2001/007395 WO2001076071A2 (en) 2000-03-30 2001-03-08 High voltage cmos signal driver system and method

Publications (2)

Publication Number Publication Date
DE60112566D1 true DE60112566D1 (de) 2005-09-15
DE60112566T2 DE60112566T2 (de) 2006-06-14

Family

ID=24150598

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60112566T Expired - Lifetime DE60112566T2 (de) 2000-03-30 2001-03-08 Cmos signaltreibersystem für hohe spannungen und zugehöriges verfahren

Country Status (5)

Country Link
US (1) US6388470B1 (de)
EP (1) EP1277284B1 (de)
JP (1) JP2003529996A (de)
DE (1) DE60112566T2 (de)
WO (1) WO2001076071A2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003168794A (ja) * 2001-11-30 2003-06-13 Canon Inc 放射線検出素子、放射線撮像装置、放射線検出方法、及び放射線撮像方法
US6897702B2 (en) * 2002-05-30 2005-05-24 Sun Microsystems, Inc. Process variation compensated high voltage decoupling capacitor biasing circuit with no DC current
US6864725B2 (en) * 2002-06-05 2005-03-08 Micron Technology, Inc. Low current wide VREF range input buffer
US6856168B2 (en) * 2002-08-12 2005-02-15 Broadcom Corporation 5 Volt tolerant IO scheme using low-voltage devices
US7061298B2 (en) * 2003-08-22 2006-06-13 Idaho Research Foundation, Inc. High voltage to low voltage level shifter
US7737734B1 (en) * 2003-12-19 2010-06-15 Cypress Semiconductor Corporation Adaptive output driver
US7312626B2 (en) * 2005-08-31 2007-12-25 Micron Technology, Inc. CMOS circuits with reduced crowbar current
US7596326B2 (en) * 2005-10-27 2009-09-29 Emcore Corporation Distortion cancellation circuitry for optical receivers
US20100149884A1 (en) * 2008-11-11 2010-06-17 Stmicroelectronics Pvt. Ltd. Reduction of power consumption in a memory device during sleep mode of operation
TWI374611B (en) * 2009-04-03 2012-10-11 Univ Nat Sun Yat Sen I/o buffer with twice supply voltage tolerance using normal supply voltage devices
GB2469634B (en) * 2009-04-20 2015-11-11 Advanced Risc Mach Ltd Input-output device protection
US10574222B1 (en) * 2019-05-08 2020-02-25 PsiQuantum Corp. High speed high voltage drivers

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5465054A (en) 1994-04-08 1995-11-07 Vivid Semiconductor, Inc. High voltage CMOS logic using low voltage CMOS process
US5528190A (en) 1994-10-03 1996-06-18 Delco Electronics Corporation CMOS input voltage clamp
US5635861A (en) * 1995-05-23 1997-06-03 International Business Machines Corporation Off chip driver circuit
US5736887A (en) * 1996-01-25 1998-04-07 Rockwell International Corporation Five volt tolerant protection circuit
US5914617A (en) * 1996-12-23 1999-06-22 Lsi Logic Corporation Output driver for sub-micron CMOS
US5815354A (en) 1997-03-21 1998-09-29 International Business Machines Corporation Receiver input voltage protection circuit
US5986472A (en) 1997-06-06 1999-11-16 International Business Machines Corporation Voltage level translation for an output driver system with a bias generator
US6031394A (en) * 1998-01-08 2000-02-29 International Business Machines Corporation Low voltage CMOS circuit for on/off chip drive at high voltage
US6028450A (en) * 1998-03-17 2000-02-22 Xilinx, Inc. Programmable input/output circuit with pull-up bias control

Also Published As

Publication number Publication date
DE60112566T2 (de) 2006-06-14
WO2001076071A3 (en) 2002-01-31
JP2003529996A (ja) 2003-10-07
EP1277284A2 (de) 2003-01-22
EP1277284B1 (de) 2005-08-10
WO2001076071A2 (en) 2001-10-11
US6388470B1 (en) 2002-05-14

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL