DE60112676D1 - Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zu ihrer Prüfung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zu ihrer Prüfung

Info

Publication number
DE60112676D1
DE60112676D1 DE60112676T DE60112676T DE60112676D1 DE 60112676 D1 DE60112676 D1 DE 60112676D1 DE 60112676 T DE60112676 T DE 60112676T DE 60112676 T DE60112676 T DE 60112676T DE 60112676 D1 DE60112676 D1 DE 60112676D1
Authority
DE
Germany
Prior art keywords
testing
memory device
semiconductor memory
volatile semiconductor
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60112676T
Other languages
English (en)
Other versions
DE60112676T2 (de
Inventor
Yoshimitsu Yamauchi
Nobuhiko Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE60112676D1 publication Critical patent/DE60112676D1/de
Publication of DE60112676T2 publication Critical patent/DE60112676T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3454Arrangements for verifying correct programming or for detecting overprogrammed cells
DE60112676T 2000-06-13 2001-06-07 Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zu ihrer Prüfung Expired - Lifetime DE60112676T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000176986A JP3754600B2 (ja) 2000-06-13 2000-06-13 不揮発性半導体記憶装置およびそのテスト方法

Publications (2)

Publication Number Publication Date
DE60112676D1 true DE60112676D1 (de) 2005-09-22
DE60112676T2 DE60112676T2 (de) 2006-06-14

Family

ID=18678639

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60112676T Expired - Lifetime DE60112676T2 (de) 2000-06-13 2001-06-07 Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zu ihrer Prüfung

Country Status (6)

Country Link
US (2) US6512692B2 (de)
EP (1) EP1176608B1 (de)
JP (1) JP3754600B2 (de)
KR (1) KR100437345B1 (de)
DE (1) DE60112676T2 (de)
TW (1) TW522557B (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3694422B2 (ja) * 1999-06-21 2005-09-14 シャープ株式会社 ロウデコーダ回路
JP3850016B2 (ja) * 2001-06-29 2006-11-29 シャープ株式会社 不揮発性半導体記憶装置
JP2003281896A (ja) * 2002-03-22 2003-10-03 Fujitsu Ltd 半導体記憶装置
JP3906177B2 (ja) * 2002-05-10 2007-04-18 株式会社東芝 不揮発性半導体記憶装置
US6826080B2 (en) * 2002-05-24 2004-11-30 Nexflash Technologies, Inc. Virtual ground nonvolatile semiconductor memory array architecture and integrated circuit structure therefor
US6775184B1 (en) * 2003-01-21 2004-08-10 Nexflash Technologies, Inc. Nonvolatile memory integrated circuit having volatile utility and buffer memories, and method of operation thereof
JP4235122B2 (ja) * 2004-02-06 2009-03-11 シャープ株式会社 半導体記憶装置及び半導体記憶装置のテスト方法
US7251160B2 (en) * 2005-03-16 2007-07-31 Sandisk Corporation Non-volatile memory and method with power-saving read and program-verify operations
KR100769772B1 (ko) * 2006-09-29 2007-10-23 주식회사 하이닉스반도체 플래시 메모리 장치 및 이를 이용한 소거 방법
KR100918299B1 (ko) * 2007-04-25 2009-09-18 삼성전자주식회사 배드 블록 정보를 저장하지 않는 행 디코더를 갖는 플래시메모리 장치 및 그것의 제어 방법
KR100878307B1 (ko) * 2007-05-11 2009-01-14 주식회사 하이닉스반도체 멀티 워드라인 테스트 제어 회로 및 그의 제어 방법
KR100915809B1 (ko) * 2007-10-11 2009-09-07 주식회사 하이닉스반도체 반도체 테스트 장치 및 그의 테스트 방법
KR20090117189A (ko) * 2008-05-09 2009-11-12 삼성전자주식회사 멀티 라이트를 위한 효율적인 코아 구조를 갖는 반도체메모리 장치
KR100967100B1 (ko) * 2008-09-08 2010-07-01 주식회사 하이닉스반도체 반도체 메모리장치 및 이의 워드라인 구동방법
IT1392921B1 (it) * 2009-02-11 2012-04-02 St Microelectronics Srl Regioni allocabili dinamicamente in memorie non volatili
KR101596826B1 (ko) * 2009-10-26 2016-02-23 삼성전자주식회사 비휘발성 메모리 장치 및 그것의 바이어스 전압 인가 방법
TWI459392B (zh) * 2011-08-01 2014-11-01 Winbond Electronics Corp 串列式快閃記憶體的抹除方法
JP2016139447A (ja) * 2015-01-29 2016-08-04 エスアイアイ・セミコンダクタ株式会社 半導体記憶装置およびデータ書き込み方法
CN104900273A (zh) * 2015-06-20 2015-09-09 武汉新芯集成电路制造有限公司 一种sram关键电压参数的测试分析方法及系统
JP6732710B2 (ja) * 2017-09-22 2020-07-29 株式会社東芝 半導体記憶装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4541090A (en) * 1981-06-09 1985-09-10 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device
US5526307A (en) * 1992-01-22 1996-06-11 Macronix International Co., Ltd. Flash EPROM integrated circuit architecture
US5592415A (en) * 1992-07-06 1997-01-07 Hitachi, Ltd. Non-volatile semiconductor memory
JPH07201191A (ja) * 1993-12-28 1995-08-04 Toshiba Corp 不揮発性半導体メモリ装置
EP0752721B1 (de) * 1995-06-29 2009-04-29 Sharp Kabushiki Kaisha Nichtflüchtiger Halbleiterspeicher und Verfahren zur Steuerung und Verfahren zu seiner Herstellung
JP4038823B2 (ja) * 1995-08-31 2008-01-30 株式会社ルネサステクノロジ 半導体不揮発性記憶装置及びそれを用いたコンピュータシステム
JPH1083689A (ja) * 1996-09-10 1998-03-31 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP3344926B2 (ja) 1997-05-30 2002-11-18 富士通株式会社 ワード線多重選択可能な半導体記憶装置
JPH1166841A (ja) * 1997-08-22 1999-03-09 Mitsubishi Electric Corp 半導体記憶装置
JPH11224492A (ja) 1997-11-06 1999-08-17 Toshiba Corp 半導体記憶装置、不揮発性半導体記憶装置及びフラッシュメモリ
JPH11162199A (ja) 1997-11-25 1999-06-18 Hitachi Ltd 半導体記憶装置
JP4060938B2 (ja) * 1998-05-25 2008-03-12 シャープ株式会社 不揮発性半導体記憶装置
US5982684A (en) * 1998-05-28 1999-11-09 Intel Corporation Parallel access testing of a memory array

Also Published As

Publication number Publication date
DE60112676T2 (de) 2006-06-14
US20010050861A1 (en) 2001-12-13
US6512692B2 (en) 2003-01-28
US6643175B2 (en) 2003-11-04
US20030086292A1 (en) 2003-05-08
JP3754600B2 (ja) 2006-03-15
JP2001357699A (ja) 2001-12-26
KR20010112098A (ko) 2001-12-20
EP1176608A2 (de) 2002-01-30
EP1176608A3 (de) 2003-12-17
TW522557B (en) 2003-03-01
KR100437345B1 (ko) 2004-06-25
EP1176608B1 (de) 2005-08-17

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Legal Events

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8364 No opposition during term of opposition