DE60143643D1 - Integriertes halbleiterschaltungsbauelement - Google Patents

Integriertes halbleiterschaltungsbauelement

Info

Publication number
DE60143643D1
DE60143643D1 DE60143643T DE60143643T DE60143643D1 DE 60143643 D1 DE60143643 D1 DE 60143643D1 DE 60143643 T DE60143643 T DE 60143643T DE 60143643 T DE60143643 T DE 60143643T DE 60143643 D1 DE60143643 D1 DE 60143643D1
Authority
DE
Germany
Prior art keywords
circuit element
semiconductor circuit
integrated semiconductor
integrated
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60143643T
Other languages
English (en)
Inventor
Koichiro Ishibashi
Shoji Syukuri
Kazumasa Yanagisawa
Junichi Nishimoto
Masanao Yamaoka
Masakazu Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE60143643D1 publication Critical patent/DE60143643D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B28/00Compositions of mortars, concrete or artificial stone, containing inorganic binders or the reaction product of an inorganic and an organic binder, e.g. polycarboxylate cements
    • C04B28/02Compositions of mortars, concrete or artificial stone, containing inorganic binders or the reaction product of an inorganic and an organic binder, e.g. polycarboxylate cements containing hydraulic cements other than calcium sulfates
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/789Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using non-volatile cells or latches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/848Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/22Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H01L27/0211Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique adapted for requirements of temperature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2103/00Function or property of ingredients for mortars, concrete or artificial stone
    • C04B2103/0068Ingredients with a function or property not provided for elsewhere in C04B2103/00
    • C04B2103/0097Anion- and far-infrared-emitting materials
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00017Aspects relating to the protection of the environment
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00439Physico-chemical properties of the materials not provided for elsewhere in C04B2111/00
    • C04B2111/00456Odorless cements
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00474Uses not provided for elsewhere in C04B2111/00
    • C04B2111/00482Coating or impregnation materials
    • C04B2111/00517Coating or impregnation materials for masonry
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/20Resistance against chemical, physical or biological attack
    • C04B2111/2092Resistance against biological degradation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2216/00Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02Structural aspects of erasable programmable read-only memories
    • G11C2216/10Floating gate memory cells with a single polysilicon layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54433Marks applied to semiconductor devices or parts containing identification or tracking information
    • H01L2223/5444Marks applied to semiconductor devices or parts containing identification or tracking information for electrical read out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/1016Shape being a cuboid
    • H01L2924/10162Shape being a cuboid with a square active surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/50Peripheral circuit region structures
DE60143643T 2000-02-10 2001-02-08 Integriertes halbleiterschaltungsbauelement Expired - Lifetime DE60143643D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000038167A JP4191355B2 (ja) 2000-02-10 2000-02-10 半導体集積回路装置
PCT/JP2001/000887 WO2001059789A1 (fr) 2000-02-10 2001-02-08 Dispositif a circuit integre a semi-conducteur

Publications (1)

Publication Number Publication Date
DE60143643D1 true DE60143643D1 (de) 2011-01-27

Family

ID=18561945

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60143643T Expired - Lifetime DE60143643D1 (de) 2000-02-10 2001-02-08 Integriertes halbleiterschaltungsbauelement

Country Status (9)

Country Link
US (3) US6611458B2 (de)
EP (1) EP1262996B1 (de)
JP (1) JP4191355B2 (de)
KR (2) KR100817343B1 (de)
CN (2) CN101916591B (de)
AU (1) AU2001232248A1 (de)
DE (1) DE60143643D1 (de)
TW (1) TW506135B (de)
WO (1) WO2001059789A1 (de)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU9362998A (en) * 1997-11-28 1999-06-16 Asea Brown Boveri Ab Method and device for controlling the magnetic flux with an auxiliary winding ina rotating high voltage electric alternating current machine
US6829737B1 (en) 2000-08-30 2004-12-07 Micron Technology, Inc. Method and system for storing device test information on a semiconductor device using on-device logic for determination of test results
JP4043703B2 (ja) * 2000-09-04 2008-02-06 株式会社ルネサステクノロジ 半導体装置、マイクロコンピュータ、及びフラッシュメモリ
DE10120670B4 (de) * 2001-04-27 2008-08-21 Qimonda Ag Verfahren zur Reparatur von Hardwarefehlern in Speicherbausteinen
US7135734B2 (en) * 2001-08-30 2006-11-14 Micron Technology, Inc. Graded composition metal oxide tunnel barrier interpoly insulators
US7075829B2 (en) * 2001-08-30 2006-07-11 Micron Technology, Inc. Programmable memory address and decode circuits with low tunnel barrier interpoly insulators
US7087954B2 (en) * 2001-08-30 2006-08-08 Micron Technology, Inc. In service programmable logic arrays with low tunnel barrier interpoly insulators
US6754108B2 (en) * 2001-08-30 2004-06-22 Micron Technology, Inc. DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
US7476925B2 (en) * 2001-08-30 2009-01-13 Micron Technology, Inc. Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interploy insulators
US6963103B2 (en) * 2001-08-30 2005-11-08 Micron Technology, Inc. SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
JP3821697B2 (ja) 2001-12-07 2006-09-13 エルピーダメモリ株式会社 半導体集積回路装置のベリファイ方法および半導体集積回路装置
US6943575B2 (en) * 2002-07-29 2005-09-13 Micron Technology, Inc. Method, circuit and system for determining burn-in reliability from wafer level burn-in
JP2004079138A (ja) * 2002-08-22 2004-03-11 Renesas Technology Corp 不揮発性半導体記憶装置
EP1453062B1 (de) * 2003-02-27 2006-06-28 STMicroelectronics S.r.l. Eingebautes Testverfahren in einem Flash Speicher
JP4108519B2 (ja) * 2003-03-31 2008-06-25 エルピーダメモリ株式会社 制御回路、半導体記憶装置、及び制御方法
JP4314085B2 (ja) * 2003-09-08 2009-08-12 パナソニック株式会社 不揮発性半導体記憶装置
KR100586841B1 (ko) * 2003-12-15 2006-06-07 삼성전자주식회사 가변 딜레이 제어 방법 및 회로
JP4130634B2 (ja) 2004-01-20 2008-08-06 松下電器産業株式会社 半導体装置
JP4124743B2 (ja) 2004-01-21 2008-07-23 株式会社ルネサステクノロジ 相変化メモリ
JP2005327337A (ja) * 2004-05-12 2005-11-24 Matsushita Electric Ind Co Ltd 半導体記憶装置
KR100591764B1 (ko) * 2004-05-18 2006-06-22 삼성전자주식회사 셀 어레이를 가로질러 배선된 신호라인을 갖는 반도체메모리 장치
US7102371B1 (en) * 2004-05-19 2006-09-05 National Semiconductor Corporation Bilevel probe
KR100634439B1 (ko) * 2004-10-26 2006-10-16 삼성전자주식회사 퓨즈프리 회로, 퓨즈프리 반도체 집적회로 및 퓨즈프리불휘발성 메모리 장치, 그리고 퓨즈프리 방법
US7373573B2 (en) 2005-06-06 2008-05-13 International Business Machines Corporation Apparatus and method for using a single bank of eFuses to successively store testing data from multiple stages of testing
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
US8110469B2 (en) 2005-08-30 2012-02-07 Micron Technology, Inc. Graded dielectric layers
JP2007172690A (ja) * 2005-12-19 2007-07-05 Fujitsu Ltd メモリ冗長選択装置、記憶装置、情報処理装置およびメモリセルの冗長選択の方法
JP4764723B2 (ja) * 2006-01-10 2011-09-07 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP4675813B2 (ja) 2006-03-31 2011-04-27 Okiセミコンダクタ株式会社 半導体記憶装置およびその製造方法
JP2008181634A (ja) * 2006-12-26 2008-08-07 Semiconductor Energy Lab Co Ltd 半導体装置
US8055982B2 (en) * 2007-02-21 2011-11-08 Sigmatel, Inc. Error correction system and method
KR100843243B1 (ko) * 2007-04-18 2008-07-02 삼성전자주식회사 신호의 전송파워를 최적화한 반도체 메모리 장치 및 그파워 초기화 방법
KR100888885B1 (ko) * 2007-04-19 2009-03-17 삼성전자주식회사 리드프레임 및 이를 갖는 반도체 장치
JP2008300575A (ja) 2007-05-30 2008-12-11 Oki Electric Ind Co Ltd 半導体記憶装置およびその製造方法
JP2009070943A (ja) 2007-09-12 2009-04-02 Oki Semiconductor Co Ltd 半導体記憶装置およびその製造方法
KR100933839B1 (ko) * 2008-03-10 2009-12-24 주식회사 하이닉스반도체 불휘발성 메모리 소자 및 그 동작 방법
JP2009239161A (ja) * 2008-03-28 2009-10-15 Genusion Inc 不揮発性半導体記憶装置及びその使用方法
KR100998945B1 (ko) * 2008-09-05 2010-12-09 주식회사 하이닉스반도체 비휘발성 메모리 소자 제조 방법
DE102008063429B4 (de) * 2008-12-31 2015-03-26 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Einstellen der Konfiguration eines Mehr-Gatetransistors durch Steuern einzelner Stege
AU2012253263B2 (en) 2011-05-12 2016-07-07 DePuy Synthes Products, Inc. Improved image sensor for endoscopic use
CA2878512A1 (en) 2012-07-26 2014-01-30 Olive Medical Corporation Camera system with minimal area monolithic cmos image sensor
CN104769101A (zh) * 2012-09-04 2015-07-08 人类起源公司 组织产生方法
KR102044827B1 (ko) * 2012-10-17 2019-11-15 삼성전자주식회사 데이터 로딩 회로 및 이를 포함하는 반도체 메모리 장치
CN105246394B (zh) 2013-03-15 2018-01-12 德普伊新特斯产品公司 无输入时钟和数据传输时钟的图像传感器同步
EP2967286B1 (de) * 2013-03-15 2021-06-23 DePuy Synthes Products, Inc. Minimierung von e/a- und leiteranzahl eines bildsensors bei endoskopanwendungen
US9270174B2 (en) * 2013-05-12 2016-02-23 Freescale Semiconductor, Inc. Integrated circuit power management module
CN104409104B (zh) * 2014-10-30 2018-02-06 上海华虹宏力半导体制造有限公司 芯片存储单元扰码地址的验证方法
CN104616698A (zh) * 2015-01-28 2015-05-13 山东华翼微电子技术股份有限公司 一种充分利用存储器冗余单元的方法
JP6097775B2 (ja) * 2015-02-16 2017-03-15 力晶科技股▲ふん▼有限公司 半導体記憶装置及び半導体集積回路装置
US9343156B1 (en) * 2015-06-25 2016-05-17 Sandisk Technologies Inc. Balancing programming speeds of memory cells in a 3D stacked memory
DE112019002007T5 (de) * 2018-04-19 2021-01-21 Sony Semiconductor Solutions Corporation Nichtflüchtige speicherschaltung
KR20210145413A (ko) * 2020-05-25 2021-12-02 에스케이하이닉스 주식회사 메모리 장치

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60201599A (ja) 1984-03-26 1985-10-12 Hitachi Ltd 半導体集積回路装置
JPS61123100A (ja) * 1984-11-20 1986-06-10 Fujitsu Ltd 半導体記憶装置
EP0225960B1 (de) * 1985-12-07 1991-03-20 Deutsche ITT Industries GmbH CMOS-Inverterkette
US4794597A (en) * 1986-03-28 1988-12-27 Mitsubishi Denki Kabushiki Kaisha Memory device equipped with a RAS circuit
US5089433A (en) 1988-08-08 1992-02-18 National Semiconductor Corporation Bipolar field-effect electrically erasable programmable read only memory cell and method of manufacture
US5088433A (en) * 1989-07-31 1992-02-18 Masakazu Osawa Wave-making resistance suppressing means in ship and ship provided therewith
GB8926004D0 (en) * 1989-11-17 1990-01-10 Inmos Ltd Repairable memory circuit
JPH03179780A (ja) * 1989-12-07 1991-08-05 Fujitsu Ltd 半導体装置
KR920005798A (ko) * 1990-04-18 1992-04-03 미타 가쓰시게 반도체 집적회로
JP3083547B2 (ja) 1990-07-12 2000-09-04 株式会社日立製作所 半導体集積回路装置
JPH05114300A (ja) * 1991-05-21 1993-05-07 Citizen Watch Co Ltd 半導体記憶装置
US5278439A (en) * 1991-08-29 1994-01-11 Ma Yueh Y Self-aligned dual-bit split gate (DSG) flash EEPROM cell
JPH05298898A (ja) * 1992-04-14 1993-11-12 Toshiba Corp 不揮発性半導体記憶装置
JPH05314789A (ja) 1992-05-14 1993-11-26 Fujitsu Ltd 冗長アドレス記憶回路
JP2596695B2 (ja) 1993-05-07 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション Eeprom
JP3212421B2 (ja) 1993-09-20 2001-09-25 富士通株式会社 不揮発性半導体記憶装置
US5466231A (en) * 1993-11-04 1995-11-14 Merocel Corporation Laminated sponge device
JPH07287994A (ja) 1994-04-19 1995-10-31 Mitsubishi Electric Corp 半導体記憶装置及びその製造方法
KR0126101B1 (ko) * 1994-07-07 1997-12-26 김주용 리페어 마스크 형성방법
KR0161399B1 (ko) * 1995-03-13 1998-12-01 김광호 불휘발성 메모리장치 및 그 제조방법
US5765544A (en) * 1995-06-05 1998-06-16 Vigansky, Jr.; Charles E. Flow-through humidifier for mobile home furnace
US6166293A (en) * 1996-07-18 2000-12-26 The Salk Institute For Biological Studies Method of increasing growth and yield in plants
JPH10149694A (ja) * 1996-11-19 1998-06-02 Toshiba Microelectron Corp 半導体メモリおよびデータ書換回路
US5949703A (en) * 1996-12-26 1999-09-07 Kabushiki Kaisha Toshiba Semiconductor memory device in which data in programmable ROM can be apparently rewritten
JP3519583B2 (ja) 1997-09-19 2004-04-19 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
US6005270A (en) * 1997-11-10 1999-12-21 Sony Corporation Semiconductor nonvolatile memory device and method of production of same
JPH11197652A (ja) 1998-01-06 1999-07-27 Sanden Corp 浄水殺菌装置
JP2000123591A (ja) * 1998-10-16 2000-04-28 Fujitsu Ltd 不揮発性半導体記憶装置
EP1703520B1 (de) * 1999-02-01 2011-07-27 Renesas Electronics Corporation Integrierte Halbleiterschaltung und nichtflüchtiges Speicherelement

Also Published As

Publication number Publication date
US20050152186A1 (en) 2005-07-14
EP1262996A1 (de) 2002-12-04
US20040004879A1 (en) 2004-01-08
US20010019499A1 (en) 2001-09-06
CN100590739C (zh) 2010-02-17
US6894944B2 (en) 2005-05-17
KR100816924B1 (ko) 2008-03-26
CN101916591B (zh) 2014-05-07
US7149113B2 (en) 2006-12-12
US6611458B2 (en) 2003-08-26
CN1398407A (zh) 2003-02-19
EP1262996A4 (de) 2007-06-27
KR20020080340A (ko) 2002-10-23
JP4191355B2 (ja) 2008-12-03
KR20070108570A (ko) 2007-11-12
CN101916591A (zh) 2010-12-15
TW506135B (en) 2002-10-11
KR100817343B1 (ko) 2008-03-27
AU2001232248A1 (en) 2001-08-20
JP2001229690A (ja) 2001-08-24
EP1262996B1 (de) 2010-12-15
WO2001059789A1 (fr) 2001-08-16

Similar Documents

Publication Publication Date Title
DE60143643D1 (de) Integriertes halbleiterschaltungsbauelement
DE60135728D1 (de) Integrierte Halbleiterschaltung
DE50112868D1 (de) Halbleiter-chip
DE69943120D1 (de) Integrierte Halbleiterschaltung
DE60218932D1 (de) Integrierte Schaltkreisstruktur
DE69927658D1 (de) Integrierte Halbleiterschaltung
DE60230568D1 (de) Integrierte Radiofrequenz-Schaltkreise
DE60129991D1 (de) Halbleiterlaserbauelement
DE60025067D1 (de) Cmos Halbleiter integrierte Schaltung
DE60227475D1 (de) Halbleiterbauelement
GB2372601B (en) Semiconductor integrated circuit
DE69930586D1 (de) Integrierte Halbleiterspeicherschaltung
DE60142141D1 (de) Halbleiterbauelement
DE69920486D1 (de) Halbleiterschaltung
DE602004031698D1 (de) Integrierte Halbleiterschaltung
DE60211244D1 (de) Halbleiterbauelement
DE10191585B8 (de) Halbleitervorrichtung
DE60321866D1 (de) Halbleiter integrierte Schaltungsvorrichtung
DE60218009D1 (de) Halbleiterspeichervorrichtung
DE60221625D1 (de) Integrierte Halbleiterschaltung
DE60225790D1 (de) Halbleiterbauelement
DE60229712D1 (de) Halbleiterspeicher
DE60042381D1 (de) Integrierte Halbleiterschaltungsanordnung
DE60215291D1 (de) Halbleiter Speicheranordnung
DE50113060D1 (de) Halbleiter-leistungsbauelement