DE602004010303D1 - Mehrere schnittstellen in einem speichergehäuse - Google Patents

Mehrere schnittstellen in einem speichergehäuse

Info

Publication number
DE602004010303D1
DE602004010303D1 DE602004010303T DE602004010303T DE602004010303D1 DE 602004010303 D1 DE602004010303 D1 DE 602004010303D1 DE 602004010303 T DE602004010303 T DE 602004010303T DE 602004010303 T DE602004010303 T DE 602004010303T DE 602004010303 D1 DE602004010303 D1 DE 602004010303D1
Authority
DE
Germany
Prior art keywords
multiple interfaces
memory case
memory
case
interfaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004010303T
Other languages
English (en)
Other versions
DE602004010303T2 (de
Inventor
Park-Lung Seto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE602004010303D1 publication Critical patent/DE602004010303D1/de
Application granted granted Critical
Publication of DE602004010303T2 publication Critical patent/DE602004010303T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
DE602004010303T 2003-12-18 2004-12-01 Mehrere schnittstellen in einem speichergehäuse Active DE602004010303T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US741460 2003-12-18
US10/741,460 US7155546B2 (en) 2003-12-18 2003-12-18 Multiple physical interfaces in a slot of a storage enclosure to support different storage interconnect architectures
PCT/US2004/040418 WO2005064482A1 (en) 2003-12-18 2004-12-01 Multiple interfaces in a storage enclosure

Publications (2)

Publication Number Publication Date
DE602004010303D1 true DE602004010303D1 (de) 2008-01-03
DE602004010303T2 DE602004010303T2 (de) 2008-10-02

Family

ID=34678155

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004010303T Active DE602004010303T2 (de) 2003-12-18 2004-12-01 Mehrere schnittstellen in einem speichergehäuse

Country Status (6)

Country Link
US (3) US7155546B2 (de)
EP (1) EP1700226B1 (de)
CN (1) CN100465936C (de)
DE (1) DE602004010303T2 (de)
TW (1) TWI291619B (de)
WO (1) WO2005064482A1 (de)

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Also Published As

Publication number Publication date
CN1890654A (zh) 2007-01-03
US7155546B2 (en) 2006-12-26
US20070067537A1 (en) 2007-03-22
EP1700226A1 (de) 2006-09-13
WO2005064482A1 (en) 2005-07-14
CN100465936C (zh) 2009-03-04
US20050138258A1 (en) 2005-06-23
TW200523739A (en) 2005-07-16
US7373442B2 (en) 2008-05-13
DE602004010303T2 (de) 2008-10-02
TWI291619B (en) 2007-12-21
US7373443B2 (en) 2008-05-13
US20070233916A1 (en) 2007-10-04
EP1700226B1 (de) 2007-11-21

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