DE60221321D1 - Herstellungsverfahren einer HF-Induktivität - Google Patents

Herstellungsverfahren einer HF-Induktivität

Info

Publication number
DE60221321D1
DE60221321D1 DE60221321T DE60221321T DE60221321D1 DE 60221321 D1 DE60221321 D1 DE 60221321D1 DE 60221321 T DE60221321 T DE 60221321T DE 60221321 T DE60221321 T DE 60221321T DE 60221321 D1 DE60221321 D1 DE 60221321D1
Authority
DE
Germany
Prior art keywords
inductor
helical shape
manufacturing
metal
damascened
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60221321T
Other languages
English (en)
Other versions
DE60221321T2 (de
Inventor
Randall Cha
Tae Jong Lee
Alex See
Lap Chan
Chua Chee Tee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Singapore Pte Ltd
Original Assignee
Chartered Semiconductor Manufacturing Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chartered Semiconductor Manufacturing Pte Ltd filed Critical Chartered Semiconductor Manufacturing Pte Ltd
Application granted granted Critical
Publication of DE60221321D1 publication Critical patent/DE60221321D1/de
Publication of DE60221321T2 publication Critical patent/DE60221321T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10Inductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
DE60221321T 2001-05-31 2002-05-29 Herstellungsverfahren einer HF-Induktivität Expired - Fee Related DE60221321T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/867,561 US6387747B1 (en) 2001-05-31 2001-05-31 Method to fabricate RF inductors with minimum area
US867561 2001-05-31

Publications (2)

Publication Number Publication Date
DE60221321D1 true DE60221321D1 (de) 2007-09-06
DE60221321T2 DE60221321T2 (de) 2008-04-10

Family

ID=25350030

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60221321T Expired - Fee Related DE60221321T2 (de) 2001-05-31 2002-05-29 Herstellungsverfahren einer HF-Induktivität

Country Status (5)

Country Link
US (1) US6387747B1 (de)
EP (1) EP1267391B1 (de)
AT (1) ATE368296T1 (de)
DE (1) DE60221321T2 (de)
SG (1) SG103858A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002252281A (ja) * 2001-02-27 2002-09-06 Sony Corp 半導体装置およびその製造方法
US7148553B1 (en) * 2001-08-01 2006-12-12 Davies Robert B Semiconductor device with inductive component and method of making
US6856007B2 (en) 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
US7176506B2 (en) * 2001-08-28 2007-02-13 Tessera, Inc. High frequency chip packages with connecting elements
ITTO20011038A1 (it) * 2001-10-30 2003-04-30 St Microelectronics Srl Procedimento per la fabbricazione di una fetta semiconduttrice integrante dispositivi elettronici e una struttura per il disaccoppiamento el
FR2833411B1 (fr) * 2001-12-11 2004-02-27 Memscap Procede de fabrication d'un composant electronique incorporant un micro-composant inductif
US7754537B2 (en) * 2003-02-25 2010-07-13 Tessera, Inc. Manufacture of mountable capped chips
JP3827314B2 (ja) * 2003-03-17 2006-09-27 Tdk株式会社 インダクティブデバイスの製造方法
US6716693B1 (en) * 2003-03-27 2004-04-06 Chartered Semiconductor Manufacturing Ltd. Method of forming a surface coating layer within an opening within a body by atomic layer deposition
KR100577016B1 (ko) * 2003-11-05 2006-05-10 매그나칩 반도체 유한회사 반도체 소자의 rf 인덕터 제조 방법
FR2876243B1 (fr) * 2004-10-04 2007-01-26 Commissariat Energie Atomique Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures
US8143095B2 (en) 2005-03-22 2012-03-27 Tessera, Inc. Sequential fabrication of vertical conductive interconnects in capped chips
US7410894B2 (en) * 2005-07-27 2008-08-12 International Business Machines Corporation Post last wiring level inductor using patterned plate process
US7399696B2 (en) * 2005-08-02 2008-07-15 International Business Machines Corporation Method for high performance inductor fabrication using a triple damascene process with copper BEOL
US7473999B2 (en) * 2005-09-23 2009-01-06 Megica Corporation Semiconductor chip and process for forming the same
US7936062B2 (en) 2006-01-23 2011-05-03 Tessera Technologies Ireland Limited Wafer level chip packaging
US8604605B2 (en) 2007-01-05 2013-12-10 Invensas Corp. Microelectronic assembly with multi-layer support structure
US20090085704A1 (en) * 2007-10-01 2009-04-02 Infineon Technologies Austria Ag Chip inductor
US10593449B2 (en) 2017-03-30 2020-03-17 International Business Machines Corporation Magnetic inductor with multiple magnetic layer thicknesses
US10607759B2 (en) 2017-03-31 2020-03-31 International Business Machines Corporation Method of fabricating a laminated stack of magnetic inductor
US10597769B2 (en) 2017-04-05 2020-03-24 International Business Machines Corporation Method of fabricating a magnetic stack arrangement of a laminated magnetic inductor
US10347411B2 (en) 2017-05-19 2019-07-09 International Business Machines Corporation Stress management scheme for fabricating thick magnetic films of an inductor yoke arrangement
US11289365B2 (en) * 2019-11-07 2022-03-29 Qualcomm Incorporated Air gap underneath passive devices

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994017558A1 (en) 1993-01-29 1994-08-04 The Regents Of The University Of California Monolithic passive component
US5478773A (en) 1994-04-28 1995-12-26 Motorola, Inc. Method of making an electronic device having an integrated inductor
US5610569A (en) * 1996-01-31 1997-03-11 Hughes Electronics Staggered horizontal inductor for use with multilayer substrate
US5717243A (en) 1996-04-24 1998-02-10 Harris Corporation Integrated circuit with an improved inductor structure and method of fabrication
JP2000515323A (ja) * 1996-07-18 2000-11-14 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド エッチングストップを用いて互い違いの配線を生成する集積回路
US5793272A (en) 1996-08-23 1998-08-11 International Business Machines Corporation Integrated circuit toroidal inductor
KR100211030B1 (ko) 1996-12-21 1999-07-15 정선종 다층 금속배선 기술을 이용한 모스트랜지스터 내장형 인덕터 소자
FR2771843B1 (fr) * 1997-11-28 2000-02-11 Sgs Thomson Microelectronics Transformateur en circuit integre
US6187647B1 (en) * 1999-10-12 2001-02-13 Lucent Technologies Inc. Method of manufacturing lateral high-Q inductor for semiconductor devices
US6309922B1 (en) * 2000-07-28 2001-10-30 Conexant Systems, Inc. Method for fabrication of on-chip inductors and related structure

Also Published As

Publication number Publication date
EP1267391A1 (de) 2002-12-18
DE60221321T2 (de) 2008-04-10
US6387747B1 (en) 2002-05-14
ATE368296T1 (de) 2007-08-15
EP1267391B1 (de) 2007-07-25
SG103858A1 (en) 2004-05-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee