DE60313462D1 - Sublithographische nanobereichs-speicherarchitektur - Google Patents

Sublithographische nanobereichs-speicherarchitektur

Info

Publication number
DE60313462D1
DE60313462D1 DE60313462T DE60313462T DE60313462D1 DE 60313462 D1 DE60313462 D1 DE 60313462D1 DE 60313462 T DE60313462 T DE 60313462T DE 60313462 T DE60313462 T DE 60313462T DE 60313462 D1 DE60313462 D1 DE 60313462D1
Authority
DE
Germany
Prior art keywords
sublithographic
nanoscale
wires
store architecture
area store
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60313462T
Other languages
English (en)
Other versions
DE60313462T2 (de
Inventor
Andre Dehon
Charles M Lieber
Patrick D Lincoln
John Savage
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harvard College
SRI International Inc
California Institute of Technology CalTech
Brown University
Original Assignee
Harvard College
SRI International Inc
California Institute of Technology CalTech
Brown University
Stanford Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harvard College, SRI International Inc, California Institute of Technology CalTech, Brown University, Stanford Research Institute filed Critical Harvard College
Publication of DE60313462D1 publication Critical patent/DE60313462D1/de
Application granted granted Critical
Publication of DE60313462T2 publication Critical patent/DE60313462T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N99/00—Subject matter not provided for in other groups of this subclass
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G11C13/025—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0673—Nanowires or nanotubes oriented parallel to a substrate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/81—Array wherein the array conductors, e.g. word lines, bit lines, are made of nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/762—Nanowire or quantum wire, i.e. axially elongated structure having two dimensions of 100 nm or less
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/943—Information storage or retrieval using nanostructure
DE60313462T 2002-07-25 2003-07-24 Sublithographische nanobereichs-speicherarchitektur Expired - Lifetime DE60313462T2 (de)

Applications Claiming Priority (15)

Application Number Priority Date Filing Date Title
US465357P 2000-01-28
US39894302P 2002-07-25 2002-07-25
US398943P 2002-07-25
US40039402P 2002-08-01 2002-08-01
US400394P 2002-08-01
US41517602P 2002-09-30 2002-09-30
US415176P 2002-09-30
US42901002P 2002-11-25 2002-11-25
US429010P 2002-11-25
US44199503P 2003-01-23 2003-01-23
US441995P 2003-01-23
US46535703P 2003-04-25 2003-04-25
US46738803P 2003-05-02 2003-05-02
US467388P 2003-05-02
PCT/US2003/023199 WO2004034467A2 (en) 2002-07-25 2003-07-24 Sublithographic nanoscale memory architecture

Publications (2)

Publication Number Publication Date
DE60313462D1 true DE60313462D1 (de) 2007-06-06
DE60313462T2 DE60313462T2 (de) 2008-01-03

Family

ID=32097212

Family Applications (2)

Application Number Title Priority Date Filing Date
DE60313462T Expired - Lifetime DE60313462T2 (de) 2002-07-25 2003-07-24 Sublithographische nanobereichs-speicherarchitektur
DE60325903T Expired - Lifetime DE60325903D1 (de) 2002-07-25 2003-07-24 Dreidimensionales Speicher-Array

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE60325903T Expired - Lifetime DE60325903D1 (de) 2002-07-25 2003-07-24 Dreidimensionales Speicher-Array

Country Status (7)

Country Link
US (2) US6900479B2 (de)
EP (3) EP1758126A3 (de)
JP (2) JP2005539404A (de)
AT (2) ATE421147T1 (de)
AU (2) AU2003298529A1 (de)
DE (2) DE60313462T2 (de)
WO (2) WO2004061859A2 (de)

Families Citing this family (73)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7301199B2 (en) * 2000-08-22 2007-11-27 President And Fellows Of Harvard College Nanoscale wires and related devices
US20060175601A1 (en) * 2000-08-22 2006-08-10 President And Fellows Of Harvard College Nanoscale wires and related devices
CN101798057A (zh) * 2000-08-22 2010-08-11 哈佛学院董事会 生长半导体纳米线的方法
CA2430888C (en) * 2000-12-11 2013-10-22 President And Fellows Of Harvard College Nanosensors
AU2003216070A1 (en) * 2002-01-18 2003-09-02 California Institute Of Technology Array-based architecture for molecular electronics
JP2005539404A (ja) * 2002-07-25 2005-12-22 カリフォルニア インスティテュート オヴ テクノロジー サブパターン転写ナノスケールメモリ構造
EP1388521B1 (de) * 2002-08-08 2006-06-07 Sony Deutschland GmbH Verfahren zur Herstellung einer Kreuzschienenstruktur von Nanodrähten
AU2003283973B2 (en) 2002-09-30 2008-10-30 Oned Material Llc Large-area nanoenabled macroelectronic substrates and uses therefor
US7135728B2 (en) * 2002-09-30 2006-11-14 Nanosys, Inc. Large-area nanoenabled macroelectronic substrates and uses therefor
WO2004109706A2 (en) 2003-06-02 2004-12-16 California Institute Of Technology Nanoscale wire-based sublithographic programmable logic arrays
US7242601B2 (en) 2003-06-02 2007-07-10 California Institute Of Technology Deterministic addressing of nanoscale devices assembled at sublithographic pitches
US7692952B2 (en) 2003-07-24 2010-04-06 California Institute Of Technology Nanoscale wire coding for stochastic assembly
WO2005084164A2 (en) * 2003-08-13 2005-09-15 Nantero, Inc. Nanotube-based switching elements and logic circuits
US7018549B2 (en) * 2003-12-29 2006-03-28 Intel Corporation Method of fabricating multiple nanowires of uniform length from a single catalytic nanoparticle
US20090227107A9 (en) * 2004-02-13 2009-09-10 President And Fellows Of Havard College Nanostructures Containing Metal Semiconductor Compounds
US7310004B2 (en) * 2004-05-28 2007-12-18 California Institute Of Technology Apparatus and method of interconnecting nanoscale programmable logic array clusters
US20070264623A1 (en) * 2004-06-15 2007-11-15 President And Fellows Of Harvard College Nanosensors
WO2006003620A1 (en) * 2004-06-30 2006-01-12 Koninklijke Philips Electronics N.V. Method for manufacturing an electric device with a layer of conductive material contacted by nanowire
US7495942B2 (en) 2004-08-13 2009-02-24 University Of Florida Research Foundation, Inc. Nanoscale content-addressable memory
CA2581058C (en) * 2004-09-21 2012-06-26 Nantero, Inc. Resistive elements using carbon nanotubes
US7544977B2 (en) * 2006-01-27 2009-06-09 Hewlett-Packard Development Company, L.P. Mixed-scale electronic interface
JP2008523590A (ja) * 2004-12-06 2008-07-03 プレジデント・アンド・フェロウズ・オブ・ハーバード・カレッジ ナノスケールワイヤベースのデータ格納装置
US8072005B2 (en) * 2005-02-04 2011-12-06 Brown University Research Foundation Apparatus, method and computer program product providing radial addressing of nanowires
US8883568B2 (en) * 2008-06-10 2014-11-11 Brown University Research Foundation Method providing radial addressing of nanowires
US7211503B2 (en) * 2005-02-24 2007-05-01 Hewlett-Packard Development Company, L.P. Electronic devices fabricated by use of random connections
DE102005016244A1 (de) * 2005-04-08 2006-10-19 Infineon Technologies Ag Speicherzelle, Speichereinrichtung und Verfahren zu deren Herstellung
US7786467B2 (en) 2005-04-25 2010-08-31 Hewlett-Packard Development Company, L.P. Three-dimensional nanoscale crossbars
US20100227382A1 (en) * 2005-05-25 2010-09-09 President And Fellows Of Harvard College Nanoscale sensors
WO2006132659A2 (en) * 2005-06-06 2006-12-14 President And Fellows Of Harvard College Nanowire heterostructures
US7439731B2 (en) * 2005-06-24 2008-10-21 Crafts Douglas E Temporary planar electrical contact device and method using vertically-compressible nanotube contact structures
US7721242B2 (en) * 2005-12-20 2010-05-18 The Invention Science Fund 1, Llc Nanotube circuit analysis system and method
US7989797B2 (en) * 2005-12-20 2011-08-02 The Invention Science Fund I, Llc Connectible nanotube circuit
US7786465B2 (en) * 2005-12-20 2010-08-31 Invention Science Fund 1, Llc Deletable nanotube circuit
US9159417B2 (en) * 2005-12-20 2015-10-13 The Invention Science Fund I, Llc Deletable nanotube circuit
US7576565B2 (en) * 2006-04-03 2009-08-18 Blaise Laurent Mouttet Crossbar waveform driver circuit
US9965251B2 (en) * 2006-04-03 2018-05-08 Blaise Laurent Mouttet Crossbar arithmetic and summation processor
US20070233761A1 (en) * 2006-04-03 2007-10-04 Mouttet Blaise L Crossbar arithmetic processor
US7302513B2 (en) * 2006-04-03 2007-11-27 Blaise Laurent Mouttet Programmable crossbar signal processor
US8183554B2 (en) * 2006-04-03 2012-05-22 Blaise Laurent Mouttet Symmetrical programmable memresistor crossbar structure
WO2008051316A2 (en) 2006-06-12 2008-05-02 President And Fellows Of Harvard College Nanosensors and related technologies
US7763932B2 (en) * 2006-06-29 2010-07-27 International Business Machines Corporation Multi-bit high-density memory device and architecture and method of fabricating multi-bit high-density memory devices
TWI307677B (en) * 2006-07-18 2009-03-21 Applied Res Lab Method and device for fabricating nano-structure with patterned particle beam
US7393739B2 (en) * 2006-08-30 2008-07-01 International Business Machines Corporation Demultiplexers using transistors for accessing memory cell arrays
US8058640B2 (en) 2006-09-11 2011-11-15 President And Fellows Of Harvard College Branched nanoscale wires
JP2010503981A (ja) 2006-09-19 2010-02-04 クナノ アーベー ナノスケール電界効果トランジスタの構体
US8130007B2 (en) * 2006-10-16 2012-03-06 Formfactor, Inc. Probe card assembly with carbon nanotube probes having a spring mechanism therein
US7778061B2 (en) * 2006-10-16 2010-08-17 Hewlett-Packard Development Company, L.P. Crossbar-memory systems and methods for writing to and reading from crossbar memory junctions of crossbar-memory systems
WO2008060455A2 (en) 2006-11-09 2008-05-22 Nanosys, Inc. Methods for nanowire alignment and deposition
US8575663B2 (en) 2006-11-22 2013-11-05 President And Fellows Of Harvard College High-sensitivity nanoscale wire sensors
US9806273B2 (en) * 2007-01-03 2017-10-31 The United States Of America As Represented By The Secretary Of The Army Field effect transistor array using single wall carbon nano-tubes
US7608854B2 (en) * 2007-01-29 2009-10-27 Hewlett-Packard Development Company, L.P. Electronic device and method of making the same
US7763978B2 (en) * 2007-03-28 2010-07-27 Hewlett-Packard Development Company, L.P. Three-dimensional crossbar array systems and methods for writing information to and reading information stored in three-dimensional crossbar array junctions
US7872334B2 (en) * 2007-05-04 2011-01-18 International Business Machines Corporation Carbon nanotube diodes and electrostatic discharge circuits and methods
US7492624B2 (en) * 2007-06-29 2009-02-17 Stmicroelectronics S.R.L. Method and device for demultiplexing a crossbar non-volatile memory
US20110089400A1 (en) * 2008-04-15 2011-04-21 Qunano Ab Nanowire wrap gate devices
JP2012506621A (ja) * 2008-10-20 2012-03-15 ザ・リージェンツ・オブ・ザ・ユニバーシティ・オブ・ミシガン シリコン系ナノスケールクロスバーメモリ
US8390323B2 (en) 2009-04-30 2013-03-05 Hewlett-Packard Development Company, L.P. Dense nanoscale logic circuitry
JP2012528020A (ja) 2009-05-26 2012-11-12 ナノシス・インク． ナノワイヤおよび他のデバイスの電場沈着のための方法およびシステム
US9297796B2 (en) 2009-09-24 2016-03-29 President And Fellows Of Harvard College Bent nanowires and related probing of species
KR101161060B1 (ko) * 2009-11-30 2012-06-29 서강대학교산학협력단 나노입자를 기둥형태로 조직화시키기 위한 배열장치 및 그 배열방법
WO2011088340A2 (en) 2010-01-15 2011-07-21 Board Of Regents, The University Of Texas System A carbon nanotube crossbar based nano-architecture
WO2011093863A1 (en) 2010-01-29 2011-08-04 Hewlett-Packard Development Company, L.P. Three dimensional multilayer circuit
US7982504B1 (en) 2010-01-29 2011-07-19 Hewlett Packard Development Company, L.P. Interconnection architecture for multilayer circuits
US9368599B2 (en) * 2010-06-22 2016-06-14 International Business Machines Corporation Graphene/nanostructure FET with self-aligned contact and gate
US8872176B2 (en) 2010-10-06 2014-10-28 Formfactor, Inc. Elastic encapsulated carbon nanotube based electrical contacts
US9273004B2 (en) 2011-09-29 2016-03-01 International Business Machines Corporation Selective placement of carbon nanotubes via coulombic attraction of oppositely charged carbon nanotubes and self-assembled monolayers
US9442695B2 (en) 2014-05-02 2016-09-13 International Business Machines Corporation Random bit generator based on nanomaterials
US9720772B2 (en) * 2015-03-04 2017-08-01 Kabushiki Kaisha Toshiba Memory system, method for controlling magnetic memory, and device for controlling magnetic memory
CN107564946A (zh) * 2016-07-01 2018-01-09 清华大学 纳米晶体管
CN107564910B (zh) * 2016-07-01 2020-08-11 清华大学 半导体器件
CN107564917B (zh) * 2016-07-01 2020-06-09 清华大学 纳米异质结构
CN107564947A (zh) * 2016-07-01 2018-01-09 清华大学 纳米异质结构
US11943940B2 (en) 2018-07-11 2024-03-26 The Regents Of The University Of California Nucleic acid-based electrically readable, read-only memory

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000048195A1 (en) * 1999-02-12 2000-08-17 Board Of Trustees Operating Michigan State University Nanocapsules containing charged particles, their uses and methods of forming the same
US6128214A (en) * 1999-03-29 2000-10-03 Hewlett-Packard Molecular wire crossbar memory
US6314019B1 (en) * 1999-03-29 2001-11-06 Hewlett-Packard Company Molecular-wire crossbar interconnect (MWCI) for signal routing and communications
US6256767B1 (en) * 1999-03-29 2001-07-03 Hewlett-Packard Company Demultiplexer for a molecular wire crossbar network (MWCN DEMUX)
US6383784B1 (en) 1999-12-03 2002-05-07 City Of Hope Construction of nucleoprotein based assemblies comprising addressable components for nanoscale assembly and nanoprocessors
EP1299914B1 (de) * 2000-07-04 2008-04-02 Qimonda AG Feldeffekttransistor
US7301199B2 (en) 2000-08-22 2007-11-27 President And Fellows Of Harvard College Nanoscale wires and related devices
AU2001297881A1 (en) 2000-11-01 2003-01-02 James J. Myrick Nanoelectronic interconnection and addressing
TW554388B (en) * 2001-03-30 2003-09-21 Univ California Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
US6777982B2 (en) * 2001-04-03 2004-08-17 Carnegie Mellon University Molecular scale latch and associated clocking scheme to provide gain, memory and I/O isolation
US6385075B1 (en) * 2001-06-05 2002-05-07 Hewlett-Packard Company Parallel access of cross-point diode memory arrays
US6706402B2 (en) * 2001-07-25 2004-03-16 Nantero, Inc. Nanotube films and articles
AU2003216070A1 (en) * 2002-01-18 2003-09-02 California Institute Of Technology Array-based architecture for molecular electronics
US6760245B2 (en) 2002-05-01 2004-07-06 Hewlett-Packard Development Company, L.P. Molecular wire crossbar flash memory
JP2005539404A (ja) * 2002-07-25 2005-12-22 カリフォルニア インスティテュート オヴ テクノロジー サブパターン転写ナノスケールメモリ構造
US6682951B1 (en) * 2002-09-26 2004-01-27 International Business Machines Corporation Arrangements of microscopic particles for performing logic computations, and method of use

Also Published As

Publication number Publication date
ATE421147T1 (de) 2009-01-15
AU2003298529A1 (en) 2004-07-29
WO2004061859A3 (en) 2005-02-03
ATE360873T1 (de) 2007-05-15
WO2004034467A2 (en) 2004-04-22
EP1758126A2 (de) 2007-02-28
EP1758126A3 (de) 2007-03-14
EP1525586A2 (de) 2005-04-27
DE60313462T2 (de) 2008-01-03
US20040113138A1 (en) 2004-06-17
AU2003298530A8 (en) 2004-05-04
EP1525585A2 (de) 2005-04-27
US20040113139A1 (en) 2004-06-17
US6900479B2 (en) 2005-05-31
WO2004061859A2 (en) 2004-07-22
US6963077B2 (en) 2005-11-08
DE60325903D1 (de) 2009-03-05
EP1525586B1 (de) 2007-04-25
JP2005539404A (ja) 2005-12-22
AU2003298529A8 (en) 2004-07-29
JP2006512782A (ja) 2006-04-13
WO2004034467A3 (en) 2004-08-26
AU2003298530A1 (en) 2004-05-04

Similar Documents

Publication Publication Date Title
DE60313462D1 (de) Sublithographische nanobereichs-speicherarchitektur
JP2002519182A5 (de)
WO2003021613A3 (en) Electromechanical memory array using nanotube ribbons and method for making same
MY141568A (en) Semiconductor device and method of manufacturing the same
EP1870948A3 (de) Organische Elektrolumineszenzvorrichtung
ATE470223T1 (de) Speichergerät und verfahren mit einem datenweg mit mehreren vorabruf-e/a-konfigurationen
ATE444365T1 (de) Interleukin-17 verwandte zytokine aus säugetieren. dafür kodierende polynukleotide. verwendungen
JP2005501564A5 (de)
EP1533843A3 (de) Elektrolumineszente Vorrichtung mit niederohmigen Zuleitungen
DE602004012496D1 (de) Spielzeug
JP2004023739A5 (de)
ES2139527B1 (es) "gato"
Friedman Working out the kinks: Advancing the pornography debate
DE29705738U1 (de) Reinigungs-Dachplatte
TH13247S1 (th) รางสายไฟ
TH47652S (th) รางสายไฟ
SE0201003L (sv) Industrirobot
TH47235EX (th) เทียน(ไฟฟ้า)
TH47234EX (th) เทียน (ไฟฟ้า)
TH60435S (th) อุปกรณ์ทำให้สารเคมีระเหย
TH15864S1 (de)
TH47235S (th) เทียน(ไฟฟ้า)
TH15865S1 (th) เทียน(ไฟฟ้า)
TH47234S (de)
TH52273S (th) ดินสอ

Legal Events

Date Code Title Description
8364 No opposition during term of opposition