DE60319310D1 - Gatterdielektrikum und Verfahren - Google Patents

Gatterdielektrikum und Verfahren

Info

Publication number
DE60319310D1
DE60319310D1 DE60319310T DE60319310T DE60319310D1 DE 60319310 D1 DE60319310 D1 DE 60319310D1 DE 60319310 T DE60319310 T DE 60319310T DE 60319310 T DE60319310 T DE 60319310T DE 60319310 D1 DE60319310 D1 DE 60319310D1
Authority
DE
Germany
Prior art keywords
gate dielectric
dielectric
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60319310T
Other languages
English (en)
Other versions
DE60319310T2 (de
Inventor
Antonio L P Rotondaro
Luigi Colombo
Malcolm J Bevan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE60319310D1 publication Critical patent/DE60319310D1/de
Publication of DE60319310T2 publication Critical patent/DE60319310T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823842Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823857Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
DE60319310T 2002-07-31 2003-07-10 Gatterdielektrikum und Verfahren Expired - Lifetime DE60319310T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US210421 1994-03-16
US10/210,421 US6919251B2 (en) 2002-07-31 2002-07-31 Gate dielectric and method

Publications (2)

Publication Number Publication Date
DE60319310D1 true DE60319310D1 (de) 2008-04-10
DE60319310T2 DE60319310T2 (de) 2009-03-19

Family

ID=30115237

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60319310T Expired - Lifetime DE60319310T2 (de) 2002-07-31 2003-07-10 Gatterdielektrikum und Verfahren

Country Status (4)

Country Link
US (2) US6919251B2 (de)
EP (1) EP1387399B1 (de)
JP (1) JP2004111922A (de)
DE (1) DE60319310T2 (de)

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Also Published As

Publication number Publication date
US20050205948A1 (en) 2005-09-22
US6919251B2 (en) 2005-07-19
JP2004111922A (ja) 2004-04-08
US7423326B2 (en) 2008-09-09
EP1387399B1 (de) 2008-02-27
EP1387399A3 (de) 2004-12-15
EP1387399A2 (de) 2004-02-04
DE60319310T2 (de) 2009-03-19
US20040023462A1 (en) 2004-02-05

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