DE69006609T2 - Keramischer Deckel zum Verschliessen eines Halbleiterelements und Verfahren zum Verschliessen eines Halbleiterelements in einer keramischen Packung. - Google Patents

Keramischer Deckel zum Verschliessen eines Halbleiterelements und Verfahren zum Verschliessen eines Halbleiterelements in einer keramischen Packung.

Info

Publication number
DE69006609T2
DE69006609T2 DE69006609T DE69006609T DE69006609T2 DE 69006609 T2 DE69006609 T2 DE 69006609T2 DE 69006609 T DE69006609 T DE 69006609T DE 69006609 T DE69006609 T DE 69006609T DE 69006609 T2 DE69006609 T2 DE 69006609T2
Authority
DE
Germany
Prior art keywords
closing
semiconductor element
ceramic
lid
ceramic package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69006609T
Other languages
English (en)
Other versions
DE69006609D1 (de
Inventor
Takehiro Kajihara
Toshio Ohashi
Koichiro Maekawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
Original Assignee
NGK Insulators Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd filed Critical NGK Insulators Ltd
Application granted granted Critical
Publication of DE69006609D1 publication Critical patent/DE69006609D1/de
Publication of DE69006609T2 publication Critical patent/DE69006609T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
DE69006609T 1989-03-15 1990-03-13 Keramischer Deckel zum Verschliessen eines Halbleiterelements und Verfahren zum Verschliessen eines Halbleiterelements in einer keramischen Packung. Expired - Fee Related DE69006609T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6089589 1989-03-15

Publications (2)

Publication Number Publication Date
DE69006609D1 DE69006609D1 (de) 1994-03-24
DE69006609T2 true DE69006609T2 (de) 1994-06-30

Family

ID=13155549

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69006609T Expired - Fee Related DE69006609T2 (de) 1989-03-15 1990-03-13 Keramischer Deckel zum Verschliessen eines Halbleiterelements und Verfahren zum Verschliessen eines Halbleiterelements in einer keramischen Packung.

Country Status (3)

Country Link
US (1) US5122862A (de)
EP (1) EP0388157B1 (de)
DE (1) DE69006609T2 (de)

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US5230759A (en) * 1989-10-20 1993-07-27 Fujitsu Limited Process for sealing a semiconductor device
DE69232912T2 (de) * 1991-11-28 2003-12-24 Toshiba Kawasaki Kk Halbleitergehäuse
US5804870A (en) * 1992-06-26 1998-09-08 Staktek Corporation Hermetically sealed integrated circuit lead-on package configuration
US5702985A (en) * 1992-06-26 1997-12-30 Staktek Corporation Hermetically sealed ceramic integrated circuit heat dissipating package fabrication method
US5958100A (en) * 1993-06-03 1999-09-28 Micron Technology, Inc. Process of making a glass semiconductor package
KR100201384B1 (ko) * 1995-10-19 1999-06-15 구본준 투명창을구비한반도체패키지및그제조방법
JPH1131751A (ja) * 1997-07-10 1999-02-02 Sony Corp 中空パッケージとその製造方法
US6531334B2 (en) 1997-07-10 2003-03-11 Sony Corporation Method for fabricating hollow package with a solid-state image device
DE19831570A1 (de) * 1998-07-14 2000-01-20 Siemens Ag Biometrischer Sensor und Verfahren zu dessen Herstellung
US6323060B1 (en) 1999-05-05 2001-11-27 Dense-Pac Microsystems, Inc. Stackable flex circuit IC package and method of making same
US6274927B1 (en) * 1999-06-03 2001-08-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
US6262895B1 (en) 2000-01-13 2001-07-17 John A. Forthun Stackable chip package with flex carrier
US6974517B2 (en) * 2001-06-13 2005-12-13 Raytheon Company Lid with window hermetically sealed to frame, and a method of making it
US6861720B1 (en) 2001-08-29 2005-03-01 Amkor Technology, Inc. Placement template and method for placing optical dies
US7656678B2 (en) 2001-10-26 2010-02-02 Entorian Technologies, Lp Stacked module systems
US7310458B2 (en) 2001-10-26 2007-12-18 Staktek Group L.P. Stacked module systems and methods
US7485951B2 (en) 2001-10-26 2009-02-03 Entorian Technologies, Lp Modularized die stacking system and method
US7202555B2 (en) 2001-10-26 2007-04-10 Staktek Group L.P. Pitch change and chip scale stacking system and method
US20030234443A1 (en) 2001-10-26 2003-12-25 Staktek Group, L.P. Low profile stacking system and method
US6940729B2 (en) 2001-10-26 2005-09-06 Staktek Group L.P. Integrated circuit stacking system and method
US7371609B2 (en) 2001-10-26 2008-05-13 Staktek Group L.P. Stacked module systems and methods
US6956284B2 (en) 2001-10-26 2005-10-18 Staktek Group L.P. Integrated circuit stacking system and method
US6914324B2 (en) 2001-10-26 2005-07-05 Staktek Group L.P. Memory expansion and chip scale stacking system and method
US20060255446A1 (en) 2001-10-26 2006-11-16 Staktek Group, L.P. Stacked modules and method
US7026708B2 (en) 2001-10-26 2006-04-11 Staktek Group L.P. Low profile chip scale stacking system and method
US7053478B2 (en) 2001-10-26 2006-05-30 Staktek Group L.P. Pitch change and chip scale stacking system
US6745449B2 (en) * 2001-11-06 2004-06-08 Raytheon Company Method and apparatus for making a lid with an optically transmissive window
US7081373B2 (en) 2001-12-14 2006-07-25 Staktek Group, L.P. CSP chip stack with flex circuit
US6784534B1 (en) 2002-02-06 2004-08-31 Amkor Technology, Inc. Thin integrated circuit package having an optically transparent window
US6988338B1 (en) 2002-10-10 2006-01-24 Raytheon Company Lid with a thermally protected window
US20040245590A1 (en) * 2003-06-05 2004-12-09 Jackson Hsieh Image sensor package
US20040245589A1 (en) * 2003-06-05 2004-12-09 Jackson Hsieh Substrate structure for a photosensitive chip package
US7542304B2 (en) * 2003-09-15 2009-06-02 Entorian Technologies, Lp Memory expansion and integrated circuit stacking system and method
US7309914B2 (en) * 2005-01-20 2007-12-18 Staktek Group L.P. Inverted CSP stacking system and method
US7033861B1 (en) 2005-05-18 2006-04-25 Staktek Group L.P. Stacked module systems and method
US7576995B2 (en) 2005-11-04 2009-08-18 Entorian Technologies, Lp Flex circuit apparatus and method for adding capacitance while conserving circuit board surface area
US7508058B2 (en) 2006-01-11 2009-03-24 Entorian Technologies, Lp Stacked integrated circuit module
US7608920B2 (en) 2006-01-11 2009-10-27 Entorian Technologies, Lp Memory card and method for devising
US7605454B2 (en) 2006-01-11 2009-10-20 Entorian Technologies, Lp Memory card and method for devising
US7304382B2 (en) 2006-01-11 2007-12-04 Staktek Group L.P. Managed memory component
US7508069B2 (en) 2006-01-11 2009-03-24 Entorian Technologies, Lp Managed memory component
US7468553B2 (en) 2006-10-20 2008-12-23 Entorian Technologies, Lp Stackable micropackages and stacked modules
US7417310B2 (en) 2006-11-02 2008-08-26 Entorian Technologies, Lp Circuit module having force resistant construction
CN101589454B (zh) * 2006-12-12 2012-05-16 怡得乐Qlp公司 电子元件的塑料封装体
WO2008126661A1 (ja) * 2007-04-11 2008-10-23 Murata Manufacturing Co., Ltd. 多層セラミック基板およびその製造方法
US10014189B2 (en) * 2015-06-02 2018-07-03 Ngk Spark Plug Co., Ltd. Ceramic package with brazing material near seal member
CN106252289B (zh) * 2016-09-29 2019-02-01 山东盛品电子技术有限公司 一种提高气密性的塑封管壳产品及制备方法
US10199302B1 (en) 2017-08-07 2019-02-05 Nxp Usa, Inc. Molded air cavity packages and methods for the production thereof
US10629518B2 (en) 2018-08-29 2020-04-21 Nxp Usa, Inc. Internally-shielded microelectronic packages and methods for the fabrication thereof

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Publication number Priority date Publication date Assignee Title
JPS5844749A (ja) * 1981-09-11 1983-03-15 Nec Corp 半導体装置用キヤツプ及びその製造方法
JPS61194751A (ja) * 1985-02-25 1986-08-29 Hitachi Ltd 半導体装置
US4704626A (en) * 1985-07-08 1987-11-03 Olin Corporation Graded sealing systems for semiconductor package
US4730203A (en) * 1985-08-10 1988-03-08 Futaba Denshi Kogyo Kabushiki Kaisha Write head for an optical printer
US4761518A (en) * 1987-01-20 1988-08-02 Olin Corporation Ceramic-glass-metal packaging for electronic components incorporating unique leadframe designs
JPS63242964A (ja) * 1987-03-31 1988-10-07 日本碍子株式会社 アルミナセラミックスの製造方法

Also Published As

Publication number Publication date
US5122862A (en) 1992-06-16
EP0388157B1 (de) 1994-02-16
DE69006609D1 (de) 1994-03-24
EP0388157A1 (de) 1990-09-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee