DE69028738D1 - Einrichtung zur Übertragung von digitalen Daten in Analogform - Google Patents

Einrichtung zur Übertragung von digitalen Daten in Analogform

Info

Publication number
DE69028738D1
DE69028738D1 DE69028738T DE69028738T DE69028738D1 DE 69028738 D1 DE69028738 D1 DE 69028738D1 DE 69028738 T DE69028738 T DE 69028738T DE 69028738 T DE69028738 T DE 69028738T DE 69028738 D1 DE69028738 D1 DE 69028738D1
Authority
DE
Germany
Prior art keywords
analog
digital
receiver
transmitter
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69028738T
Other languages
English (en)
Other versions
DE69028738T2 (de
Inventor
Salvatore Arcuri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE69028738D1 publication Critical patent/DE69028738D1/de
Application granted granted Critical
Publication of DE69028738T2 publication Critical patent/DE69028738T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0614—Systems characterised by the synchronising information used the synchronising signal being characterised by the amplitude, duration or polarity
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/02—Channels characterised by the type of signal
    • H04L5/04—Channels characterised by the type of signal the signals being represented by different amplitudes or polarities, e.g. quadriplex
DE69028738T 1989-07-06 1990-05-31 Einrichtung zur Übertragung von digitalen Daten in Analogform Expired - Fee Related DE69028738T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/376,882 US5115450A (en) 1989-07-06 1989-07-06 High speed digital to analog to digital communication system

Publications (2)

Publication Number Publication Date
DE69028738D1 true DE69028738D1 (de) 1996-11-07
DE69028738T2 DE69028738T2 (de) 1997-04-10

Family

ID=23486883

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69028738T Expired - Fee Related DE69028738T2 (de) 1989-07-06 1990-05-31 Einrichtung zur Übertragung von digitalen Daten in Analogform

Country Status (6)

Country Link
US (1) US5115450A (de)
EP (1) EP0407031B1 (de)
JP (1) JPH03132122A (de)
AT (1) ATE143756T1 (de)
DE (1) DE69028738T2 (de)
ES (1) ES2091795T3 (de)

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US7161513B2 (en) * 1999-10-19 2007-01-09 Rambus Inc. Apparatus and method for improving resolution of a current mode driver
US7269212B1 (en) 2000-09-05 2007-09-11 Rambus Inc. Low-latency equalization in multi-level, multi-line communication systems
US7564866B2 (en) * 2000-07-21 2009-07-21 Broadcom Corporation Methods and systems for digitally processing optical data signals
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DE10041380A1 (de) * 2000-08-23 2002-03-14 Infineon Technologies Ag Verfahren und Vorrichtung zum Datenaustausch zwischen Speicher- und Logikbausteinen
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US7173551B2 (en) * 2000-12-21 2007-02-06 Quellan, Inc. Increasing data throughput in optical fiber transmission systems
US7082484B2 (en) * 2001-01-16 2006-07-25 International Business Machines Corporation Architecture for advanced serial link between two cards
US7149256B2 (en) 2001-03-29 2006-12-12 Quellan, Inc. Multilevel pulse position modulation for efficient fiber optic communication
US7307569B2 (en) * 2001-03-29 2007-12-11 Quellan, Inc. Increasing data throughput in optical fiber transmission systems
ATE492076T1 (de) * 2001-04-04 2011-01-15 Quellan Inc Verfahren und system zum decodieren von mehrpegelsignalen
US20030030873A1 (en) * 2001-05-09 2003-02-13 Quellan, Inc. High-speed adjustable multilevel light modulation
US7376767B1 (en) * 2002-01-04 2008-05-20 Xilinx, Inc. Distributed buffering system having programmable interconnecting logic and applications thereof
US7212580B2 (en) * 2002-02-15 2007-05-01 Quellan, Inc. Multi-level signal clock recovery technique
WO2003077423A2 (en) 2002-03-08 2003-09-18 Quellan, Inc. High speed analog-to-digital converter using a unique gray code having minimal bit transitions
WO2003092237A1 (en) * 2002-04-23 2003-11-06 Quellan, Inc. Combined ask/dpsk modulation system
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US7292629B2 (en) 2002-07-12 2007-11-06 Rambus Inc. Selectable-tap equalizer
US7362800B1 (en) 2002-07-12 2008-04-22 Rambus Inc. Auto-configured equalizer
US8861667B1 (en) 2002-07-12 2014-10-14 Rambus Inc. Clock data recovery circuit with equalizer clock calibration
AU2003256569A1 (en) 2002-07-15 2004-02-02 Quellan, Inc. Adaptive noise filtering and equalization
US7069454B1 (en) * 2002-07-24 2006-06-27 Apple Computer, Inc. System and method for deactivating a first device from a second device
US7934144B2 (en) * 2002-11-12 2011-04-26 Quellan, Inc. High-speed analog-to-digital conversion with improved robustness to timing uncertainty
US7804760B2 (en) * 2003-08-07 2010-09-28 Quellan, Inc. Method and system for signal emulation
US7050388B2 (en) * 2003-08-07 2006-05-23 Quellan, Inc. Method and system for crosstalk cancellation
US7308058B2 (en) * 2003-10-27 2007-12-11 Rambus Inc. Transparent multi-mode PAM interface
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US7616700B2 (en) * 2003-12-22 2009-11-10 Quellan, Inc. Method and system for slicing a communication signal
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US7522883B2 (en) 2004-12-14 2009-04-21 Quellan, Inc. Method and system for reducing signal interference
US7842355B2 (en) * 2005-11-01 2010-11-30 Applied Materials, Inc. System and method for modulation of power and power related functions of PECVD discharge sources to achieve new film properties
US9252983B2 (en) * 2006-04-26 2016-02-02 Intersil Americas LLC Method and system for reducing radiated emissions from a communications channel
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US11403241B2 (en) 2017-10-02 2022-08-02 Micron Technology, Inc. Communicating data with stacked memory dies
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Also Published As

Publication number Publication date
EP0407031A3 (en) 1991-11-27
US5115450A (en) 1992-05-19
JPH03132122A (ja) 1991-06-05
DE69028738T2 (de) 1997-04-10
ES2091795T3 (es) 1996-11-16
ATE143756T1 (de) 1996-10-15
EP0407031B1 (de) 1996-10-02
EP0407031A2 (de) 1991-01-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee