DE69028941T2 - Elektronische Schaltung zur analogen Multiplikation, differentiellen Verstärkung oder Ladungsakkumulation - Google Patents
Elektronische Schaltung zur analogen Multiplikation, differentiellen Verstärkung oder LadungsakkumulationInfo
- Publication number
- DE69028941T2 DE69028941T2 DE69028941T DE69028941T DE69028941T2 DE 69028941 T2 DE69028941 T2 DE 69028941T2 DE 69028941 T DE69028941 T DE 69028941T DE 69028941 T DE69028941 T DE 69028941T DE 69028941 T2 DE69028941 T2 DE 69028941T2
- Authority
- DE
- Germany
- Prior art keywords
- electronic circuit
- charge accumulation
- differential amplification
- analog multiplication
- multiplication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
- G06N3/065—Analogue means
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8470589A JP2823229B2 (ja) | 1989-04-05 | 1989-04-05 | 電子回路、差動増幅回路、及びアナログ乗算回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69028941D1 DE69028941D1 (de) | 1996-11-28 |
DE69028941T2 true DE69028941T2 (de) | 1997-03-27 |
Family
ID=13838077
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69028941T Expired - Fee Related DE69028941T2 (de) | 1989-04-05 | 1990-04-02 | Elektronische Schaltung zur analogen Multiplikation, differentiellen Verstärkung oder Ladungsakkumulation |
Country Status (4)
Country | Link |
---|---|
US (1) | US5021693A (de) |
EP (1) | EP0395894B1 (de) |
JP (1) | JP2823229B2 (de) |
DE (1) | DE69028941T2 (de) |
Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2662559B2 (ja) * | 1989-06-02 | 1997-10-15 | 直 柴田 | 半導体装置 |
US5594372A (en) * | 1989-06-02 | 1997-01-14 | Shibata; Tadashi | Source follower using NMOS and PMOS transistors |
US5621336A (en) * | 1989-06-02 | 1997-04-15 | Shibata; Tadashi | Neuron circuit |
KR950001601B1 (ko) * | 1990-07-09 | 1995-02-27 | 니폰 덴신 덴와 가부시끼가시야 | 뉴-럴 네트워크 회로 |
IT1242142B (it) * | 1990-09-20 | 1994-02-16 | Texas Instruments Italia Spa | Resistore variabile non volatile, realizzato in circuito integrato, in particolare per la composizione di reti neuronali |
US5353382A (en) * | 1990-10-15 | 1994-10-04 | California Institute Of Technology | Programmable synapse for neural network applications |
US5615305A (en) * | 1990-11-08 | 1997-03-25 | Hughes Missile Systems Company | Neural processor element |
US5247606A (en) * | 1990-12-26 | 1993-09-21 | Intel Corporation | Adaptively setting analog weights in a neural network and the like |
TW203665B (de) * | 1991-03-21 | 1993-04-11 | Shibata Naoru | |
US5204549A (en) * | 1992-01-28 | 1993-04-20 | Synaptics, Incorporated | Synaptic element including weight-storage and weight-adjustment circuit |
GB9204434D0 (en) * | 1992-02-27 | 1992-04-15 | Sec Dep For The Defence | Differential amplifier |
US5247478A (en) * | 1992-03-06 | 1993-09-21 | Altera Corporation | Programmable transfer-devices |
US5237210A (en) * | 1992-03-12 | 1993-08-17 | Intel Corporation | Neural network accomodating parallel synaptic weight adjustments for correlation learning algorithms |
US5247206A (en) * | 1992-03-12 | 1993-09-21 | Intel Corporation | Neural network accommodating parallel synaptic weight adjustments in a single cycle |
US5298796A (en) * | 1992-07-08 | 1994-03-29 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Nonvolatile programmable neural network synaptic array |
JPH0677426A (ja) * | 1992-08-26 | 1994-03-18 | Sunao Shibata | 半導体集積回路 |
US5479574A (en) * | 1993-04-01 | 1995-12-26 | Nestor, Inc. | Method and apparatus for adaptive classification |
DE4415859C2 (de) * | 1994-05-05 | 1998-12-17 | Bosch Gmbh Robert | Schaltung zum Multiplizieren zweier Signale |
US5562873A (en) * | 1994-08-15 | 1996-10-08 | Matrex Furniture Components, Inc. | Method for forming a cushion |
US5587682A (en) * | 1995-03-30 | 1996-12-24 | Sgs-Thomson Microelectronics S.R.L. | Four-quadrant biCMOS analog multiplier |
US5923205A (en) * | 1995-03-31 | 1999-07-13 | Tadashi Shibata | Semiconductor arithmetic circuit |
US5581501A (en) * | 1995-08-17 | 1996-12-03 | Altera Corporation | Nonvolatile SRAM cells and cell arrays |
EP0768610B1 (de) * | 1995-10-13 | 2000-08-09 | STMicroelectronics S.r.l. | Niederspannungsneuronalnetzwerk mit sehr niedrigem Leistungsverbrauch |
EP0782250B1 (de) * | 1995-12-29 | 2001-05-30 | STMicroelectronics S.r.l. | Verfahren und Schaltung zur Kompensation von Offsetspannungen in MOS-Differenzstufen |
US5768700A (en) * | 1996-03-14 | 1998-06-16 | Advanced Micro Devices, Inc. | High conversion gain CMOS mixer |
US6005806A (en) * | 1996-03-14 | 1999-12-21 | Altera Corporation | Nonvolatile configuration cells and cell arrays |
US5949710A (en) * | 1996-04-10 | 1999-09-07 | Altera Corporation | Programmable interconnect junction |
US5959891A (en) * | 1996-08-16 | 1999-09-28 | Altera Corporation | Evaluation of memory cell characteristics |
US6018476A (en) * | 1996-09-16 | 2000-01-25 | Altera Corporation | Nonvolatile configuration cells and cell arrays |
US6236597B1 (en) | 1996-09-16 | 2001-05-22 | Altera Corporation | Nonvolatile memory cell with multiple gate oxide thicknesses |
US5914904A (en) * | 1996-10-01 | 1999-06-22 | Altera Corporation | Compact electrically erasable memory cells and arrays |
JPH10177612A (ja) * | 1996-10-16 | 1998-06-30 | Hiroto Yasuura | 論理演算回路 |
US6600363B2 (en) * | 2001-04-05 | 2003-07-29 | Cornell Research Foundation, Inc. | Folded floating-gate differential pair amplifier |
WO2004088476A2 (en) | 2003-03-27 | 2004-10-14 | University Of Washington | Performing predictive pricing based on historical data |
US7320737B2 (en) * | 2003-10-31 | 2008-01-22 | Tiger Sales, Inc. | Cushion forming apparatus and method of use |
US20070198308A1 (en) * | 2006-02-17 | 2007-08-23 | Hugh Crean | Travel information route map |
US8484057B2 (en) * | 2006-02-17 | 2013-07-09 | Microsoft Corporation | Travel information departure date/duration grid |
US20070198307A1 (en) * | 2006-02-17 | 2007-08-23 | Hugh Crean | Travel information future fare graph |
US8374895B2 (en) * | 2006-02-17 | 2013-02-12 | Farecast, Inc. | Travel information interval grid |
US8392224B2 (en) * | 2006-02-17 | 2013-03-05 | Microsoft Corporation | Travel information fare history graph |
US8200514B1 (en) | 2006-02-17 | 2012-06-12 | Farecast, Inc. | Travel-related prediction system |
US7797187B2 (en) * | 2006-11-13 | 2010-09-14 | Farecast, Inc. | System and method of protecting prices |
US20080228658A1 (en) * | 2007-03-13 | 2008-09-18 | Hugh Crean | Deal identification system |
US20090063167A1 (en) * | 2007-08-28 | 2009-03-05 | Jay Bartot | Hotel rate analytic system |
US8266085B1 (en) | 2012-02-06 | 2012-09-11 | The United States Of America As Represented By The Secretary Of The Army | Apparatus and method for using analog circuits to embody non-lipschitz mathematics and properties using attractor and repulsion modes |
WO2018047213A1 (en) | 2016-09-09 | 2018-03-15 | National Institute Of Advanced Industrial Science And Technology | Variable gain amplifier |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5216943A (en) * | 1975-07-30 | 1977-02-08 | Hitachi Ltd | Analog operation circuit |
US4663740A (en) * | 1985-07-01 | 1987-05-05 | Silicon Macrosystems Incorporated | High speed eprom cell and array |
US5055897A (en) * | 1988-07-27 | 1991-10-08 | Intel Corporation | Semiconductor cell for neural network and the like |
ES2045047T3 (es) * | 1988-08-31 | 1994-01-16 | Siemens Ag | Multiplicador de cuatro cuadrantes de entradas multiples. |
US4956564A (en) * | 1989-07-13 | 1990-09-11 | Intel Corporation | Adaptive synapse cell providing both excitatory and inhibitory connections in an associative network |
US4961002A (en) * | 1989-07-13 | 1990-10-02 | Intel Corporation | Synapse cell employing dual gate transistor structure |
-
1989
- 1989-04-05 JP JP8470589A patent/JP2823229B2/ja not_active Expired - Fee Related
-
1990
- 1990-03-28 US US07/500,309 patent/US5021693A/en not_active Expired - Lifetime
- 1990-04-02 EP EP90106290A patent/EP0395894B1/de not_active Expired - Lifetime
- 1990-04-02 DE DE69028941T patent/DE69028941T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2823229B2 (ja) | 1998-11-11 |
EP0395894A2 (de) | 1990-11-07 |
EP0395894B1 (de) | 1996-10-23 |
DE69028941D1 (de) | 1996-11-28 |
JPH02264381A (ja) | 1990-10-29 |
EP0395894A3 (de) | 1993-01-27 |
US5021693A (en) | 1991-06-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |