DE69109468T2 - Elektronische Leistungsanordnung realisiert durch eine Reihe elementarer Halbleiterbauelemente in Parallelverbindung und verwandtes Herstellungsverfahren. - Google Patents
Elektronische Leistungsanordnung realisiert durch eine Reihe elementarer Halbleiterbauelemente in Parallelverbindung und verwandtes Herstellungsverfahren.Info
- Publication number
- DE69109468T2 DE69109468T2 DE69109468T DE69109468T DE69109468T2 DE 69109468 T2 DE69109468 T2 DE 69109468T2 DE 69109468 T DE69109468 T DE 69109468T DE 69109468 T DE69109468 T DE 69109468T DE 69109468 T2 DE69109468 T2 DE 69109468T2
- Authority
- DE
- Germany
- Prior art keywords
- series
- manufacturing process
- parallel connection
- semiconductor components
- electronic power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP91830215A EP0514615B1 (de) | 1991-05-23 | 1991-05-23 | Elektronische Leistungsanordnung realisiert durch eine Reihe elementarer Halbleiterbauelemente in Parallelverbindung und verwandtes Herstellungsverfahren |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69109468D1 DE69109468D1 (de) | 1995-06-08 |
DE69109468T2 true DE69109468T2 (de) | 1995-12-14 |
Family
ID=8208949
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69109468T Expired - Fee Related DE69109468T2 (de) | 1991-05-23 | 1991-05-23 | Elektronische Leistungsanordnung realisiert durch eine Reihe elementarer Halbleiterbauelemente in Parallelverbindung und verwandtes Herstellungsverfahren. |
Country Status (4)
Country | Link |
---|---|
US (2) | US5250821A (de) |
EP (1) | EP0514615B1 (de) |
JP (1) | JP3140555B2 (de) |
DE (1) | DE69109468T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3258200B2 (ja) * | 1995-05-31 | 2002-02-18 | 株式会社東芝 | 圧接型半導体装置 |
US5362989A (en) * | 1992-12-16 | 1994-11-08 | Alliedsignal Inc. | Electrical isolation for power-saving purposes |
US5498907A (en) * | 1993-04-29 | 1996-03-12 | Allied Signal Inc. | Interconnection arrangement for power semiconductor switching devices |
JP3180863B2 (ja) * | 1993-07-27 | 2001-06-25 | 富士電機株式会社 | 加圧接触形半導体装置およびその組立方法 |
JP2991010B2 (ja) * | 1993-09-29 | 1999-12-20 | 富士電機株式会社 | 半導体装置およびその製造方法 |
DE69321966T2 (de) * | 1993-12-24 | 1999-06-02 | Cons Ric Microelettronica | Leistungs-Halbleiterbauelement |
DE69321965T2 (de) * | 1993-12-24 | 1999-06-02 | Cons Ric Microelettronica | MOS-Leistungs-Chip-Typ und Packungszusammenbau |
US5798287A (en) * | 1993-12-24 | 1998-08-25 | Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Method for forming a power MOS device chip |
US5539232A (en) * | 1994-05-31 | 1996-07-23 | Kabushiki Kaisha Toshiba | MOS composite type semiconductor device |
JP3256636B2 (ja) * | 1994-09-15 | 2002-02-12 | 株式会社東芝 | 圧接型半導体装置 |
JP3588503B2 (ja) * | 1995-06-20 | 2004-11-10 | 株式会社東芝 | 圧接型半導体装置 |
JP3352360B2 (ja) * | 1996-07-19 | 2002-12-03 | シャープ株式会社 | 電力制御素子 |
KR100632137B1 (ko) * | 1997-07-19 | 2006-10-19 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 반도체 디바이스 어셈블리, 하프 브리지 구동 회로, 솔레노이드 구동 회로, 풀 브리지 구동 회로 및 전압 레벨 변환기 회로 |
DE19839422A1 (de) | 1998-08-29 | 2000-03-02 | Asea Brown Boveri | Explosionsschutz für Halbleitermodule |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4402004A (en) * | 1978-01-07 | 1983-08-30 | Tokyo Shibaura Denki Kabushiki Kaisha | High current press pack semiconductor device having a mesa structure |
US4536469A (en) * | 1981-11-23 | 1985-08-20 | Raytheon Company | Semiconductor structures and manufacturing methods |
US4583111A (en) * | 1983-09-09 | 1986-04-15 | Fairchild Semiconductor Corporation | Integrated circuit chip wiring arrangement providing reduced circuit inductance and controlled voltage gradients |
US4709468A (en) * | 1986-01-31 | 1987-12-01 | Texas Instruments Incorporated | Method for producing an integrated circuit product having a polyimide film interconnection structure |
US4899208A (en) * | 1987-12-17 | 1990-02-06 | International Business Machines Corporation | Power distribution for full wafer package |
DE3802794A1 (de) * | 1988-01-30 | 1989-08-10 | Bosch Gmbh Robert | Leistungstransistor |
JPH0680818B2 (ja) * | 1989-10-02 | 1994-10-12 | 株式会社東芝 | 電力用圧接型半導体装置 |
-
1991
- 1991-05-23 EP EP91830215A patent/EP0514615B1/de not_active Expired - Lifetime
- 1991-05-23 DE DE69109468T patent/DE69109468T2/de not_active Expired - Fee Related
-
1992
- 1992-01-09 US US07/819,362 patent/US5250821A/en not_active Expired - Lifetime
- 1992-05-22 JP JP04130984A patent/JP3140555B2/ja not_active Expired - Fee Related
-
1993
- 1993-06-17 US US08/077,375 patent/US5397745A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5250821A (en) | 1993-10-05 |
JP3140555B2 (ja) | 2001-03-05 |
JPH05145012A (ja) | 1993-06-11 |
DE69109468D1 (de) | 1995-06-08 |
EP0514615A1 (de) | 1992-11-25 |
US5397745A (en) | 1995-03-14 |
EP0514615B1 (de) | 1995-05-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |