DE69114418T2 - Verfahren zur Herstellung von Polysiliziumdünnfilmtransistoren mit niedrigem Kriechverlust. - Google Patents

Verfahren zur Herstellung von Polysiliziumdünnfilmtransistoren mit niedrigem Kriechverlust.

Info

Publication number
DE69114418T2
DE69114418T2 DE69114418T DE69114418T DE69114418T2 DE 69114418 T2 DE69114418 T2 DE 69114418T2 DE 69114418 T DE69114418 T DE 69114418T DE 69114418 T DE69114418 T DE 69114418T DE 69114418 T2 DE69114418 T2 DE 69114418T2
Authority
DE
Germany
Prior art keywords
production
thin film
film transistors
polysilicon thin
low creep
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69114418T
Other languages
English (en)
Other versions
DE69114418D1 (de
Inventor
Udayanath Mitra
Mahalingam Venkatesan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Application granted granted Critical
Publication of DE69114418D1 publication Critical patent/DE69114418D1/de
Publication of DE69114418T2 publication Critical patent/DE69114418T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/15Silicon on sapphire SOS
DE69114418T 1990-09-04 1991-08-28 Verfahren zur Herstellung von Polysiliziumdünnfilmtransistoren mit niedrigem Kriechverlust. Expired - Fee Related DE69114418T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/578,106 US5112764A (en) 1990-09-04 1990-09-04 Method for the fabrication of low leakage polysilicon thin film transistors

Publications (2)

Publication Number Publication Date
DE69114418D1 DE69114418D1 (de) 1995-12-14
DE69114418T2 true DE69114418T2 (de) 1996-06-05

Family

ID=24311467

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69114418T Expired - Fee Related DE69114418T2 (de) 1990-09-04 1991-08-28 Verfahren zur Herstellung von Polysiliziumdünnfilmtransistoren mit niedrigem Kriechverlust.

Country Status (4)

Country Link
US (1) US5112764A (de)
EP (1) EP0474289B1 (de)
JP (1) JPH04234134A (de)
DE (1) DE69114418T2 (de)

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US5289030A (en) 1991-03-06 1994-02-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with oxide layer
JP2794678B2 (ja) 1991-08-26 1998-09-10 株式会社 半導体エネルギー研究所 絶縁ゲイト型半導体装置およびその作製方法
USRE36314E (en) * 1991-03-06 1999-09-28 Semiconductor Energy Laboratory Co., Ltd. Insulated gate field effect semiconductor devices having a LDD region and an anodic oxide film of a gate electrode
US6849872B1 (en) * 1991-08-26 2005-02-01 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US6979840B1 (en) * 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
US5250444A (en) * 1992-02-21 1993-10-05 North American Philips Corporation Rapid plasma hydrogenation process for polysilicon MOSFETs
US6964890B1 (en) 1992-03-17 2005-11-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6624450B1 (en) 1992-03-27 2003-09-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
EP0565231A3 (en) * 1992-03-31 1996-11-20 Sgs Thomson Microelectronics Method of fabricating a polysilicon thin film transistor
US5241192A (en) * 1992-04-02 1993-08-31 General Electric Company Fabrication method for a self-aligned thin film transistor having reduced end leakage and device formed thereby
CN1196184C (zh) * 1992-07-06 2005-04-06 株式会社半导体能源研究所 半导体器件及其形成方法
CN100502054C (zh) * 1992-07-06 2009-06-17 株式会社半导体能源研究所 半导体器件的制造方法
JP3181695B2 (ja) * 1992-07-08 2001-07-03 ローム株式会社 Soi基板を用いた半導体装置の製造方法
US5322807A (en) * 1992-08-19 1994-06-21 At&T Bell Laboratories Method of making thin film transistors including recrystallization and high pressure oxidation
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US6323071B1 (en) 1992-12-04 2001-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for forming a semiconductor device
US5403762A (en) * 1993-06-30 1995-04-04 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a TFT
JP3437863B2 (ja) * 1993-01-18 2003-08-18 株式会社半導体エネルギー研究所 Mis型半導体装置の作製方法
JP3562588B2 (ja) * 1993-02-15 2004-09-08 株式会社半導体エネルギー研究所 半導体装置の製造方法
US6413805B1 (en) 1993-03-12 2002-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device forming method
JPH06275640A (ja) * 1993-03-22 1994-09-30 Semiconductor Energy Lab Co Ltd 薄膜トランジスタおよびその作製方法
JP3535205B2 (ja) * 1993-03-22 2004-06-07 株式会社半導体エネルギー研究所 薄膜トランジスタの作製方法
EP0663697A4 (de) 1993-07-26 1997-11-26 Seiko Epson Corp Duennschicht-halbleiteranordnung, ihre herstellung und anzeigesystem.
US5492843A (en) * 1993-07-31 1996-02-20 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating semiconductor device and method of processing substrate
US5719065A (en) 1993-10-01 1998-02-17 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device with removable spacers
JP3030368B2 (ja) * 1993-10-01 2000-04-10 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US6777763B1 (en) * 1993-10-01 2004-08-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for fabricating the same
DE69426056T2 (de) * 1993-10-26 2001-05-10 Ibm Abhärtung gegen die Auslösung von Einzelereignissen für die VLSI-Technologie ohne die Schaltungen neu zu gestalten
TW279275B (de) * 1993-12-27 1996-06-21 Sharp Kk
US20040178446A1 (en) * 1994-02-09 2004-09-16 Ravishankar Sundaresan Method of forming asymmetrical polysilicon thin film transistor
JP3190520B2 (ja) * 1994-06-14 2001-07-23 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US6706572B1 (en) 1994-08-31 2004-03-16 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film transistor using a high pressure oxidation step
JPH0878693A (ja) * 1994-08-31 1996-03-22 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6300659B1 (en) 1994-09-30 2001-10-09 Semiconductor Energy Laboratory Co., Ltd. Thin-film transistor and fabrication method for same
US5548132A (en) 1994-10-24 1996-08-20 Micron Technology, Inc. Thin film transistor with large grain size DRW offset region and small grain size source and drain and channel regions
FR2728390A1 (fr) * 1994-12-19 1996-06-21 Korea Electronics Telecomm Procede de formation d'un transistor a film mince
US5977559A (en) * 1995-09-29 1999-11-02 Semiconductor Energy Laboratory Co., Ltd. Thin-film transistor having a catalyst element in its active regions
JP3444053B2 (ja) * 1995-10-13 2003-09-08 ソニー株式会社 薄膜半導体装置
JP2978746B2 (ja) * 1995-10-31 1999-11-15 日本電気株式会社 半導体装置の製造方法
JP3645378B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645379B2 (ja) * 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645380B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法、情報端末、ヘッドマウントディスプレイ、ナビゲーションシステム、携帯電話、ビデオカメラ、投射型表示装置
JP3729955B2 (ja) 1996-01-19 2005-12-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5985740A (en) 1996-01-19 1999-11-16 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device including reduction of a catalyst
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US5888858A (en) 1996-01-20 1999-03-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
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US6465287B1 (en) 1996-01-27 2002-10-15 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization
US6100562A (en) 1996-03-17 2000-08-08 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US6291837B1 (en) * 1997-03-18 2001-09-18 Semiconductor Energy Laboratory Co., Ltd. Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof
JP3191745B2 (ja) 1997-04-23 2001-07-23 日本電気株式会社 薄膜トランジスタ素子及びその製造方法
JP3376247B2 (ja) * 1997-05-30 2003-02-10 株式会社半導体エネルギー研究所 薄膜トランジスタ及び薄膜トランジスタを用いた半導体装置
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Also Published As

Publication number Publication date
EP0474289A1 (de) 1992-03-11
EP0474289B1 (de) 1995-11-08
JPH04234134A (ja) 1992-08-21
US5112764A (en) 1992-05-12
DE69114418D1 (de) 1995-12-14

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8339 Ceased/non-payment of the annual fee