DE69125535T2 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69125535T2
DE69125535T2 DE69125535T DE69125535T DE69125535T2 DE 69125535 T2 DE69125535 T2 DE 69125535T2 DE 69125535 T DE69125535 T DE 69125535T DE 69125535 T DE69125535 T DE 69125535T DE 69125535 T2 DE69125535 T2 DE 69125535T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69125535T
Other languages
English (en)
Other versions
DE69125535D1 (de
Inventor
Takaki Kohno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69125535D1 publication Critical patent/DE69125535D1/de
Publication of DE69125535T2 publication Critical patent/DE69125535T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/123Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series
DE69125535T 1990-07-16 1991-07-15 Halbleiterspeicheranordnung Expired - Fee Related DE69125535T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18842890A JP2586187B2 (ja) 1990-07-16 1990-07-16 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69125535D1 DE69125535D1 (de) 1997-05-15
DE69125535T2 true DE69125535T2 (de) 1997-07-17

Family

ID=16223504

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69125535T Expired - Fee Related DE69125535T2 (de) 1990-07-16 1991-07-15 Halbleiterspeicheranordnung

Country Status (4)

Country Link
US (1) US5301144A (de)
EP (1) EP0467607B1 (de)
JP (1) JP2586187B2 (de)
DE (1) DE69125535T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0495298A (ja) * 1990-08-10 1992-03-27 Nec Ic Microcomput Syst Ltd 半導体集積回路
US5566127A (en) * 1992-01-15 1996-10-15 Motorola, Inc. Method for building a compiled static RAM
KR0158112B1 (ko) * 1995-04-25 1999-02-01 김광호 다수개의 뱅크들을 가지는 반도체 메모리 장치
KR0157342B1 (ko) * 1995-06-09 1998-12-01 김광호 불휘발성 반도체 메모리의 전압 센싱 방법
KR100228424B1 (ko) * 1996-06-29 1999-11-01 김영환 반도체 메모리 장치의 엑스 디코더 회로
JP2978794B2 (ja) * 1996-11-08 1999-11-15 日本電気アイシーマイコンシステム株式会社 半導体集積回路
JP3905979B2 (ja) * 1998-06-03 2007-04-18 株式会社東芝 不揮発性半導体メモリ
US20040001355A1 (en) * 2002-06-27 2004-01-01 Matrix Semiconductor, Inc. Low-cost, serially-connected, multi-level mask-programmable read-only memory
US7505321B2 (en) 2002-12-31 2009-03-17 Sandisk 3D Llc Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US7233522B2 (en) * 2002-12-31 2007-06-19 Sandisk 3D Llc NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same
US7005350B2 (en) * 2002-12-31 2006-02-28 Matrix Semiconductor, Inc. Method for fabricating programmable memory array structures incorporating series-connected transistor strings
US6822903B2 (en) * 2003-03-31 2004-11-23 Matrix Semiconductor, Inc. Apparatus and method for disturb-free programming of passive element memory cells
US6879505B2 (en) * 2003-03-31 2005-04-12 Matrix Semiconductor, Inc. Word line arrangement having multi-layer word line segments for three-dimensional memory array
US7233024B2 (en) * 2003-03-31 2007-06-19 Sandisk 3D Llc Three-dimensional memory device incorporating segmented bit line memory array
US20050128807A1 (en) * 2003-12-05 2005-06-16 En-Hsing Chen Nand memory array incorporating multiple series selection devices and method for operation of same
US7023739B2 (en) * 2003-12-05 2006-04-04 Matrix Semiconductor, Inc. NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
US7221588B2 (en) * 2003-12-05 2007-05-22 Sandisk 3D Llc Memory array incorporating memory cells arranged in NAND strings
US7054219B1 (en) 2005-03-31 2006-05-30 Matrix Semiconductor, Inc. Transistor layout configuration for tight-pitched memory array lines
US7359279B2 (en) * 2005-03-31 2008-04-15 Sandisk 3D Llc Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers
US7142471B2 (en) * 2005-03-31 2006-11-28 Sandisk 3D Llc Method and apparatus for incorporating block redundancy in a memory array
US7272052B2 (en) * 2005-03-31 2007-09-18 Sandisk 3D Llc Decoding circuit for non-binary groups of memory line drivers
JP4895545B2 (ja) * 2005-07-22 2012-03-14 パナソニック株式会社 監視カメラ装置及び監視カメラシステム

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4467453A (en) * 1979-09-04 1984-08-21 Texas Instruments Incorporated Electrically programmable floating gate semiconductor memory device
US4489400A (en) * 1982-03-01 1984-12-18 Texas Instruments Incorporated Serially banked read only memory
US4727515A (en) * 1983-12-14 1988-02-23 General Electric Co. High density programmable memory array
US5008856A (en) * 1987-06-29 1991-04-16 Kabushiki Kaisha Toshiba Electrically programmable nonvolatile semiconductor memory device with NAND cell structure
JP2685770B2 (ja) * 1987-12-28 1997-12-03 株式会社東芝 不揮発性半導体記憶装置
US4888735A (en) * 1987-12-30 1989-12-19 Elite Semiconductor & Systems Int'l., Inc. ROM cell and array configuration
US4855955A (en) * 1988-04-08 1989-08-08 Seeq Technology, Inc. Three transistor high endurance eeprom cell
US5021689A (en) * 1989-01-19 1991-06-04 National Semiconductor Corp. Multiple page programmable logic architecture
US4996669A (en) * 1989-03-08 1991-02-26 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND memory cell structure
US5075890A (en) * 1989-05-02 1991-12-24 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with nand cell
JP2862584B2 (ja) * 1989-08-31 1999-03-03 株式会社東芝 不揮発性半導体メモリ装置

Also Published As

Publication number Publication date
US5301144A (en) 1994-04-05
JPH0474397A (ja) 1992-03-09
EP0467607B1 (de) 1997-04-09
EP0467607A2 (de) 1992-01-22
EP0467607A3 (en) 1993-04-07
JP2586187B2 (ja) 1997-02-26
DE69125535D1 (de) 1997-05-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKIO/TOKYO, JP

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee