DE69207815D1 - Bond-Maschine für Halbleiter-Chips - Google Patents

Bond-Maschine für Halbleiter-Chips

Info

Publication number
DE69207815D1
DE69207815D1 DE69207815T DE69207815T DE69207815D1 DE 69207815 D1 DE69207815 D1 DE 69207815D1 DE 69207815 T DE69207815 T DE 69207815T DE 69207815 T DE69207815 T DE 69207815T DE 69207815 D1 DE69207815 D1 DE 69207815D1
Authority
DE
Germany
Prior art keywords
semiconductor chips
bond machine
bond
machine
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69207815T
Other languages
English (en)
Other versions
DE69207815T2 (de
Inventor
Takeshi Hori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69207815D1 publication Critical patent/DE69207815D1/de
Publication of DE69207815T2 publication Critical patent/DE69207815T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

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    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49155Manufacturing circuit on or in base
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    • Y10T29/49167Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/53174Means to fasten electrical component to wiring board, base, or substrate
    • Y10T29/53178Chip component
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00Metal working
    • Y10T29/53Means to assemble or disassemble
    • Y10T29/5313Means to assemble electrical device
    • Y10T29/53174Means to fasten electrical component to wiring board, base, or substrate
    • Y10T29/53183Multilead component
DE69207815T 1991-05-27 1992-05-26 Bond-Maschine für Halbleiter-Chips Expired - Fee Related DE69207815T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3120847A JPH04348540A (ja) 1991-05-27 1991-05-27 フリップチップボンダー

Publications (2)

Publication Number Publication Date
DE69207815D1 true DE69207815D1 (de) 1996-03-07
DE69207815T2 DE69207815T2 (de) 1996-09-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE69207815T Expired - Fee Related DE69207815T2 (de) 1991-05-27 1992-05-26 Bond-Maschine für Halbleiter-Chips

Country Status (5)

Country Link
US (1) US5232532A (de)
EP (1) EP0517071B1 (de)
JP (1) JPH04348540A (de)
KR (1) KR920022433A (de)
DE (1) DE69207815T2 (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0794539A (ja) * 1993-09-20 1995-04-07 Fujitsu Ltd 半導体装置
US5551197A (en) 1993-09-30 1996-09-03 Donnelly Corporation Flush-mounted articulated/hinged window assembly
US5548091A (en) * 1993-10-26 1996-08-20 Tessera, Inc. Semiconductor chip connection components with adhesives and methods for bonding to the chip
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EP0517071A1 (de) 1992-12-09
DE69207815T2 (de) 1996-09-05
KR920022433A (ko) 1992-12-19
JPH04348540A (ja) 1992-12-03
EP0517071B1 (de) 1996-01-24
US5232532A (en) 1993-08-03

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