DE69210329T2 - Mehrschichtiger Träger für integrierte Schaltungen und Verfahren zu dessen Herstellung - Google Patents
Mehrschichtiger Träger für integrierte Schaltungen und Verfahren zu dessen HerstellungInfo
- Publication number
- DE69210329T2 DE69210329T2 DE69210329T DE69210329T DE69210329T2 DE 69210329 T2 DE69210329 T2 DE 69210329T2 DE 69210329 T DE69210329 T DE 69210329T DE 69210329 T DE69210329 T DE 69210329T DE 69210329 T2 DE69210329 T2 DE 69210329T2
- Authority
- DE
- Germany
- Prior art keywords
- production
- integrated circuits
- layer carrier
- carrier
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
- H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10295—Metallic connector elements partly mounted in a hole of the PCB
- H05K2201/10303—Pin-in-hole mounted pins
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US73574991A | 1991-07-25 | 1991-07-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69210329D1 DE69210329D1 (de) | 1996-06-05 |
DE69210329T2 true DE69210329T2 (de) | 1996-11-28 |
Family
ID=24957025
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69210329T Expired - Fee Related DE69210329T2 (de) | 1991-07-25 | 1992-07-08 | Mehrschichtiger Träger für integrierte Schaltungen und Verfahren zu dessen Herstellung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5303119A (de) |
EP (1) | EP0526992B1 (de) |
JP (1) | JPH05190757A (de) |
DE (1) | DE69210329T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5512710A (en) * | 1992-08-21 | 1996-04-30 | Cts Corporation | Multilayer package with second layer via test connections |
JPH07142673A (ja) * | 1993-11-15 | 1995-06-02 | Matsushita Electric Ind Co Ltd | 集積回路装置 |
US5834705A (en) * | 1994-03-04 | 1998-11-10 | Silicon Graphics, Inc. | Arrangement for modifying eletrical printed circuit boards |
US5498905A (en) * | 1994-08-26 | 1996-03-12 | Hughes Aircraft Company | Layered features for co-fired module integration |
DE29500428U1 (de) * | 1995-01-12 | 1995-03-30 | Hewlett Packard Gmbh | Verbindungsbauteil |
JP3123638B2 (ja) * | 1995-09-25 | 2001-01-15 | 株式会社三井ハイテック | 半導体装置 |
JPH09162320A (ja) * | 1995-12-08 | 1997-06-20 | Shinko Electric Ind Co Ltd | 半導体パッケージおよび半導体装置 |
EP1018146B1 (de) * | 1998-05-28 | 2010-04-21 | DET International Holding Limited | Anordnung für elektrische Bauteile |
US6127728A (en) * | 1999-06-24 | 2000-10-03 | Lsi Logic Corporation | Single reference plane plastic ball grid array package |
ITMI20010807A1 (it) * | 2000-04-14 | 2002-10-13 | Saint Gobain | Procedimento per la fabbricazione di piste elettroconduttorici sunun substrato trasparente e substrato ottenuto |
US8569142B2 (en) * | 2003-11-28 | 2013-10-29 | Blackberry Limited | Multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same |
US6989493B2 (en) * | 2004-03-03 | 2006-01-24 | Seagate Technology Llc | Electrical feedthrough assembly for a sealed housing |
TWI273466B (en) * | 2005-08-03 | 2007-02-11 | Tyan Computer Corp | Main board using selective displacement for input/output connection interface |
DE102007035060A1 (de) | 2007-07-26 | 2009-01-29 | Robert Bosch Gmbh | Aufbau- und Verbindungstechnik für Halbleiterbauelemente |
KR102172314B1 (ko) * | 2013-11-12 | 2020-10-30 | 삼성전자주식회사 | 반도체 장치 |
US10667398B1 (en) * | 2018-09-26 | 2020-05-26 | United States Of America As Represented By The Administrator Of Nasa | Dual dynamic random (DDR) access memory interface design for aerospace printed circuit boards |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4417392A (en) * | 1980-05-15 | 1983-11-29 | Cts Corporation | Process of making multi-layer ceramic package |
US4754371A (en) * | 1984-04-27 | 1988-06-28 | Nec Corporation | Large scale integrated circuit package |
JPS6156493A (ja) * | 1984-08-28 | 1986-03-22 | 日本電気株式会社 | 多層回路基板の電源配線構造 |
US4709468A (en) * | 1986-01-31 | 1987-12-01 | Texas Instruments Incorporated | Method for producing an integrated circuit product having a polyimide film interconnection structure |
US4721831A (en) * | 1987-01-28 | 1988-01-26 | Unisys Corporation | Module for packaging and electrically interconnecting integrated circuit chips on a porous substrate, and method of fabricating same |
US5136471A (en) * | 1987-02-26 | 1992-08-04 | Nec Corporation | Laminate wiring board |
US4837408A (en) * | 1987-05-21 | 1989-06-06 | Ngk Spark Plug Co., Ltd. | High density multilayer wiring board and the manufacturing thereof |
JP2631287B2 (ja) * | 1987-06-30 | 1997-07-16 | 日本メクトロン 株式会社 | 混成多層回路基板の製造法 |
US4963697A (en) * | 1988-02-12 | 1990-10-16 | Texas Instruments Incorporated | Advanced polymers on metal printed wiring board |
US4864722A (en) * | 1988-03-16 | 1989-09-12 | International Business Machines Corporation | Low dielectric printed circuit boards |
US4882657A (en) * | 1988-04-06 | 1989-11-21 | Ici Array Technology, Inc. | Pin grid array assembly |
US4860165A (en) * | 1988-04-27 | 1989-08-22 | Prime Computer, Inc. | Semiconductor chip carrier package |
US4935584A (en) * | 1988-05-24 | 1990-06-19 | Tektronix, Inc. | Method of fabricating a printed circuit board and the PCB produced |
US4965702A (en) * | 1989-06-19 | 1990-10-23 | E. I. Du Pont De Nemours And Company | Chip carrier package and method of manufacture |
US4954878A (en) * | 1989-06-29 | 1990-09-04 | Digital Equipment Corp. | Method of packaging and powering integrated circuit chips and the chip assembly formed thereby |
US5028473A (en) * | 1989-10-02 | 1991-07-02 | Hughes Aircraft Company | Three dimensional microcircuit structure and process for fabricating the same from ceramic tape |
-
1992
- 1992-07-08 DE DE69210329T patent/DE69210329T2/de not_active Expired - Fee Related
- 1992-07-08 EP EP92306273A patent/EP0526992B1/de not_active Expired - Lifetime
- 1992-07-23 JP JP4216646A patent/JPH05190757A/ja active Pending
-
1993
- 1993-05-11 US US08/060,677 patent/US5303119A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0526992A2 (de) | 1993-02-10 |
DE69210329D1 (de) | 1996-06-05 |
US5303119A (en) | 1994-04-12 |
EP0526992A3 (de) | 1993-02-24 |
JPH05190757A (ja) | 1993-07-30 |
EP0526992B1 (de) | 1996-05-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8328 | Change in the person/name/address of the agent |
Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN |
|
8339 | Ceased/non-payment of the annual fee |