DE69215771T2 - Verfahren zur Montage elektronischer Bauteile auf einem Schaltkreissubstrat und Schaltkreissubstrat mit darauf montierten elektronischen Bauteilen - Google Patents

Verfahren zur Montage elektronischer Bauteile auf einem Schaltkreissubstrat und Schaltkreissubstrat mit darauf montierten elektronischen Bauteilen

Info

Publication number
DE69215771T2
DE69215771T2 DE69215771T DE69215771T DE69215771T2 DE 69215771 T2 DE69215771 T2 DE 69215771T2 DE 69215771 T DE69215771 T DE 69215771T DE 69215771 T DE69215771 T DE 69215771T DE 69215771 T2 DE69215771 T2 DE 69215771T2
Authority
DE
Germany
Prior art keywords
electronic components
circuit substrate
components mounted
mounting electronic
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69215771T
Other languages
English (en)
Other versions
DE69215771D1 (de
Inventor
Minoru Hirai
Osamu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE69215771D1 publication Critical patent/DE69215771D1/de
Application granted granted Critical
Publication of DE69215771T2 publication Critical patent/DE69215771T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3164Partial encapsulation or coating the coating being a foil
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147Assembling terminal to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49169Assembling electrical component directly to terminal or elongated conductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49174Assembling terminal to elongated conductor
    • Y10T29/49176Assembling terminal to elongated conductor with molding of electrically insulating material
    • Y10T29/49178Assembling terminal to elongated conductor with molding of electrically insulating material by shrinking of cover
DE69215771T 1991-07-12 1992-07-10 Verfahren zur Montage elektronischer Bauteile auf einem Schaltkreissubstrat und Schaltkreissubstrat mit darauf montierten elektronischen Bauteilen Expired - Fee Related DE69215771T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19873591 1991-07-12

Publications (2)

Publication Number Publication Date
DE69215771D1 DE69215771D1 (de) 1997-01-23
DE69215771T2 true DE69215771T2 (de) 1997-04-10

Family

ID=16396116

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69215771T Expired - Fee Related DE69215771T2 (de) 1991-07-12 1992-07-10 Verfahren zur Montage elektronischer Bauteile auf einem Schaltkreissubstrat und Schaltkreissubstrat mit darauf montierten elektronischen Bauteilen

Country Status (3)

Country Link
US (1) US5331513A (de)
EP (1) EP0522593B1 (de)
DE (1) DE69215771T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19905807A1 (de) * 1999-02-11 2000-08-31 Ksw Microtec Ges Fuer Angewand Verfahren zur Herstellung elektrisch leitender Verbindungen

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5453580A (en) 1993-11-23 1995-09-26 E-Systems, Inc. Vibration sensitive isolation for printed circuit boards
US5622519A (en) * 1995-04-28 1997-04-22 Molex Incorporated Retention system for electrical connectors on printed circuit boards
JPH08335761A (ja) * 1995-06-06 1996-12-17 Matsushita Electric Ind Co Ltd 電子部品の配線基板への装着方法およびこれを用いた照光式スイッチユニット
US5877555A (en) * 1996-12-20 1999-03-02 Ericsson, Inc. Direct contact die attach
US6403882B1 (en) 1997-06-30 2002-06-11 International Business Machines Corporation Protective cover plate for flip chip assembly backside
US6046910A (en) * 1998-03-18 2000-04-04 Motorola, Inc. Microelectronic assembly having slidable contacts and method for manufacturing the assembly
US6468891B2 (en) * 2000-02-24 2002-10-22 Micron Technology, Inc. Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods
US6906268B2 (en) * 2001-12-14 2005-06-14 Intel Corporation Heat-shrinkable retainer for PCB double-sided assembly
US7257001B2 (en) * 2004-04-23 2007-08-14 Shmuel Erez Device and method for fastener-free connection via a heat-shrinkable insert
DE102004030383A1 (de) * 2004-06-23 2006-01-12 Infineon Technologies Ag Bondfolie und Halbleiterbauteil mit Bondfolie sowie Verfahren zu deren Herstellung
DE102007054710B3 (de) * 2007-11-16 2009-07-09 Semikron Elektronik Gmbh & Co. Kg Verfahren zur Herstellung einer Halbleiterbaugruppe
WO2018177796A1 (en) * 2017-03-28 2018-10-04 Philips Lighting Holding B.V. Method of enhancing electrical connections in 3d-printed objects
KR102615050B1 (ko) * 2019-01-16 2023-12-19 삼성전자주식회사 디스플레이 장치

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4695926A (en) * 1986-07-01 1987-09-22 Bell Of Pennsylvania Encapsulation and insulation of electronic circuit board structures
US4774643A (en) * 1986-11-17 1988-09-27 Diagin, Inc. Illuminator for radiation dosimeter and method of manufacture
US4858075A (en) * 1987-01-30 1989-08-15 Bell Of Pennsylvania RF shielded and electrically insulated circuit board structure and method of making same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19905807A1 (de) * 1999-02-11 2000-08-31 Ksw Microtec Ges Fuer Angewand Verfahren zur Herstellung elektrisch leitender Verbindungen

Also Published As

Publication number Publication date
DE69215771D1 (de) 1997-01-23
US5331513A (en) 1994-07-19
EP0522593A1 (de) 1993-01-13
EP0522593B1 (de) 1996-12-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee