DE69215978D1 - Verfahren zur gleichzeitigen Herstellung von Hoch- und Niederspannungs-Halbleiterbauelementen und damit versehene Halbleiterschaltungen - Google Patents

Verfahren zur gleichzeitigen Herstellung von Hoch- und Niederspannungs-Halbleiterbauelementen und damit versehene Halbleiterschaltungen

Info

Publication number
DE69215978D1
DE69215978D1 DE69215978T DE69215978T DE69215978D1 DE 69215978 D1 DE69215978 D1 DE 69215978D1 DE 69215978 T DE69215978 T DE 69215978T DE 69215978 T DE69215978 T DE 69215978T DE 69215978 D1 DE69215978 D1 DE 69215978D1
Authority
DE
Germany
Prior art keywords
low voltage
circuits provided
simultaneous production
semiconductor
semiconductor components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69215978T
Other languages
English (en)
Other versions
DE69215978T2 (de
Inventor
Michael C Smayling
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69215978D1 publication Critical patent/DE69215978D1/de
Publication of DE69215978T2 publication Critical patent/DE69215978T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/66689—Lateral DMOS transistors, i.e. LDMOS transistors with a step of forming an insulating sidewall spacer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0878—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
DE69215978T 1991-06-28 1992-06-26 Verfahren zur gleichzeitigen Herstellung von Hoch- und Niederspannungs-Halbleiterbauelementen und damit versehene Halbleiterschaltungen Expired - Fee Related DE69215978T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/722,812 US5225700A (en) 1991-06-28 1991-06-28 Circuit and method for forming a non-volatile memory cell

Publications (2)

Publication Number Publication Date
DE69215978D1 true DE69215978D1 (de) 1997-01-30
DE69215978T2 DE69215978T2 (de) 1997-05-07

Family

ID=24903491

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69215978T Expired - Fee Related DE69215978T2 (de) 1991-06-28 1992-06-26 Verfahren zur gleichzeitigen Herstellung von Hoch- und Niederspannungs-Halbleiterbauelementen und damit versehene Halbleiterschaltungen

Country Status (7)

Country Link
US (1) US5225700A (de)
EP (1) EP0520825B1 (de)
JP (1) JP3265311B2 (de)
KR (1) KR100269078B1 (de)
DE (1) DE69215978T2 (de)
IE (1) IE922113A1 (de)
TW (1) TW201362B (de)

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JP3293893B2 (ja) * 1991-12-09 2002-06-17 株式会社東芝 半導体不揮発性記憶装置の製造方法
US5411908A (en) * 1992-05-28 1995-05-02 Texas Instruments Incorporated Flash EEPROM array with P-tank insulated from substrate by deep N-tank
US5382536A (en) * 1993-03-15 1995-01-17 Texas Instruments Incorporated Method of fabricating lateral DMOS structure
JPH08222648A (ja) * 1995-02-14 1996-08-30 Canon Inc 記憶装置
US6475846B1 (en) * 1995-05-18 2002-11-05 Texas Instruments Incorporated Method of making floating-gate memory-cell array with digital logic transistors
EP0746033A3 (de) * 1995-06-02 1999-06-02 Texas Instruments Incorporated Verbesserungen in der oder in Bezug auf die Halbleiterherstellung
US5629546A (en) * 1995-06-21 1997-05-13 Micron Technology, Inc. Static memory cell and method of manufacturing a static memory cell
US5674762A (en) * 1995-08-28 1997-10-07 Motorola, Inc. Method of fabricating an EPROM with high voltage transistors
US5757051A (en) * 1996-11-12 1998-05-26 Micron Technology, Inc. Static memory cell and method of manufacturing a static memory cell
FR2768555B1 (fr) * 1997-09-12 2001-11-23 Commissariat Energie Atomique Structure microelectronique comportant une partie de basse tension munie d'une protection contre une partie de haute tension et procede d'obtention de cette protection
US6124157A (en) * 1998-03-20 2000-09-26 Cypress Semiconductor Corp. Integrated non-volatile and random access memory and method of forming the same
US6207991B1 (en) 1998-03-20 2001-03-27 Cypress Semiconductor Corp. Integrated non-volatile and CMOS memories having substantially the same thickness gates and methods of forming the same
US6255155B1 (en) * 1998-04-23 2001-07-03 Hyundai Electronics Industries Co., Ltd. Nonvolatile memory and method for fabricating the same
JP4514369B2 (ja) * 2001-07-19 2010-07-28 株式会社リコー 半導体装置及びその製造方法
DE10314595B4 (de) * 2003-03-31 2006-05-04 Infineon Technologies Ag Verfahren zur Herstellung von Transistoren unterschiedlichen Leitungstyps und unterschiedlicher Packungsdichte in einem Halbleitersubstrat
US6933557B2 (en) * 2003-08-11 2005-08-23 Atmel Corporation Fowler-Nordheim block alterable EEPROM memory cell
JP2007095787A (ja) * 2005-09-27 2007-04-12 Nec Electronics Corp 半導体集積回路
KR100764746B1 (ko) * 2006-09-08 2007-10-08 삼성전자주식회사 비휘발성 메모리 장치 및 그의 제조방법
KR100943500B1 (ko) * 2007-12-27 2010-02-22 주식회사 동부하이텍 반도체 소자 동시 제조 방법
KR101964262B1 (ko) * 2011-11-25 2019-04-02 삼성전자주식회사 반도체 소자 및 그 제조 방법
US9450052B1 (en) * 2015-07-01 2016-09-20 Chengdu Monolithic Power Systems Co., Ltd. EEPROM memory cell with a coupler region and method of making the same
US11282844B2 (en) * 2018-06-27 2022-03-22 Ememory Technology Inc. Erasable programmable non-volatile memory including two floating gate transistors with the same floating gate

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Also Published As

Publication number Publication date
JPH05235372A (ja) 1993-09-10
DE69215978T2 (de) 1997-05-07
IE922113A1 (en) 1992-12-30
KR100269078B1 (ko) 2000-10-16
KR930001441A (ko) 1993-01-16
US5225700A (en) 1993-07-06
TW201362B (de) 1993-03-01
EP0520825B1 (de) 1996-12-18
EP0520825A1 (de) 1992-12-30
JP3265311B2 (ja) 2002-03-11

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