DE69217702T2 - Hochtemperatur-Niederschlagsverfahren von Leitern in Öffnungen, die tiefer als breit sind - Google Patents

Hochtemperatur-Niederschlagsverfahren von Leitern in Öffnungen, die tiefer als breit sind

Info

Publication number
DE69217702T2
DE69217702T2 DE69217702T DE69217702T DE69217702T2 DE 69217702 T2 DE69217702 T2 DE 69217702T2 DE 69217702 T DE69217702 T DE 69217702T DE 69217702 T DE69217702 T DE 69217702T DE 69217702 T2 DE69217702 T2 DE 69217702T2
Authority
DE
Germany
Prior art keywords
deeper
conductors
openings
wide
high temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69217702T
Other languages
English (en)
Other versions
DE69217702D1 (de
Inventor
James Gardner Ryan
David Craig Strippe
Bernd Michael Vollmer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
International Business Machines Corp
Original Assignee
Siemens AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, International Business Machines Corp filed Critical Siemens AG
Application granted granted Critical
Publication of DE69217702D1 publication Critical patent/DE69217702D1/de
Publication of DE69217702T2 publication Critical patent/DE69217702T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411Constructional aspects of the reactor
    • H01J37/3447Collimators, shutters, apertures
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4076Through-connections; Vertical interconnect access [VIA] connections by thin-film techniques
DE69217702T 1991-04-19 1992-04-16 Hochtemperatur-Niederschlagsverfahren von Leitern in Öffnungen, die tiefer als breit sind Expired - Fee Related DE69217702T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US68802091A 1991-04-19 1991-04-19

Publications (2)

Publication Number Publication Date
DE69217702D1 DE69217702D1 (de) 1997-04-10
DE69217702T2 true DE69217702T2 (de) 1997-10-23

Family

ID=24762785

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69217702T Expired - Fee Related DE69217702T2 (de) 1991-04-19 1992-04-16 Hochtemperatur-Niederschlagsverfahren von Leitern in Öffnungen, die tiefer als breit sind

Country Status (5)

Country Link
US (1) US5529670A (de)
EP (1) EP0512296B1 (de)
JP (1) JP2725944B2 (de)
DE (1) DE69217702T2 (de)
IE (1) IE80715B1 (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6521106B1 (en) 1990-01-29 2003-02-18 Novellus Systems, Inc. Collimated deposition apparatus
CA2111536A1 (en) * 1992-12-16 1994-06-17 Geri M. Actor Collimated deposition apparatus
US5362372A (en) * 1993-06-11 1994-11-08 Applied Materials, Inc. Self cleaning collimator
JPH0718423A (ja) * 1993-07-06 1995-01-20 Japan Energy Corp 薄膜形成装置
US5356836A (en) * 1993-08-19 1994-10-18 Industrial Technology Research Institute Aluminum plug process
JP3398452B2 (ja) * 1994-01-19 2003-04-21 株式会社ソニー・ディスクテクノロジー スパッタリング装置
JP2689931B2 (ja) * 1994-12-29 1997-12-10 日本電気株式会社 スパッタ方法
US5757879A (en) * 1995-06-07 1998-05-26 International Business Machines Corporation Tungsten absorber for x-ray mask
JPH0936228A (ja) * 1995-07-21 1997-02-07 Sony Corp 配線形成方法
JPH09102541A (ja) * 1995-10-05 1997-04-15 Mitsubishi Electric Corp 半導体装置及びその製造方法
DE19621855C2 (de) * 1996-05-31 2003-03-27 Univ Dresden Tech Verfahren zur Herstellung von Metallisierungen auf Halbleiterkörpern unter Verwendung eines gepulsten Vakuumbogenverdampfers
US5801096A (en) * 1996-06-03 1998-09-01 Taiwan Semiconductor Manufacturing Company Ltd. Self-aligned tungsen etch back process to minimize seams in tungsten plugs
JP2894279B2 (ja) * 1996-06-10 1999-05-24 日本電気株式会社 金属薄膜形成方法
JPH1012729A (ja) * 1996-06-27 1998-01-16 Nec Corp 半導体装置の製造方法
KR100206938B1 (ko) * 1996-09-19 1999-07-01 구본준 반도체 제조장치 및 이를 이용한 반도체 소자의 배선 형성방법
US5783282A (en) * 1996-10-07 1998-07-21 Micron Technology, Inc. Resputtering to achieve better step coverage of contact holes
JPH10237662A (ja) * 1996-12-24 1998-09-08 Sony Corp 金属膜のプラズマcvd方法、および金属窒化物膜の形成方法ならびに半導体装置
US6168832B1 (en) 1997-01-20 2001-01-02 Coherent, Inc. Three-dimensional masking method for control of coating thickness
GB9701114D0 (en) * 1997-01-20 1997-03-12 Coherent Optics Europ Ltd Three-dimensional masking method for control of optical coating thickness
US6605197B1 (en) * 1997-05-13 2003-08-12 Applied Materials, Inc. Method of sputtering copper to fill trenches and vias
US6045634A (en) * 1997-08-14 2000-04-04 Praxair S. T. Technology, Inc. High purity titanium sputtering target and method of making
US6277737B1 (en) 1998-09-02 2001-08-21 Micron Technology, Inc. Semiconductor processing methods and integrated circuitry
JP3358587B2 (ja) 1999-05-26 2002-12-24 日本電気株式会社 半導体装置の製造方法
GB2357371B (en) * 1999-11-04 2004-02-11 Trikon Holdings Ltd A method of forming a barrier layer
JP2002069634A (ja) * 2000-08-29 2002-03-08 Canon Inc 薄膜作製方法および薄膜作製装置
JP2002217292A (ja) 2001-01-23 2002-08-02 Hitachi Ltd 半導体集積回路装置および半導体集積回路装置の製造方法
US7355687B2 (en) * 2003-02-20 2008-04-08 Hunter Engineering Company Method and apparatus for vehicle service system with imaging components
US7070697B2 (en) * 2003-04-14 2006-07-04 Hitachi Global Storage Technologies Netherlands B.V. Methods of making a read sensor with use of a barrier structure for depositing materials
US20050211546A1 (en) * 2004-03-26 2005-09-29 Applied Materials, Inc. Reactive sputter deposition plasma process using an ion shower grid
US7244474B2 (en) * 2004-03-26 2007-07-17 Applied Materials, Inc. Chemical vapor deposition plasma process using an ion shower grid
US7695590B2 (en) 2004-03-26 2010-04-13 Applied Materials, Inc. Chemical vapor deposition plasma reactor having plural ion shower grids
US20050211547A1 (en) * 2004-03-26 2005-09-29 Applied Materials, Inc. Reactive sputter deposition plasma reactor and process using plural ion shower grids
US7291360B2 (en) * 2004-03-26 2007-11-06 Applied Materials, Inc. Chemical vapor deposition plasma process using plural ion shower grids
US8058156B2 (en) * 2004-07-20 2011-11-15 Applied Materials, Inc. Plasma immersion ion implantation reactor having multiple ion shower grids
US7767561B2 (en) * 2004-07-20 2010-08-03 Applied Materials, Inc. Plasma immersion ion implantation reactor having an ion shower grid
US7407875B2 (en) * 2006-09-06 2008-08-05 International Business Machines Corporation Low resistance contact structure and fabrication thereof
JP2007295004A (ja) * 2007-07-27 2007-11-08 Toshiba Corp 半導体装置の製造方法
JP5145000B2 (ja) * 2007-09-28 2013-02-13 株式会社フジクラ 貫通配線基板、半導体パッケージ及び貫通配線基板の製造方法
JP2009182140A (ja) * 2008-01-30 2009-08-13 Tokyo Electron Ltd 薄膜の形成方法、プラズマ成膜装置及び記憶媒体
TW201005109A (en) * 2008-07-25 2010-02-01 Inotera Memories Inc Method for changing physical vapor deposition film form

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293374A (en) * 1980-03-10 1981-10-06 International Business Machines Corporation High aspect ratio, high resolution mask fabrication
KR900001825B1 (ko) * 1984-11-14 1990-03-24 가부시끼가이샤 히다찌세이사꾸쇼 성막 지향성을 고려한 스퍼터링장치
FR2583220B1 (fr) * 1985-06-11 1987-08-07 Thomson Csf Procede de realisation d'au moins deux metallisations d'un composant semi-conducteur, recouvertes d'une couche de dielectrique et composant obtenu par ce dielectrique
JPS627855A (ja) * 1985-07-05 1987-01-14 Hitachi Ltd スパツタリング装置
JPS6217173A (ja) * 1985-07-15 1987-01-26 Ulvac Corp 平板マグネトロンスパツタ装置
JPH084088B2 (ja) * 1986-02-27 1996-01-17 工業技術院長 薄膜形成方法
US4756810A (en) * 1986-12-04 1988-07-12 Machine Technology, Inc. Deposition and planarizing methods and apparatus
US4783248A (en) * 1987-02-10 1988-11-08 Siemens Aktiengesellschaft Method for the production of a titanium/titanium nitride double layer
JPH0660391B2 (ja) * 1987-06-11 1994-08-10 日電アネルバ株式会社 スパッタリング装置
US4824544A (en) * 1987-10-29 1989-04-25 International Business Machines Corporation Large area cathode lift-off sputter deposition device
JP2776826B2 (ja) * 1988-04-15 1998-07-16 株式会社日立製作所 半導体装置およびその製造方法
US4822753A (en) * 1988-05-09 1989-04-18 Motorola, Inc. Method for making a w/tin contact
JPH02178923A (ja) * 1988-12-29 1990-07-11 Fujitsu Ltd 半導体装置の製造方法
US4920073A (en) * 1989-05-11 1990-04-24 Texas Instruments, Incorporated Selective silicidation process using a titanium nitride protective layer
US4994162A (en) * 1989-09-29 1991-02-19 Materials Research Corporation Planarization method
US5026470A (en) * 1989-12-19 1991-06-25 International Business Machines Sputtering apparatus
DE69129081T2 (de) * 1990-01-29 1998-07-02 Varian Associates Gerät und Verfahren zur Niederschlagung durch einen Kollimator
US5008217A (en) * 1990-06-08 1991-04-16 At&T Bell Laboratories Process for fabricating integrated circuits having shallow junctions

Also Published As

Publication number Publication date
IE80715B1 (en) 1998-12-30
US5529670A (en) 1996-06-25
JP2725944B2 (ja) 1998-03-11
IE921253A1 (en) 1992-10-21
EP0512296A1 (de) 1992-11-11
DE69217702D1 (de) 1997-04-10
JPH06140359A (ja) 1994-05-20
EP0512296B1 (de) 1997-03-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

Owner name: INTERNATIONAL BUSINESS MACHINES CORP., ARMONK,, US

8339 Ceased/non-payment of the annual fee