DE69222913D1 - Nichtflüchtiger Speicher und Verfahren zu seiner Herstellung - Google Patents

Nichtflüchtiger Speicher und Verfahren zu seiner Herstellung

Info

Publication number
DE69222913D1
DE69222913D1 DE69222913T DE69222913T DE69222913D1 DE 69222913 D1 DE69222913 D1 DE 69222913D1 DE 69222913 T DE69222913 T DE 69222913T DE 69222913 T DE69222913 T DE 69222913T DE 69222913 D1 DE69222913 D1 DE 69222913D1
Authority
DE
Germany
Prior art keywords
production
volatile memory
volatile
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69222913T
Other languages
English (en)
Other versions
DE69222913T2 (de
Inventor
Cetin Kaya
David Liu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69222913D1 publication Critical patent/DE69222913D1/de
Application granted granted Critical
Publication of DE69222913T2 publication Critical patent/DE69222913T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
DE69222913T 1991-08-30 1992-08-25 Nichtflüchtiger Speicher und Verfahren zu seiner Herstellung Expired - Fee Related DE69222913T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/753,252 US5264384A (en) 1991-08-30 1991-08-30 Method of making a non-volatile memory cell

Publications (2)

Publication Number Publication Date
DE69222913D1 true DE69222913D1 (de) 1997-12-04
DE69222913T2 DE69222913T2 (de) 1998-05-14

Family

ID=25029838

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69222913T Expired - Fee Related DE69222913T2 (de) 1991-08-30 1992-08-25 Nichtflüchtiger Speicher und Verfahren zu seiner Herstellung

Country Status (6)

Country Link
US (3) US5264384A (de)
EP (1) EP0530644B1 (de)
JP (1) JP3270530B2 (de)
KR (1) KR100293075B1 (de)
DE (1) DE69222913T2 (de)
TW (1) TW249285B (de)

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US5424567A (en) * 1991-05-15 1995-06-13 North American Philips Corporation Protected programmable transistor with reduced parasitic capacitances and method of fabrication
US5264384A (en) * 1991-08-30 1993-11-23 Texas Instruments Incorporated Method of making a non-volatile memory cell
US5313421A (en) * 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
US7071060B1 (en) * 1996-02-28 2006-07-04 Sandisk Corporation EEPROM with split gate source side infection with sidewall spacers
US5712180A (en) * 1992-01-14 1998-01-27 Sundisk Corporation EEPROM with split gate source side injection
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
EP1032034A1 (de) * 1992-01-22 2000-08-30 Macronix International Co., Ltd. Verfahren zur Speicherbauelementherstellung
US5349225A (en) * 1993-04-12 1994-09-20 Texas Instruments Incorporated Field effect transistor with a lightly doped drain
EP0655778A3 (de) * 1993-11-25 1996-01-03 Matsushita Electronics Corp Verfahren zur Herstellung von Halbleiterspeicheranordnungen.
EP0676816B1 (de) * 1994-03-28 2001-10-04 STMicroelectronics S.r.l. Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung
US5650340A (en) * 1994-08-18 1997-07-22 Sun Microsystems, Inc. Method of making asymmetric low power MOS devices
KR100192430B1 (ko) * 1995-08-21 1999-06-15 구본준 비휘발성 메모리 및 이 비휘발성 메모리를 프로그램하는 방법
US5882970A (en) * 1995-11-03 1999-03-16 United Microelectronics Corporation Method for fabricating flash memory cell having a decreased overlapped region between its source and gate
IT1289540B1 (it) * 1996-07-10 1998-10-15 Sgs Thomson Microelectronics Metodo per trasformare automaticamente la fabbricazione di una cella di memoria eprom nella fabbricazione di una cella di memoria
KR100238199B1 (ko) * 1996-07-30 2000-01-15 윤종용 플레쉬 이이피롬(eeprom) 장치 및 그 제조방법
US5926714A (en) 1996-12-03 1999-07-20 Advanced Micro Devices, Inc. Detached drain MOSFET
US6020232A (en) * 1996-12-03 2000-02-01 Advanced Micro Devices, Inc. Process of fabricating transistors having source and drain regions laterally displaced from the transistors gate
US5900666A (en) * 1996-12-03 1999-05-04 Advanced Micro Devices, Inc. Ultra-short transistor fabrication scheme for enhanced reliability
US5898202A (en) * 1996-12-03 1999-04-27 Advanced Micro Devices, Inc. Selective spacer formation for optimized silicon area reduction
US6060360A (en) * 1997-04-14 2000-05-09 Taiwan Semiconductor Manufacturing Company Method of manufacture of P-channel EEprom and flash EEprom devices
US6124610A (en) 1998-06-26 2000-09-26 Advanced Micro Devices, Inc. Isotropically etching sidewall spacers to be used for both an NMOS source/drain implant and a PMOS LDD implant
US6245623B1 (en) * 1998-11-06 2001-06-12 Advanced Micro Devices, Inc. CMOS semiconductor device containing N-channel transistor having shallow LDD junctions
KR100278661B1 (ko) * 1998-11-13 2001-02-01 윤종용 비휘발성 메모리소자 및 그 제조방법
JP2002184877A (ja) * 2000-12-15 2002-06-28 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置及びその製造方法
US7075829B2 (en) 2001-08-30 2006-07-11 Micron Technology, Inc. Programmable memory address and decode circuits with low tunnel barrier interpoly insulators
US7135734B2 (en) * 2001-08-30 2006-11-14 Micron Technology, Inc. Graded composition metal oxide tunnel barrier interpoly insulators
US7132711B2 (en) * 2001-08-30 2006-11-07 Micron Technology, Inc. Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers
US7068544B2 (en) 2001-08-30 2006-06-27 Micron Technology, Inc. Flash memory with low tunnel barrier interpoly insulators
US7012297B2 (en) * 2001-08-30 2006-03-14 Micron Technology, Inc. Scalable flash/NV structures and devices with extended endurance
US6784480B2 (en) * 2002-02-12 2004-08-31 Micron Technology, Inc. Asymmetric band-gap engineered nonvolatile memory device
US7221586B2 (en) 2002-07-08 2007-05-22 Micron Technology, Inc. Memory utilizing oxide nanolaminates
US6773990B1 (en) * 2003-05-03 2004-08-10 Advanced Micro Devices, Inc. Method for reducing short channel effects in memory cells and related structure
US7232729B1 (en) * 2003-05-06 2007-06-19 Spansion Llc Method for manufacturing a double bitline implant
JP4419699B2 (ja) * 2004-06-16 2010-02-24 ソニー株式会社 不揮発性半導体メモリ装置およびその動作方法
US20070099386A1 (en) * 2005-10-31 2007-05-03 International Business Machines Corporation Integration scheme for high gain fet in standard cmos process
JP4314252B2 (ja) 2006-07-03 2009-08-12 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US7800156B2 (en) * 2008-02-25 2010-09-21 Tower Semiconductor Ltd. Asymmetric single poly NMOS non-volatile memory cell
US7859043B2 (en) * 2008-02-25 2010-12-28 Tower Semiconductor Ltd. Three-terminal single poly NMOS non-volatile memory cell
US8344440B2 (en) * 2008-02-25 2013-01-01 Tower Semiconductor Ltd. Three-terminal single poly NMOS non-volatile memory cell with shorter program/erase times
US9305931B2 (en) 2011-05-10 2016-04-05 Jonker, Llc Zero cost NVM cell using high voltage devices in analog process
US8873302B2 (en) * 2011-10-28 2014-10-28 Invensas Corporation Common doped region with separate gate control for a logic compatible non-volatile memory cell
US9230814B2 (en) 2011-10-28 2016-01-05 Invensas Corporation Non-volatile memory devices having vertical drain to gate capacitive coupling
US11605438B2 (en) 2020-11-16 2023-03-14 Ememory Technology Inc. Memory device for improving weak-program or stuck bit

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JPS5189108A (de) * 1975-01-24 1976-08-04
JPS5315772A (en) * 1976-07-28 1978-02-14 Hitachi Ltd Mis semiconductor device and its production
US4163985A (en) * 1977-09-30 1979-08-07 The United States Of America As Represented By The Secretary Of The Air Force Nonvolatile punch through memory cell with buried n+ region in channel
US4288256A (en) * 1977-12-23 1981-09-08 International Business Machines Corporation Method of making FET containing stacked gates
JPS54140483A (en) * 1978-04-21 1979-10-31 Nec Corp Semiconductor device
US4376947A (en) * 1979-09-04 1983-03-15 Texas Instruments Incorporated Electrically programmable floating gate semiconductor memory device
JPS57102073A (en) * 1980-12-16 1982-06-24 Mitsubishi Electric Corp Semiconductor memory and manufacture thereof
JPS5950561A (ja) * 1982-09-17 1984-03-23 Hitachi Ltd 半導体集積回路装置
JPS59102498A (ja) * 1982-12-02 1984-06-13 Hitachi Zosen Corp 湿潤スラツジの焼成装置
JPS60247974A (ja) * 1984-05-23 1985-12-07 Toshiba Corp 半導体装置
KR930007195B1 (ko) * 1984-05-23 1993-07-31 가부시끼가이샤 히다찌세이사꾸쇼 반도체 장치와 그 제조 방법
JPH0760864B2 (ja) * 1984-07-13 1995-06-28 株式会社日立製作所 半導体集積回路装置
US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
EP0197501A3 (de) * 1985-04-12 1986-12-17 General Electric Company Ausgedehntes Drain-Konzept für einen verminderten Hochgeschwindigkeitselektroneneffekt
US4680603A (en) * 1985-04-12 1987-07-14 General Electric Company Graded extended drain concept for reduced hot electron effect
US4804637A (en) * 1985-09-27 1989-02-14 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
JPS63140582A (ja) * 1986-12-02 1988-06-13 Toshiba Corp 半導体装置及びその製造方法
US4835740A (en) * 1986-12-26 1989-05-30 Kabushiki Kaisha Toshiba Floating gate type semiconductor memory device
US4958321A (en) * 1988-09-22 1990-09-18 Advanced Micro Devices, Inc. One transistor flash EPROM cell
US5262987A (en) * 1988-11-17 1993-11-16 Seiko Instruments Inc. Floating gate semiconductor nonvolatile memory having impurity doped regions for low voltage operation
US5216269A (en) * 1989-03-31 1993-06-01 U.S. Philips Corp. Electrically-programmable semiconductor memories with buried injector region
JPH0783066B2 (ja) * 1989-08-11 1995-09-06 株式会社東芝 半導体装置の製造方法
JPH0770728B2 (ja) * 1989-11-15 1995-07-31 三洋電機株式会社 半導体装置の製造方法
US5202576A (en) * 1990-08-29 1993-04-13 Texas Instruments Incorporated Asymmetrical non-volatile memory cell, arrays and methods for fabricating same
JP3111090B2 (ja) * 1990-08-29 2000-11-20 テキサス インスツルメンツ インコーポレイテツド 不揮発性メモリセルを作製する方法
US5424567A (en) * 1991-05-15 1995-06-13 North American Philips Corporation Protected programmable transistor with reduced parasitic capacitances and method of fabrication
US5264384A (en) * 1991-08-30 1993-11-23 Texas Instruments Incorporated Method of making a non-volatile memory cell

Also Published As

Publication number Publication date
US5482880A (en) 1996-01-09
JPH06204488A (ja) 1994-07-22
US5264384A (en) 1993-11-23
DE69222913T2 (de) 1998-05-14
EP0530644A3 (en) 1993-08-04
EP0530644A2 (de) 1993-03-10
JP3270530B2 (ja) 2002-04-02
TW249285B (de) 1995-06-11
US5646430A (en) 1997-07-08
EP0530644B1 (de) 1997-10-29
KR100293075B1 (ko) 2001-09-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee