DE69224245D1 - Halbleiter-Speichereinrichtung - Google Patents

Halbleiter-Speichereinrichtung

Info

Publication number
DE69224245D1
DE69224245D1 DE69224245T DE69224245T DE69224245D1 DE 69224245 D1 DE69224245 D1 DE 69224245D1 DE 69224245 T DE69224245 T DE 69224245T DE 69224245 T DE69224245 T DE 69224245T DE 69224245 D1 DE69224245 D1 DE 69224245D1
Authority
DE
Germany
Prior art keywords
storage device
semiconductor storage
semiconductor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69224245T
Other languages
English (en)
Other versions
DE69224245T2 (de
Inventor
Koichi Nagase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69224245D1 publication Critical patent/DE69224245D1/de
Application granted granted Critical
Publication of DE69224245T2 publication Critical patent/DE69224245T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
DE69224245T 1991-08-13 1992-08-12 Halbleiter-Speichereinrichtung Expired - Fee Related DE69224245T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3202882A JP2794138B2 (ja) 1991-08-13 1991-08-13 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69224245D1 true DE69224245D1 (de) 1998-03-05
DE69224245T2 DE69224245T2 (de) 1998-07-09

Family

ID=16464769

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69224245T Expired - Fee Related DE69224245T2 (de) 1991-08-13 1992-08-12 Halbleiter-Speichereinrichtung

Country Status (5)

Country Link
US (1) US5373475A (de)
EP (1) EP0528352B1 (de)
JP (1) JP2794138B2 (de)
KR (1) KR950009229B1 (de)
DE (1) DE69224245T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3776461B2 (ja) * 1991-08-30 2006-05-17 株式会社東芝 半導体集積回路装置およびチップ選別方法
JP2967021B2 (ja) * 1993-01-25 1999-10-25 株式会社東芝 半導体メモリ装置
KR950010624B1 (ko) * 1993-07-14 1995-09-20 삼성전자주식회사 반도체 메모리장치의 셀프리프레시 주기조절회로
JP3090833B2 (ja) * 1993-12-28 2000-09-25 株式会社東芝 半導体記憶装置
JP3426693B2 (ja) * 1994-03-07 2003-07-14 株式会社日立製作所 半導体記憶装置
US5442588A (en) * 1994-08-16 1995-08-15 Cirrus Logic, Inc. Circuits and methods for refreshing a dual bank memory
US5835436A (en) 1995-07-03 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed
KR100372245B1 (ko) * 1995-08-24 2004-02-25 삼성전자주식회사 워드라인순차제어반도체메모리장치
JPH09161478A (ja) * 1995-12-12 1997-06-20 Mitsubishi Electric Corp 半導体記憶装置
US5920517A (en) * 1996-09-30 1999-07-06 Advanced Micro Devices, Inc. Memory array test and characterization using isolated memory cell power supply
US5835401A (en) * 1996-12-05 1998-11-10 Cypress Semiconductor Corporation Dram with hidden refresh
US5781483A (en) 1996-12-31 1998-07-14 Micron Technology, Inc. Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
KR100234365B1 (ko) * 1997-01-30 1999-12-15 윤종용 반도체 메모리장치의 리프레쉬 방법 및 회로
KR100465636B1 (ko) * 1997-09-30 2005-04-06 주식회사 하이닉스반도체 디램의 리프레쉬 제어회로
US6549476B2 (en) 2001-04-09 2003-04-15 Micron Technology, Inc. Device and method for using complementary bits in a memory array
KR100499639B1 (ko) * 2003-04-21 2005-07-05 주식회사 하이닉스반도체 로오 리던던시 회로
KR100689863B1 (ko) * 2005-12-22 2007-03-08 삼성전자주식회사 반도체 메모리 장치 및 그에 따른 방법
KR101098128B1 (ko) * 2007-10-05 2011-12-26 후지쯔 가부시끼가이샤 정보 처리 장치, 기억부 제어 장치 및 기억부 제어 방법
US9601193B1 (en) 2015-09-14 2017-03-21 Intel Corporation Cross point memory control
KR102441031B1 (ko) * 2016-04-01 2022-09-07 에스케이하이닉스 주식회사 리프레쉬 제어 장치 및 이를 포함하는 반도체 장치
US10978134B1 (en) * 2019-12-30 2021-04-13 Alibaba Group Holding Limited Method and device for refreshing memory

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0632217B2 (ja) * 1981-06-29 1994-04-27 富士通株式会社 半導体記憶装置
JPS59140694A (ja) * 1983-01-31 1984-08-13 Sharp Corp ダイナミツクramのリフレツシユ方法
JPS61145636A (ja) * 1984-12-19 1986-07-03 Nec Corp 記号列照合装置
JPH0612610B2 (ja) * 1986-06-24 1994-02-16 日本電気株式会社 ダイナミツク型半導体メモリ
US4819207A (en) * 1986-09-30 1989-04-04 Kabushiki Kaisha Toshiba High-speed refreshing rechnique for highly-integrated random-access memory
JPS643896A (en) * 1987-06-24 1989-01-09 Mitsubishi Electric Corp Semiconductor dynamic ram
US4933907A (en) * 1987-12-03 1990-06-12 Mitsubishi Denki Kabushiki Kaisha Dynamic random access memory device and operating method therefor
JP2561640B2 (ja) * 1988-05-27 1996-12-11 株式会社日立製作所 半導体記憶装置
JPH0229989A (ja) * 1988-07-19 1990-01-31 Mitsubishi Electric Corp ダイナミックランダムアクセスメモリ装置
US4961167A (en) * 1988-08-26 1990-10-02 Mitsubishi Denki Kabushiki Kaisha Substrate bias generator in a dynamic random access memory with auto/self refresh functions and a method of generating a substrate bias therein
US5161124A (en) * 1988-10-27 1992-11-03 Texas Instruments Incorporated Bond programmable integrated circuit
JPH03149852A (ja) * 1989-11-07 1991-06-26 Fujitsu Ltd 半導体集積回路

Also Published As

Publication number Publication date
US5373475A (en) 1994-12-13
EP0528352A1 (de) 1993-02-24
JPH0547176A (ja) 1993-02-26
EP0528352B1 (de) 1998-01-28
DE69224245T2 (de) 1998-07-09
JP2794138B2 (ja) 1998-09-03
KR930005015A (ko) 1993-03-23
KR950009229B1 (ko) 1995-08-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee