DE69225271T2 - Spannungsgesteuerter Oszillator mit Mehrfachschleife - Google Patents

Spannungsgesteuerter Oszillator mit Mehrfachschleife

Info

Publication number
DE69225271T2
DE69225271T2 DE69225271T DE69225271T DE69225271T2 DE 69225271 T2 DE69225271 T2 DE 69225271T2 DE 69225271 T DE69225271 T DE 69225271T DE 69225271 T DE69225271 T DE 69225271T DE 69225271 T2 DE69225271 T2 DE 69225271T2
Authority
DE
Germany
Prior art keywords
controlled oscillator
voltage controlled
loop voltage
loop
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69225271T
Other languages
English (en)
Other versions
DE69225271D1 (de
Inventor
Peter Magnus Petersson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of DE69225271D1 publication Critical patent/DE69225271D1/de
Application granted granted Critical
Publication of DE69225271T2 publication Critical patent/DE69225271T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
DE69225271T 1991-06-19 1992-06-12 Spannungsgesteuerter Oszillator mit Mehrfachschleife Expired - Lifetime DE69225271T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/717,660 US5142246A (en) 1991-06-19 1991-06-19 Multi-loop controlled VCO

Publications (2)

Publication Number Publication Date
DE69225271D1 DE69225271D1 (de) 1998-06-04
DE69225271T2 true DE69225271T2 (de) 1998-10-15

Family

ID=24882957

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69225271T Expired - Lifetime DE69225271T2 (de) 1991-06-19 1992-06-12 Spannungsgesteuerter Oszillator mit Mehrfachschleife

Country Status (4)

Country Link
US (1) US5142246A (de)
EP (1) EP0519892B1 (de)
DE (1) DE69225271T2 (de)
HK (1) HK1010815A1 (de)

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US5699387A (en) * 1993-06-23 1997-12-16 Ati Technologies Inc. Phase offset cancellation technique for reducing low frequency jitters
US5424689A (en) * 1993-12-22 1995-06-13 Motorola, Inc. Filtering device for use in a phase locked loop controller
WO1995034127A1 (en) * 1994-06-03 1995-12-14 Sierra Semiconductor Corporation A three-state phase-detector/charge pump circuit with no dead-band region
US5666084A (en) * 1995-12-01 1997-09-09 Motorola, Inc. Multi-level demodulator and VCO circuit
US5802450A (en) * 1996-04-19 1998-09-01 Ericsson Inc. Transmit sequencing
US6055231A (en) * 1997-03-12 2000-04-25 Interdigital Technology Corporation Continuously adjusted-bandwidth discrete-time phase-locked loop
FI107479B (fi) 1997-08-06 2001-08-15 Nokia Networks Oy Askelohjattu taajuussyntetisaattori
GB2330736B (en) * 1997-10-24 2002-04-10 Mitel Corp Timing recovery with minimum jitter movement
US5920207A (en) * 1997-11-05 1999-07-06 Hewlett Packard Company Asynchronous phase detector having a variable dead zone
JPH11195982A (ja) * 1998-01-06 1999-07-21 Nec Corp Ｐｌｌ回路
US6188286B1 (en) 1999-03-30 2001-02-13 Infineon Technologies North America Corp. Method and system for synchronizing multiple subsystems using one voltage-controlled oscillator
SE519489C2 (sv) * 1999-09-13 2003-03-04 Ericsson Telefon Ab L M VCO-omkopplare
CA2295435C (en) * 2000-01-06 2004-03-30 Thomas Riley Linear low noise phase locked loop frequency synthesizer using controlled divider pulse widths
DE10050294B4 (de) * 2000-10-10 2006-08-24 Atmel Germany Gmbh PLL-Schaltung
US6813111B2 (en) * 2000-11-24 2004-11-02 Texas Instruments Incorporated Implementation method of digital phase-locked loop
ATE388541T1 (de) * 2001-03-20 2008-03-15 Gct Semiconductor Inc Fraktional-n-frequenzsynthesizer mit fraktional- kompensationsverfahren
US8385476B2 (en) 2001-04-25 2013-02-26 Texas Instruments Incorporated Digital phase locked loop
US6990164B2 (en) * 2001-10-01 2006-01-24 Freescale Semiconductor, Inc. Dual steered frequency synthesizer
JP3555608B2 (ja) * 2001-11-30 2004-08-18 日本電気株式会社 フェイズロックドループ回路及びクロック再生回路
US6927635B2 (en) * 2003-08-14 2005-08-09 Toshiba America Electronic Components, Inc. Lock detectors having a narrow sensitivity range
FR2884372A1 (fr) * 2005-04-07 2006-10-13 St Microelectronics Sa Boucle a asservissement de phase
US20090263872A1 (en) * 2008-01-23 2009-10-22 Complete Genomics Inc. Methods and compositions for preventing bias in amplification and sequencing reactions
KR20090050576A (ko) * 2007-11-16 2009-05-20 엘지전자 주식회사 피엘엘 장치 및 방법
US8283984B2 (en) * 2009-07-17 2012-10-09 Real Tek Semiconductor Corp. Method and apparatus of phase locking for reducing clock jitter due to charge leakage
EP2602936B1 (de) * 2011-12-07 2014-02-12 Telefonaktiebolaget L M Ericsson (Publ) Analoger Phasenregelkreis mit verbessertem Einrasten
US10790835B2 (en) 2017-03-01 2020-09-29 Telefonaktiebolaget Lm Ericsson (Publ) System for phase calibration of phase locked loop
US11588488B1 (en) 2021-12-09 2023-02-21 Raytheon Company Dual-loop phase-locking circuit

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Also Published As

Publication number Publication date
HK1010815A1 (en) 1999-06-25
EP0519892B1 (de) 1998-04-29
EP0519892A2 (de) 1992-12-23
DE69225271D1 (de) 1998-06-04
US5142246A (en) 1992-08-25
EP0519892A3 (de) 1993-07-07

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