DE69404500D1 - Hochspannungs-MOS-Transistor mit ausgedehntem Drain - Google Patents

Hochspannungs-MOS-Transistor mit ausgedehntem Drain

Info

Publication number
DE69404500D1
DE69404500D1 DE69404500T DE69404500T DE69404500D1 DE 69404500 D1 DE69404500 D1 DE 69404500D1 DE 69404500 T DE69404500 T DE 69404500T DE 69404500 T DE69404500 T DE 69404500T DE 69404500 D1 DE69404500 D1 DE 69404500D1
Authority
DE
Germany
Prior art keywords
high voltage
mos transistor
voltage mos
extended drain
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69404500T
Other languages
English (en)
Other versions
DE69404500T2 (de
DE69404500T3 (de
Inventor
Klas H Eklund
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Power Integrations Inc
Original Assignee
Power Integrations Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=21786132&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69404500(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Power Integrations Inc filed Critical Power Integrations Inc
Publication of DE69404500D1 publication Critical patent/DE69404500D1/de
Publication of DE69404500T2 publication Critical patent/DE69404500T2/de
Application granted granted Critical
Publication of DE69404500T3 publication Critical patent/DE69404500T3/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
    • H01L29/7832—Field effect transistors with field effect produced by an insulated gate with multiple gate structure the structure comprising a MOS gate and at least one non-MOS gate, e.g. JFET or MESFET gate
DE69404500T 1993-02-16 1994-02-05 Hochspannungs-MOS-Transistor mit ausgedehntem Drain Expired - Lifetime DE69404500T3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/018,080 US5313082A (en) 1993-02-16 1993-02-16 High voltage MOS transistor with a low on-resistance

Publications (3)

Publication Number Publication Date
DE69404500D1 true DE69404500D1 (de) 1997-09-04
DE69404500T2 DE69404500T2 (de) 1998-02-26
DE69404500T3 DE69404500T3 (de) 2001-06-28

Family

ID=21786132

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69404500T Expired - Lifetime DE69404500T3 (de) 1993-02-16 1994-02-05 Hochspannungs-MOS-Transistor mit ausgedehntem Drain

Country Status (4)

Country Link
US (1) US5313082A (de)
EP (1) EP0612110B2 (de)
JP (2) JP3631773B2 (de)
DE (1) DE69404500T3 (de)

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EP0879481B1 (de) 1996-02-05 2002-05-02 Infineon Technologies AG Durch feldeffekt steuerbares halbleiterbauelement
JP2755247B2 (ja) * 1996-02-28 1998-05-20 日本電気株式会社 半導体装置
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US6207994B1 (en) 1996-11-05 2001-03-27 Power Integrations, Inc. High-voltage transistor with multi-layer conduction region
US6168983B1 (en) 1996-11-05 2001-01-02 Power Integrations, Inc. Method of making a high-voltage transistor with multiple lateral conduction layers
US6800903B2 (en) * 1996-11-05 2004-10-05 Power Integrations, Inc. High-voltage transistor with multi-layer conduction region
US6534829B2 (en) 1998-06-25 2003-03-18 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
JP2000022142A (ja) * 1998-06-29 2000-01-21 Denso Corp 半導体装置及び半導体装置の製造方法
DE69942442D1 (de) * 1999-01-11 2010-07-15 Semiconductor Energy Lab Halbleiteranordnung mit Treiber-TFT und Pixel-TFT auf einem Substrat
DE19918028A1 (de) * 1999-04-21 2000-11-02 Siemens Ag Halbleiter-Bauelement
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US6768171B2 (en) 2000-11-27 2004-07-27 Power Integrations, Inc. High-voltage transistor with JFET conduction channels
US6509220B2 (en) 2000-11-27 2003-01-21 Power Integrations, Inc. Method of fabricating a high-voltage transistor
US6424007B1 (en) * 2001-01-24 2002-07-23 Power Integrations, Inc. High-voltage transistor with buried conduction layer
US6894349B2 (en) 2001-06-08 2005-05-17 Intersil Americas Inc. Lateral DMOS structure with lateral extension structure for reduced charge trapping in gate oxide
US6635544B2 (en) 2001-09-07 2003-10-21 Power Intergrations, Inc. Method of fabricating a high-voltage transistor with a multi-layered extended drain structure
US7786533B2 (en) 2001-09-07 2010-08-31 Power Integrations, Inc. High-voltage vertical transistor with edge termination structure
US6555873B2 (en) * 2001-09-07 2003-04-29 Power Integrations, Inc. High-voltage lateral transistor with a multi-layered extended drain structure
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US7527994B2 (en) * 2004-09-01 2009-05-05 Honeywell International Inc. Amorphous silicon thin-film transistors and methods of making the same
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Also Published As

Publication number Publication date
JPH06291263A (ja) 1994-10-18
EP0612110B2 (de) 2001-01-31
EP0612110B1 (de) 1997-07-30
US5313082A (en) 1994-05-17
JP4477406B2 (ja) 2010-06-09
EP0612110A1 (de) 1994-08-24
DE69404500T2 (de) 1998-02-26
DE69404500T3 (de) 2001-06-28
JP2004247754A (ja) 2004-09-02
JP3631773B2 (ja) 2005-03-23

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8363 Opposition against the patent
8327 Change in the person/name/address of the patent owner

Owner name: POWER INTEGRATIONS, INC., SUNNYVALE, CALIF., US

8366 Restricted maintained after opposition proceedings