DE69413960D1 - Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung - Google Patents

Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung

Info

Publication number
DE69413960D1
DE69413960D1 DE69413960T DE69413960T DE69413960D1 DE 69413960 D1 DE69413960 D1 DE 69413960D1 DE 69413960 T DE69413960 T DE 69413960T DE 69413960 T DE69413960 T DE 69413960T DE 69413960 D1 DE69413960 D1 DE 69413960D1
Authority
DE
Germany
Prior art keywords
production
eeprom memory
flash eeprom
volatile eprom
eprom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69413960T
Other languages
English (en)
Other versions
DE69413960T2 (de
Inventor
Lorenzo Fratin
Leonardo Ravazzi
Carlo Riva
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69413960D1 publication Critical patent/DE69413960D1/de
Publication of DE69413960T2 publication Critical patent/DE69413960T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
DE69413960T 1994-07-18 1994-07-18 Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung Expired - Fee Related DE69413960T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP94830363A EP0696050B1 (de) 1994-07-18 1994-07-18 Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung

Publications (2)

Publication Number Publication Date
DE69413960D1 true DE69413960D1 (de) 1998-11-19
DE69413960T2 DE69413960T2 (de) 1999-04-01

Family

ID=8218494

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69413960T Expired - Fee Related DE69413960T2 (de) 1994-07-18 1994-07-18 Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung

Country Status (4)

Country Link
US (2) US5712814A (de)
EP (1) EP0696050B1 (de)
JP (1) JP3024519B2 (de)
DE (1) DE69413960T2 (de)

Families Citing this family (91)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW400641B (en) * 1997-03-13 2000-08-01 United Microelectronics Corp The manufacture method of flash memory unit
US6083794A (en) 1997-07-10 2000-07-04 International Business Machines Corporation Method to perform selective drain engineering with a non-critical mask
IL125604A (en) 1997-07-30 2004-03-28 Saifun Semiconductors Ltd Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge
US6768165B1 (en) 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
TW437099B (en) * 1997-09-26 2001-05-28 Matsushita Electronics Corp Non-volatile semiconductor memory device and the manufacturing method thereof
US6306712B1 (en) 1997-12-05 2001-10-23 Texas Instruments Incorporated Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
US6633499B1 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Method for reducing voltage drops in symmetric array architectures
US6430077B1 (en) 1997-12-12 2002-08-06 Saifun Semiconductors Ltd. Method for regulating read voltage level at the drain of a cell in a symmetric array
US6633496B2 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Symmetric architecture for memory cells having widely spread metal bit lines
US6168637B1 (en) * 1997-12-16 2001-01-02 Advanced Micro Devices, Inc. Use of a large angle implant and current structure for eliminating a critical mask in flash memory processing
JP3429654B2 (ja) * 1997-12-24 2003-07-22 セイコーインスツルメンツ株式会社 半導体集積回路装置の製造方法
US6030871A (en) * 1998-05-05 2000-02-29 Saifun Semiconductors Ltd. Process for producing two bit ROM cell utilizing angled implant
US6348711B1 (en) 1998-05-20 2002-02-19 Saifun Semiconductors Ltd. NROM cell with self-aligned programming and erasure areas
US6215148B1 (en) 1998-05-20 2001-04-10 Saifun Semiconductors Ltd. NROM cell with improved programming, erasing and cycling
US6480510B1 (en) * 1998-07-28 2002-11-12 Serconet Ltd. Local area network of serial intelligent cells
US6171913B1 (en) 1998-09-08 2001-01-09 Taiwan Semiconductor Manufacturing Company Process for manufacturing a single asymmetric pocket implant
US6214666B1 (en) * 1998-12-18 2001-04-10 Vantis Corporation Method of forming a non-volatile memory device
US6168995B1 (en) * 1999-01-12 2001-01-02 Lucent Technologies Inc. Method of fabricating a split gate memory cell
US6255162B1 (en) * 1999-03-16 2001-07-03 United Microelectronics Corp. Method of gap filling
US6168999B1 (en) * 1999-09-07 2001-01-02 Advanced Micro Devices, Inc. Method for fabricating high-performance submicron mosfet with lateral asymmetric channel and a lightly doped drain
US6429063B1 (en) 1999-10-26 2002-08-06 Saifun Semiconductors Ltd. NROM cell with generally decoupled primary and secondary injection
US6518122B1 (en) 1999-12-17 2003-02-11 Chartered Semiconductor Manufacturing Ltd. Low voltage programmable and erasable flash EEPROM
US6660585B1 (en) * 2000-03-21 2003-12-09 Aplus Flash Technology, Inc. Stacked gate flash memory cell with reduced disturb conditions
US6396741B1 (en) * 2000-05-04 2002-05-28 Saifun Semiconductors Ltd. Programming of nonvolatile memory cells
US6928001B2 (en) 2000-12-07 2005-08-09 Saifun Semiconductors Ltd. Programming and erasing methods for a non-volatile memory cell
US6490204B2 (en) 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
JP4819215B2 (ja) * 2000-07-24 2011-11-24 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置およびその製造方法
US6524914B1 (en) 2000-10-30 2003-02-25 Advanced Micro Devices, Inc. Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory
US6653189B1 (en) * 2000-10-30 2003-11-25 Advanced Micro Devices, Inc. Source side boron implant and drain side MDD implant for deep sub 0.18 micron flash memory
US6614692B2 (en) * 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
KR100373855B1 (ko) * 2001-01-20 2003-02-26 삼성전자주식회사 낸드형 플래시 메모리 장치 및 그 형성방법
US6806143B2 (en) * 2001-02-02 2004-10-19 Micron Technology, Inc. Self-aligned source pocket for flash memory cells
US6584017B2 (en) 2001-04-05 2003-06-24 Saifun Semiconductors Ltd. Method for programming a reference cell
US6677805B2 (en) * 2001-04-05 2004-01-13 Saifun Semiconductors Ltd. Charge pump stage with body effect minimization
US6636440B2 (en) 2001-04-25 2003-10-21 Saifun Semiconductors Ltd. Method for operation of an EEPROM array, including refresh thereof
US6509237B2 (en) * 2001-05-11 2003-01-21 Hynix Semiconductor America, Inc. Flash memory cell fabrication sequence
US6489223B1 (en) 2001-07-03 2002-12-03 International Business Machines Corporation Angled implant process
US6643181B2 (en) 2001-10-24 2003-11-04 Saifun Semiconductors Ltd. Method for erasing a memory cell
US7098107B2 (en) * 2001-11-19 2006-08-29 Saifun Semiconductor Ltd. Protective layer in memory device and method therefor
US6583007B1 (en) 2001-12-20 2003-06-24 Saifun Semiconductors Ltd. Reducing secondary injection effects
US6885585B2 (en) * 2001-12-20 2005-04-26 Saifun Semiconductors Ltd. NROM NOR array
US6700818B2 (en) * 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
US6917544B2 (en) * 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US6826107B2 (en) * 2002-08-01 2004-11-30 Saifun Semiconductors Ltd. High voltage insertion in flash memory cards
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US20040087094A1 (en) * 2002-10-30 2004-05-06 Advanced Micro Devices, Inc. Semiconductor component and method of manufacture
US6833307B1 (en) * 2002-10-30 2004-12-21 Advanced Micro Devices, Inc. Method for manufacturing a semiconductor component having an early halo implant
US7178004B2 (en) * 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US6878589B1 (en) * 2003-05-06 2005-04-12 Advanced Micro Devices, Inc. Method and system for improving short channel effect on a floating gate device
JP2005026464A (ja) * 2003-07-02 2005-01-27 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US7123532B2 (en) * 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
DE10352785A1 (de) * 2003-11-12 2005-06-02 Infineon Technologies Ag Speichertransistor und Speichereinheit mit asymmetrischem Kanaldotierbereich
IL160417A (en) * 2004-02-16 2011-04-28 Mosaid Technologies Inc Unit added to the outlet
US7125777B2 (en) * 2004-07-15 2006-10-24 Fairchild Semiconductor Corporation Asymmetric hetero-doped high-voltage MOSFET (AH2MOS)
US20080164537A1 (en) * 2007-01-04 2008-07-10 Jun Cai Integrated complementary low voltage rf-ldmos
US7095655B2 (en) * 2004-08-12 2006-08-22 Saifun Semiconductors Ltd. Dynamic matching of signal path and reference path for sensing
US20060068551A1 (en) * 2004-09-27 2006-03-30 Saifun Semiconductors, Ltd. Method for embedding NROM
US7294882B2 (en) * 2004-09-28 2007-11-13 Sandisk Corporation Non-volatile memory with asymmetrical doping profile
US7638850B2 (en) * 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US20060146624A1 (en) * 2004-12-02 2006-07-06 Saifun Semiconductors, Ltd. Current folding sense amplifier
EP1684307A1 (de) * 2005-01-19 2006-07-26 Saifun Semiconductors Ltd. Verfahren, Schaltung und System zum Löschen einer oder mehrerer nichtflüchtiger Speicherzellen
JP4974880B2 (ja) * 2005-01-27 2012-07-11 スパンション エルエルシー 半導体装置及びその製造方法
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US20070141788A1 (en) * 2005-05-25 2007-06-21 Ilan Bloom Method for embedding non-volatile memory with logic circuitry
US7786512B2 (en) * 2005-07-18 2010-08-31 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US20070096199A1 (en) * 2005-09-08 2007-05-03 Eli Lusky Method of manufacturing symmetric arrays
US20070087503A1 (en) * 2005-10-17 2007-04-19 Saifun Semiconductors, Ltd. Improving NROM device characteristics using adjusted gate work function
JP2007110024A (ja) * 2005-10-17 2007-04-26 Sharp Corp 半導体記憶装置
US20070099386A1 (en) * 2005-10-31 2007-05-03 International Business Machines Corporation Integration scheme for high gain fet in standard cmos process
US20070120180A1 (en) * 2005-11-25 2007-05-31 Boaz Eitan Transition areas for dense memory arrays
US7352627B2 (en) * 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) * 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US20070173017A1 (en) * 2006-01-20 2007-07-26 Saifun Semiconductors, Ltd. Advanced non-volatile memory array and method of fabrication thereof
US8253452B2 (en) * 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7692961B2 (en) * 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7760554B2 (en) * 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7701779B2 (en) * 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7776726B2 (en) * 2006-05-04 2010-08-17 Infineon Technologies Ag Semiconductor devices and methods of manufacture thereof
US7605579B2 (en) * 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
US7977186B2 (en) * 2006-09-28 2011-07-12 Sandisk Corporation Providing local boosting control implant for non-volatile memory
US7705387B2 (en) * 2006-09-28 2010-04-27 Sandisk Corporation Non-volatile memory with local boosting control implant
US20080258150A1 (en) * 2007-03-09 2008-10-23 The Regents Of The University Of California Method to fabricate iii-n field effect transistors using ion implantation with reduced dopant activation and damage recovery temperature
TWI340436B (en) * 2007-07-18 2011-04-11 Nanya Technology Corp Two-bit flash memory cell structure and method of making the same
US20090170259A1 (en) * 2007-12-28 2009-07-02 Texas Instruments Incorporated Angled implants with different characteristics on different axes
CN102184896B (zh) * 2011-04-06 2012-08-29 北京大学 一种抑制闪存编程干扰的工艺方法
CN102446927B (zh) * 2011-10-17 2014-11-19 上海华力微电子有限公司 提高写入速度的浮体动态随机存储器单元及其制作方法
US8785307B2 (en) * 2012-08-23 2014-07-22 Silicon Storage Technology, Inc. Method of forming a memory cell by reducing diffusion of dopants under a gate
US9257554B2 (en) * 2013-08-13 2016-02-09 Globalfoundries Singapore Pte. Ltd. Split gate embedded memory technology and method of manufacturing thereof
US10374100B2 (en) * 2017-06-29 2019-08-06 Texas Instruments Incorporated Programmable non-volatile memory with low off current
US10622558B2 (en) 2018-03-30 2020-04-14 Intel Corporation Non-volatile memory cell structures including a chalcogenide material having a narrowed end and a three-dimensional memory device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4729001A (en) * 1981-07-27 1988-03-01 Xerox Corporation Short-channel field effect transistor
JP2558961B2 (ja) * 1990-03-13 1996-11-27 株式会社東芝 半導体装置の製造方法
KR940010930B1 (ko) * 1990-03-13 1994-11-19 가부시키가이샤 도시바 반도체장치의 제조방법
JPH043983A (ja) * 1990-04-20 1992-01-08 Sony Corp 不揮発性半導体メモリ
JP2817393B2 (ja) * 1990-11-14 1998-10-30 日本電気株式会社 半導体記憶装置の製造方法
JP2633104B2 (ja) * 1991-05-21 1997-07-23 シャープ株式会社 半導体装置の製造方法
TW260816B (de) * 1991-12-16 1995-10-21 Philips Nv
US5190887A (en) * 1991-12-30 1993-03-02 Intel Corporation Method of making electrically erasable and electrically programmable memory cell with extended cycling endurance
JP3036565B2 (ja) * 1992-08-28 2000-04-24 日本電気株式会社 不揮発性半導体記憶装置の製造方法
US5518942A (en) * 1995-02-22 1996-05-21 Alliance Semiconductor Corporation Method of making flash EPROM cell having improved erase characteristics by using a tilt angle implant
FR2735904B1 (fr) * 1995-06-21 1997-07-18 Commissariat Energie Atomique Procede de realisation d'un semi-conducteur avec une zone fortement dopee situee entre des zones faiblement dopees, pour la fabrication de transistors
US5595919A (en) * 1996-02-20 1997-01-21 Chartered Semiconductor Manufacturing Pte Ltd. Method of making self-aligned halo process for reducing junction capacitance
US5811338A (en) * 1996-08-09 1998-09-22 Micron Technology, Inc. Method of making an asymmetric transistor
TW317653B (en) * 1996-12-27 1997-10-11 United Microelectronics Corp Manufacturing method of memory cell of flash memory

Also Published As

Publication number Publication date
EP0696050A1 (de) 1996-02-07
US5712814A (en) 1998-01-27
EP0696050B1 (de) 1998-10-14
DE69413960T2 (de) 1999-04-01
JPH08316346A (ja) 1996-11-29
US5920776A (en) 1999-07-06
JP3024519B2 (ja) 2000-03-21

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