DE69415987D1 - Integrierte Anordnung mit einer Struktur zum Schutz gegen hohe elektrische Felder - Google Patents

Integrierte Anordnung mit einer Struktur zum Schutz gegen hohe elektrische Felder

Info

Publication number
DE69415987D1
DE69415987D1 DE69415987T DE69415987T DE69415987D1 DE 69415987 D1 DE69415987 D1 DE 69415987D1 DE 69415987 T DE69415987 T DE 69415987T DE 69415987 T DE69415987 T DE 69415987T DE 69415987 D1 DE69415987 D1 DE 69415987D1
Authority
DE
Germany
Prior art keywords
electric fields
protect against
high electric
against high
integrated arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69415987T
Other languages
English (en)
Other versions
DE69415987T2 (de
Inventor
Claudio Contiero
Riccardo Depetro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE69415987D1 publication Critical patent/DE69415987D1/de
Application granted granted Critical
Publication of DE69415987T2 publication Critical patent/DE69415987T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
DE69415987T 1994-11-08 1994-11-08 Integrierte Anordnung mit einer Struktur zum Schutz gegen hohe elektrische Felder Expired - Fee Related DE69415987T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP94830530A EP0714135B1 (de) 1994-11-08 1994-11-08 Integrierte Anordnung mit einer Struktur zum Schutz gegen hohe elektrische Felder

Publications (2)

Publication Number Publication Date
DE69415987D1 true DE69415987D1 (de) 1999-02-25
DE69415987T2 DE69415987T2 (de) 1999-06-24

Family

ID=8218573

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69415987T Expired - Fee Related DE69415987T2 (de) 1994-11-08 1994-11-08 Integrierte Anordnung mit einer Struktur zum Schutz gegen hohe elektrische Felder

Country Status (4)

Country Link
US (1) US5777366A (de)
EP (1) EP0714135B1 (de)
JP (1) JP2957118B2 (de)
DE (1) DE69415987T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111710723A (zh) * 2020-07-16 2020-09-25 杰华特微电子（杭州）有限公司 横向双扩散晶体管及其制造方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2953416B2 (ja) * 1996-12-27 1999-09-27 日本電気株式会社 半導体装置
US6346451B1 (en) * 1997-12-24 2002-02-12 Philips Electronics North America Corporation Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode
JP3180776B2 (ja) * 1998-09-22 2001-06-25 日本電気株式会社 電界効果型トランジスタ
JP2002353444A (ja) * 2001-05-28 2002-12-06 Fuji Electric Co Ltd 半導体装置
SE522910C2 (sv) * 2002-06-03 2004-03-16 Ericsson Telefon Ab L M Integrerad krets för reducering av strömdensitet i en transistor innefattande sammanflätade kollektor-, emitter- och styrfingrar
US7800196B2 (en) * 2008-09-30 2010-09-21 Northrop Grumman Systems Corporation Semiconductor structure with an electric field stop layer for improved edge termination capability
US8236640B2 (en) * 2009-12-18 2012-08-07 Intel Corporation Method of fabricating a semiconductor device having gate finger elements extended over a plurality of isolation regions formed in the source and drain regions
US8754469B2 (en) 2010-10-26 2014-06-17 Texas Instruments Incorporated Hybrid active-field gap extended drain MOS transistor
JP2014154595A (ja) * 2013-02-05 2014-08-25 Seiko Instruments Inc 半導体装置
KR102122365B1 (ko) * 2014-12-12 2020-06-12 삼성전자주식회사 반도체 소자
CN105742365A (zh) * 2016-04-14 2016-07-06 东莞电子科技大学电子信息工程研究院 射频ldmos晶体管及其制作方法
CN107845675B (zh) * 2017-10-30 2020-02-18 济南大学 一种横向双扩散金属氧化物半导体场效应管
CN109980011A (zh) * 2017-12-28 2019-07-05 无锡华润上华科技有限公司 一种半导体器件及其制作方法
US10665712B2 (en) * 2018-09-05 2020-05-26 Monolithic Power Systems, Inc. LDMOS device with a field plate contact metal layer with a sub-maximum size

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5372577A (en) * 1976-12-10 1978-06-28 Hitachi Ltd High dielectric strength field effect transistor
DE2852621C4 (de) * 1978-12-05 1995-11-30 Siemens Ag Isolierschicht-Feldeffekttransistor mit einer Drif tstrecke zwischen Gate-Elektrode und Drain-Zone
GB2049273B (en) * 1979-05-02 1983-05-25 Philips Electronic Associated Method for short-circuting igfet source regions to a substrate
JPS56169368A (en) * 1980-05-30 1981-12-26 Sharp Corp High withstand voltage mos field effect semiconductor device
JP2804294B2 (ja) * 1988-06-17 1998-09-24 エヌティエヌ株式会社 滑り軸受用潤滑性樹脂組成物
US5040045A (en) * 1990-05-17 1991-08-13 U.S. Philips Corporation High voltage MOS transistor having shielded crossover path for a high voltage connection bus
EP0565808B1 (de) * 1992-04-17 1996-12-11 STMicroelectronics S.r.l. Junction-isoliertes, hochspannungsintegriertes MOS-Bauelement

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111710723A (zh) * 2020-07-16 2020-09-25 杰华特微电子（杭州）有限公司 横向双扩散晶体管及其制造方法
CN111710723B (zh) * 2020-07-16 2022-09-16 杰华特微电子股份有限公司 横向双扩散晶体管及其制造方法

Also Published As

Publication number Publication date
JPH08255906A (ja) 1996-10-01
EP0714135A1 (de) 1996-05-29
DE69415987T2 (de) 1999-06-24
JP2957118B2 (ja) 1999-10-04
EP0714135B1 (de) 1999-01-13
US5777366A (en) 1998-07-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee