DE69420499D1 - Methode zur Reduzierung des Leckstroms in Dünnfilmtransistoren - Google Patents

Methode zur Reduzierung des Leckstroms in Dünnfilmtransistoren

Info

Publication number
DE69420499D1
DE69420499D1 DE69420499T DE69420499T DE69420499D1 DE 69420499 D1 DE69420499 D1 DE 69420499D1 DE 69420499 T DE69420499 T DE 69420499T DE 69420499 T DE69420499 T DE 69420499T DE 69420499 D1 DE69420499 D1 DE 69420499D1
Authority
DE
Germany
Prior art keywords
thin film
leakage current
film transistors
reducing leakage
reducing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69420499T
Other languages
English (en)
Other versions
DE69420499T2 (de
Inventor
Robert Forrest Kwasnick
George Edward Possin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of DE69420499D1 publication Critical patent/DE69420499D1/de
Application granted granted Critical
Publication of DE69420499T2 publication Critical patent/DE69420499T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/958—Passivation layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
DE69420499T 1993-10-04 1994-09-30 Methode zur Reduzierung des Leckstroms in Dünnfilmtransistoren Expired - Fee Related DE69420499T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/130,807 US5384271A (en) 1993-10-04 1993-10-04 Method for reduction of off-current in thin film transistors

Publications (2)

Publication Number Publication Date
DE69420499D1 true DE69420499D1 (de) 1999-10-14
DE69420499T2 DE69420499T2 (de) 2000-05-18

Family

ID=22446429

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69420499T Expired - Fee Related DE69420499T2 (de) 1993-10-04 1994-09-30 Methode zur Reduzierung des Leckstroms in Dünnfilmtransistoren

Country Status (4)

Country Link
US (1) US5384271A (de)
EP (1) EP0646953B1 (de)
JP (1) JPH07211919A (de)
DE (1) DE69420499T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5399884A (en) * 1993-11-10 1995-03-21 General Electric Company Radiation imager with single passivation dielectric for transistor and diode
JP2886066B2 (ja) * 1993-11-16 1999-04-26 株式会社フロンテック 薄膜トランジスタ基板およびその製造方法
DE19540309A1 (de) * 1995-10-28 1997-04-30 Philips Patentverwaltung Halbleiterbauelement mit Passivierungsaufbau
US5707895A (en) * 1996-10-21 1998-01-13 Taiwan Semiconductor Manufacturing Company, Ltd. Thin film transistor performance enhancement by water plasma treatment
US6037609A (en) 1997-01-17 2000-03-14 General Electric Company Corrosion resistant imager
AT409429B (de) 1999-07-15 2002-08-26 Sez Semiconduct Equip Zubehoer Verfahren zum ätzbehandeln von halbleitersubstraten zwecks freilegen einer metallschicht
KR100600877B1 (ko) * 2004-06-25 2006-07-14 삼성에스디아이 주식회사 반도체 소자 및 그 제조 방법
TWI345312B (en) * 2004-07-26 2011-07-11 Au Optronics Corp Thin film transistor structure and method of fabricating the same
US7382421B2 (en) * 2004-10-12 2008-06-03 Hewlett-Packard Development Company, L.P. Thin film transistor with a passivation layer
US8053777B2 (en) * 2005-03-31 2011-11-08 General Electric Company Thin film transistors for imaging system and method of making the same
TWI316274B (en) * 2006-07-14 2009-10-21 Au Optronics Corp Method for fabricating thin film transistor
US20080023703A1 (en) * 2006-07-31 2008-01-31 Randy Hoffman System and method for manufacturing a thin-film device
KR101675115B1 (ko) 2010-01-12 2016-11-22 삼성전자주식회사 산화물 박막 트랜지스터 및 그 제조 방법
CN102148259B (zh) * 2010-10-12 2014-04-16 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制造方法和液晶显示器
RU2571456C1 (ru) * 2014-07-15 2015-12-20 Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования Кабардино-Балкарский государственный университет им. Х.М. Бербекова Способ изготовления тонкопленочного транзистора

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0196915B1 (de) * 1985-03-29 1991-08-14 Matsushita Electric Industrial Co., Ltd. Dünnschicht-Transistorenanordnung und Methode zu deren Herstellung
US4704783A (en) * 1986-05-05 1987-11-10 General Electric Company Method for passivating the back channel of amorphous silicon field effect transistors
JPH01212450A (ja) * 1988-02-19 1989-08-25 Sanyo Electric Co Ltd 薄膜トランジスタの製造方法
US5130263A (en) * 1990-04-17 1992-07-14 General Electric Company Method for photolithographically forming a selfaligned mask using back-side exposure and a non-specular reflecting layer
US5241192A (en) * 1992-04-02 1993-08-31 General Electric Company Fabrication method for a self-aligned thin film transistor having reduced end leakage and device formed thereby
US5281546A (en) * 1992-09-02 1994-01-25 General Electric Company Method of fabricating a thin film transistor using hydrogen plasma treatment of the intrinsic silicon/doped layer interface

Also Published As

Publication number Publication date
US5384271A (en) 1995-01-24
EP0646953A2 (de) 1995-04-05
EP0646953A3 (de) 1997-08-27
JPH07211919A (ja) 1995-08-11
EP0646953B1 (de) 1999-09-08
DE69420499T2 (de) 2000-05-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: ROEGER UND KOLLEGEN, 73728 ESSLINGEN

8339 Ceased/non-payment of the annual fee