DE69428690T2 - Rauschisolierter eingangs-/ausgangspuffer - Google Patents

Rauschisolierter eingangs-/ausgangspuffer

Info

Publication number
DE69428690T2
DE69428690T2 DE69428690T DE69428690T DE69428690T2 DE 69428690 T2 DE69428690 T2 DE 69428690T2 DE 69428690 T DE69428690 T DE 69428690T DE 69428690 T DE69428690 T DE 69428690T DE 69428690 T2 DE69428690 T2 DE 69428690T2
Authority
DE
Germany
Prior art keywords
input signal
logic
noise
output terminal
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69428690T
Other languages
English (en)
Other versions
DE69428690D1 (de
Inventor
F Wong
W Mattos
D Shiffer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69428690D1 publication Critical patent/DE69428690D1/de
Application granted granted Critical
Publication of DE69428690T2 publication Critical patent/DE69428690T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
DE69428690T 1993-04-23 1994-02-09 Rauschisolierter eingangs-/ausgangspuffer Expired - Fee Related DE69428690T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/052,442 US5426376A (en) 1993-04-23 1993-04-23 Noise isolated I/O buffer that uses two separate power supplies
PCT/US1994/001414 WO1994026030A1 (en) 1993-04-23 1994-02-09 Noise isolated i/o buffer

Publications (2)

Publication Number Publication Date
DE69428690D1 DE69428690D1 (de) 2001-11-22
DE69428690T2 true DE69428690T2 (de) 2002-07-11

Family

ID=21977634

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69428690T Expired - Fee Related DE69428690T2 (de) 1993-04-23 1994-02-09 Rauschisolierter eingangs-/ausgangspuffer

Country Status (8)

Country Link
US (2) US5426376A (de)
EP (1) EP0694231B1 (de)
JP (1) JPH09511104A (de)
KR (1) KR960702213A (de)
AT (1) ATE207264T1 (de)
DE (1) DE69428690T2 (de)
TW (1) TW324122B (de)
WO (1) WO1994026030A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014118982A1 (de) 2014-12-18 2016-06-23 Turck Holding Gmbh Schutzschaltung

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US6242942B1 (en) 1998-11-13 2001-06-05 Integrated Device Technology, Inc. Integrated circuit output buffers having feedback switches therein for reducing simultaneous switching noise and improving impedance matching characteristics
US6356102B1 (en) 1998-11-13 2002-03-12 Integrated Device Technology, Inc. Integrated circuit output buffers having control circuits therein that utilize output signal feedback to control pull-up and pull-down time intervals
JP2000228627A (ja) * 1999-02-05 2000-08-15 Mitsubishi Electric Corp 入出力回路
JP4101973B2 (ja) * 1999-05-21 2008-06-18 株式会社ルネサステクノロジ 出力バッファ回路
DE19944519B4 (de) * 1999-09-16 2010-02-11 Infineon Technologies Ag Schaltungsanordnung zum Ansteuern einer Last
US6414523B1 (en) * 2000-01-24 2002-07-02 Matsushita Electrical Industrial Co., Ltd. Pull-up method and apparatus for a universal serial bus output driver
GB0024226D0 (en) * 2000-10-04 2000-11-15 Lsi Logic Corp Improvements in or relating to the reduction of simultaneous switching noise in integrated circuits
US6489809B2 (en) * 2000-11-30 2002-12-03 Infineon Technologies Ag Circuit for receiving and driving a clock-signal
US6586971B1 (en) 2001-12-18 2003-07-01 Hewlett-Packard Development Company, L.P. Adapting VLSI clocking to short term voltage transients
US6571376B1 (en) * 2002-01-03 2003-05-27 Intel Corporation Method and apparatus for analog compensation of driver output signal slew rate against device impedance variation
US7088145B2 (en) * 2002-12-23 2006-08-08 3M Innovative Properties Company AC powered logic circuitry
US7301370B1 (en) * 2003-05-22 2007-11-27 Cypress Semiconductor Corporation High-speed differential logic to CMOS translator architecture with low data-dependent jitter and duty cycle distortion
JP3850399B2 (ja) * 2003-09-10 2006-11-29 ローム株式会社 半導体集積回路装置
TWI229499B (en) * 2003-10-01 2005-03-11 Toppoly Optoelectronics Corp Voltage level shifting circuit
DE10355509A1 (de) * 2003-11-27 2005-07-07 Infineon Technologies Ag Schaltung und Verfahren zum verzögerten Einschalten einer elektrischen Last
US7078937B2 (en) * 2003-12-17 2006-07-18 3M Innovative Properties Company Logic circuitry powered by partially rectified ac waveform
JP2006262421A (ja) * 2005-03-18 2006-09-28 Fujitsu Ltd 半導体集積回路及びそのノイズ低減方法
US7412668B1 (en) 2006-01-30 2008-08-12 Xilinx, Inc. Integrated system noise management—decoupling capacitance
US7509608B1 (en) 2006-01-30 2009-03-24 Xilinx, Inc. Integrated system noise management—clock jitter
US7412673B1 (en) * 2006-01-30 2008-08-12 Xilinx, Inc. Integrated system noise management—bounce voltage
US7428717B1 (en) 2006-01-30 2008-09-23 Xilinx, Inc. Integrated system noise management—system level
KR100915829B1 (ko) * 2008-02-20 2009-09-07 주식회사 하이닉스반도체 반도체 집적회로의 데이터 출력 드라이버
US7928756B1 (en) * 2008-02-29 2011-04-19 National Semiconductor Corporation Method and system for reducing I/O noise and power
TWI388120B (zh) * 2009-12-17 2013-03-01 Phison Electronics Corp 輸入／輸出介面的驅動電路
CN110249531B (zh) * 2018-10-25 2023-08-11 深圳市汇顶科技股份有限公司 用于域间缓冲级的接地中间器件
CN114489202B (zh) * 2021-01-06 2024-03-29 台湾积体电路制造股份有限公司 电源供应产生器及其操作方法

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US4504747A (en) * 1983-11-10 1985-03-12 Motorola, Inc. Input buffer circuit for receiving multiple level input voltages
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014118982A1 (de) 2014-12-18 2016-06-23 Turck Holding Gmbh Schutzschaltung

Also Published As

Publication number Publication date
US5534791A (en) 1996-07-09
WO1994026030A1 (en) 1994-11-10
ATE207264T1 (de) 2001-11-15
DE69428690D1 (de) 2001-11-22
EP0694231B1 (de) 2001-10-17
US5426376A (en) 1995-06-20
TW324122B (en) 1998-01-01
JPH09511104A (ja) 1997-11-04
EP0694231A1 (de) 1996-01-31
KR960702213A (ko) 1996-03-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8380 Miscellaneous part iii

Free format text: ALS VERTRETER SIND NACHZUTRAGEN: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER, 80538 MUENCHEN

8339 Ceased/non-payment of the annual fee