DE69522738T2 - Verfahren und Schaltkreis zum Programmieren einer Schwebegatterspeicherzelle - Google Patents

Verfahren und Schaltkreis zum Programmieren einer Schwebegatterspeicherzelle

Info

Publication number
DE69522738T2
DE69522738T2 DE69522738T DE69522738T DE69522738T2 DE 69522738 T2 DE69522738 T2 DE 69522738T2 DE 69522738 T DE69522738 T DE 69522738T DE 69522738 T DE69522738 T DE 69522738T DE 69522738 T2 DE69522738 T2 DE 69522738T2
Authority
DE
Germany
Prior art keywords
programming
circuit
memory cell
floating gate
gate memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69522738T
Other languages
English (en)
Other versions
DE69522738D1 (de
Inventor
John F Schreck
Cetin Kaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69522738D1 publication Critical patent/DE69522738D1/de
Application granted granted Critical
Publication of DE69522738T2 publication Critical patent/DE69522738T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/30Power supply circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
DE69522738T 1994-05-06 1995-05-05 Verfahren und Schaltkreis zum Programmieren einer Schwebegatterspeicherzelle Expired - Lifetime DE69522738T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/239,008 US5412603A (en) 1994-05-06 1994-05-06 Method and circuitry for programming floating-gate memory cell using a single low-voltage supply

Publications (2)

Publication Number Publication Date
DE69522738D1 DE69522738D1 (de) 2001-10-25
DE69522738T2 true DE69522738T2 (de) 2002-07-04

Family

ID=22900226

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69522738T Expired - Lifetime DE69522738T2 (de) 1994-05-06 1995-05-05 Verfahren und Schaltkreis zum Programmieren einer Schwebegatterspeicherzelle

Country Status (4)

Country Link
US (1) US5412603A (de)
EP (1) EP0681296B1 (de)
JP (1) JPH0845291A (de)
DE (1) DE69522738T2 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006023934B3 (de) * 2006-05-19 2007-11-15 Atmel Germany Gmbh Speichervorrichtung mit einer nicht-flüchtigen Speichermatrix
DE102006023933A1 (de) * 2006-05-19 2007-11-29 Atmel Germany Gmbh Speichervorrichtung und Verfahren zur Programmierung einer nicht-flüchtigen Speichermatrix

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Publication number Priority date Publication date Assignee Title
JP2731701B2 (ja) * 1993-06-30 1998-03-25 インターナショナル・ビジネス・マシーンズ・コーポレイション Dramセル
US5659504A (en) * 1995-05-25 1997-08-19 Lucent Technologies Inc. Method and apparatus for hot carrier injection
EP0756286B1 (de) 1995-07-24 2000-01-26 STMicroelectronics S.r.l. Flash-EEPROM mit onchip-Löschung-Source-Spannungsgenerator
US5753952A (en) * 1995-09-22 1998-05-19 Texas Instruments Incorporated Nonvolatile memory cell with P-N junction formed in polysilicon floating gate
US6330190B1 (en) * 1996-05-30 2001-12-11 Hyundai Electronics America Semiconductor structure for flash memory enabling low operating potentials
US5909397A (en) * 1996-10-08 1999-06-01 Texas Instruments Incorporated Method and system for testing and adjusting threshold voltages in flash eeproms
US5912837A (en) * 1996-10-28 1999-06-15 Micron Technology, Inc. Bitline disturb reduction
GB2325546B (en) * 1997-05-21 2001-10-17 Motorola Inc Electrically programmable memory and method of programming
US6240023B1 (en) 1998-02-27 2001-05-29 Micron Technology, Inc. Method for efficiently executing soft programming of a memory block
US6587903B2 (en) 1998-02-27 2003-07-01 Micron Technology, Inc. Soft programming for recovery of overerasure
JP3999900B2 (ja) * 1998-09-10 2007-10-31 株式会社東芝 不揮発性半導体メモリ
US6373094B2 (en) * 1998-09-11 2002-04-16 Texas Instruments Incorporated EEPROM cell using conventional process steps
US6011722A (en) * 1998-10-13 2000-01-04 Lucent Technologies Inc. Method for erasing and programming memory devices
US6141255A (en) * 1999-09-02 2000-10-31 Advanced Micro Devices, Inc. 1 transistor cell for EEPROM application
US6137727A (en) * 2000-01-24 2000-10-24 Advanced Micro Devices, Inc. Reduction of oxide stress through the use of forward biased body voltage
US6747899B2 (en) * 2001-05-14 2004-06-08 Nexflash Technologies, Inc. Method and apparatus for multiple byte or page mode programming of a flash memory array
US6449187B1 (en) 2001-07-17 2002-09-10 Texas Instruments Incorporated Method and apparatus for programming flash memory device
US7387932B2 (en) * 2004-07-06 2008-06-17 Macronix International Co., Ltd. Method for manufacturing a multiple-gate charge trapping non-volatile memory
US20060007732A1 (en) * 2004-07-06 2006-01-12 Macronix International Co., Ltd. Charge trapping non-volatile memory and method for operating same
US8482052B2 (en) 2005-01-03 2013-07-09 Macronix International Co., Ltd. Silicon on insulator and thin film transistor bandgap engineered split gate memory
US7473589B2 (en) * 2005-12-09 2009-01-06 Macronix International Co., Ltd. Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same
US7315474B2 (en) * 2005-01-03 2008-01-01 Macronix International Co., Ltd Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays
US7763927B2 (en) * 2005-12-15 2010-07-27 Macronix International Co., Ltd. Non-volatile memory device having a nitride-oxide dielectric layer
US7907450B2 (en) * 2006-05-08 2011-03-15 Macronix International Co., Ltd. Methods and apparatus for implementing bit-by-bit erase of a flash memory device
US8772858B2 (en) * 2006-10-11 2014-07-08 Macronix International Co., Ltd. Vertical channel memory and manufacturing method thereof and operating method using the same
US7811890B2 (en) * 2006-10-11 2010-10-12 Macronix International Co., Ltd. Vertical channel transistor structure and manufacturing method thereof
US7737488B2 (en) * 2007-08-09 2010-06-15 Macronix International Co., Ltd. Blocking dielectric engineered charge trapping memory cell with high speed erase
US9240405B2 (en) 2011-04-19 2016-01-19 Macronix International Co., Ltd. Memory with off-chip controller

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016588A (en) * 1974-12-27 1977-04-05 Nippon Electric Company, Ltd. Non-volatile semiconductor memory device
JPS59124095A (ja) * 1982-12-29 1984-07-18 Fujitsu Ltd 半導体記憶装置
US4687312A (en) * 1984-06-27 1987-08-18 Panavision, Inc. Matte box assembly
JPH04123471A (ja) * 1990-09-14 1992-04-23 Oki Electric Ind Co Ltd 半導体記憶装置のデータ書込みおよび消去方法
US5313429A (en) * 1992-02-14 1994-05-17 Catalyst Semiconductor, Inc. Memory circuit with pumped voltage for erase and program operations
US5306954A (en) * 1992-06-04 1994-04-26 Sipex Corporation Charge pump with symmetrical +V and -V outputs
US5341342A (en) * 1992-12-18 1994-08-23 National Semiconductor Corporation Flash memory cell structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006023934B3 (de) * 2006-05-19 2007-11-15 Atmel Germany Gmbh Speichervorrichtung mit einer nicht-flüchtigen Speichermatrix
DE102006023933A1 (de) * 2006-05-19 2007-11-29 Atmel Germany Gmbh Speichervorrichtung und Verfahren zur Programmierung einer nicht-flüchtigen Speichermatrix
US7633806B2 (en) 2006-05-19 2009-12-15 Atmel Automotive Gmbh Memory device with a nonvolatile memory array

Also Published As

Publication number Publication date
DE69522738D1 (de) 2001-10-25
EP0681296A2 (de) 1995-11-08
JPH0845291A (ja) 1996-02-16
US5412603A (en) 1995-05-02
EP0681296B1 (de) 2001-09-19
EP0681296A3 (de) 1998-10-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition