DE69605286D1 - Organischer chipträger für chips des drahtbondtpys - Google Patents

Organischer chipträger für chips des drahtbondtpys

Info

Publication number
DE69605286D1
DE69605286D1 DE69605286T DE69605286T DE69605286D1 DE 69605286 D1 DE69605286 D1 DE 69605286D1 DE 69605286 T DE69605286 T DE 69605286T DE 69605286 T DE69605286 T DE 69605286T DE 69605286 D1 DE69605286 D1 DE 69605286D1
Authority
DE
Germany
Prior art keywords
chip carrier
chip
wire bond
chips
tpy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69605286T
Other languages
English (en)
Other versions
DE69605286T2 (de
Inventor
Ashwinkumar Bhatt
Subahu Desai
Thomas Duffy
Jeffrey Knight
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
IBM Schweiz AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Schweiz AG, International Business Machines Corp filed Critical IBM Schweiz AG
Application granted granted Critical
Publication of DE69605286D1 publication Critical patent/DE69605286D1/de
Publication of DE69605286T2 publication Critical patent/DE69605286T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09127—PCB or component having an integral separable or breakable part
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981—Metallised walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Led Device Packages (AREA)
  • Structure Of Printed Boards (AREA)
  • Die Bonding (AREA)
  • Resistance Heating (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
DE69605286T 1995-02-15 1996-01-17 Organischer chipträger für chips des drahtbondtpys Expired - Lifetime DE69605286T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/390,344 US5798909A (en) 1995-02-15 1995-02-15 Single-tiered organic chip carriers for wire bond-type chips
PCT/EP1996/000180 WO1996025763A2 (en) 1995-02-15 1996-01-17 Organic chip carriers for wire bond-type chips

Publications (2)

Publication Number Publication Date
DE69605286D1 true DE69605286D1 (de) 1999-12-30
DE69605286T2 DE69605286T2 (de) 2000-05-25

Family

ID=23542113

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69605286T Expired - Lifetime DE69605286T2 (de) 1995-02-15 1996-01-17 Organischer chipträger für chips des drahtbondtpys

Country Status (17)

Country Link
US (4) US5798909A (de)
EP (1) EP0809862B1 (de)
JP (1) JP3297287B2 (de)
KR (1) KR100213955B1 (de)
CN (2) CN1041470C (de)
AT (1) ATE187014T1 (de)
CA (1) CA2164901C (de)
CZ (1) CZ286385B6 (de)
DE (1) DE69605286T2 (de)
ES (1) ES2139330T3 (de)
HU (1) HU216982B (de)
MY (1) MY140232A (de)
PL (1) PL179061B1 (de)
RU (1) RU2146067C1 (de)
SG (1) SG34493A1 (de)
TW (2) TW301795B (de)
WO (1) WO1996025763A2 (de)

Families Citing this family (92)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5798909A (en) * 1995-02-15 1998-08-25 International Business Machines Corporation Single-tiered organic chip carriers for wire bond-type chips
JPH0964244A (ja) * 1995-08-17 1997-03-07 Hitachi Ltd 半導体装置およびその製造方法
US6734545B1 (en) * 1995-11-29 2004-05-11 Hitachi, Ltd. BGA type semiconductor device and electronic equipment using the same
US5766499A (en) * 1996-04-26 1998-06-16 International Business Machines Corporation Method of making a circuitized substrate
US6301122B1 (en) * 1996-06-13 2001-10-09 Matsushita Electric Industrial Co., Ltd. Radio frequency module with thermally and electrically coupled metal film on insulating substrate
JP3050807B2 (ja) * 1996-06-19 2000-06-12 イビデン株式会社 多層プリント配線板
DE19625756A1 (de) * 1996-06-27 1998-01-02 Bosch Gmbh Robert Modul für ein elektrisches Gerät
JP3050812B2 (ja) * 1996-08-05 2000-06-12 イビデン株式会社 多層プリント配線板
US6043559A (en) 1996-09-09 2000-03-28 Intel Corporation Integrated circuit package which contains two in plane voltage busses and a wrap around conductive strip that connects a bond finger to one of the busses
US5808870A (en) * 1996-10-02 1998-09-15 Stmicroelectronics, Inc. Plastic pin grid array package
JP3382482B2 (ja) * 1996-12-17 2003-03-04 新光電気工業株式会社 半導体パッケージ用回路基板の製造方法
US5953594A (en) * 1997-03-20 1999-09-14 International Business Machines Corporation Method of making a circuitized substrate for chip carrier structure
US5889654A (en) * 1997-04-09 1999-03-30 International Business Machines Corporation Advanced chip packaging structure for memory card applications
US6115910A (en) * 1997-05-08 2000-09-12 Lsi Logic Corporation Misregistration fidutial
US6160705A (en) * 1997-05-09 2000-12-12 Texas Instruments Incorporated Ball grid array package and method using enhanced power and ground distribution circuitry
US6107683A (en) * 1997-06-20 2000-08-22 Substrate Technologies Incorporated Sequentially built integrated circuit package
US5872400A (en) * 1997-06-25 1999-02-16 International Business Machines Corporation High melting point solder ball coated with a low melting point solder
GB2335075A (en) * 1998-03-02 1999-09-08 Ericsson Telefon Ab L M Heat transfer from a single electronic device
US6110650A (en) * 1998-03-17 2000-08-29 International Business Machines Corporation Method of making a circuitized substrate
US6111301A (en) * 1998-04-24 2000-08-29 International Business Machines Corporation Interconnection with integrated corrosion stop
US6696366B1 (en) * 1998-08-17 2004-02-24 Lam Research Corporation Technique for etching a low capacitance dielectric layer
US6674163B1 (en) * 1998-08-18 2004-01-06 Oki Electric Industry Co., Ltd. Package structure for a semiconductor device
TW399309B (en) * 1998-09-30 2000-07-21 World Wiser Electronics Inc Cavity-down package structure with thermal via
US6329713B1 (en) * 1998-10-21 2001-12-11 International Business Machines Corporation Integrated circuit chip carrier assembly comprising a stiffener attached to a dielectric substrate
JP3677403B2 (ja) * 1998-12-07 2005-08-03 パイオニア株式会社 発熱素子の放熱構造
EP1030366B1 (de) * 1999-02-15 2005-10-19 Mitsubishi Gas Chemical Company, Inc. Leiterplatte für Plastikhalbleitergehäuse
US6207354B1 (en) 1999-04-07 2001-03-27 International Business Machines Coporation Method of making an organic chip carrier package
TW413874B (en) * 1999-04-12 2000-12-01 Siliconware Precision Industries Co Ltd BGA semiconductor package having exposed heat dissipation layer and its manufacturing method
SE515856C2 (sv) * 1999-05-19 2001-10-22 Ericsson Telefon Ab L M Bärare för elektronikkomponenter
US6242279B1 (en) * 1999-06-14 2001-06-05 Thin Film Module, Inc. High density wire bond BGA
US6221693B1 (en) 1999-06-14 2001-04-24 Thin Film Module, Inc. High density flip chip BGA
US6221694B1 (en) 1999-06-29 2001-04-24 International Business Machines Corporation Method of making a circuitized substrate with an aperture
US6542379B1 (en) 1999-07-15 2003-04-01 International Business Machines Corporation Circuitry with integrated passive components and method for producing
US6122171A (en) 1999-07-30 2000-09-19 Micron Technology, Inc. Heat sink chip package and method of making
US6277672B1 (en) 1999-09-03 2001-08-21 Thin Film Module, Inc. BGA package for high density cavity-up wire bond device connections using a metal panel, thin film and build up multilayer technology
US6562545B1 (en) * 1999-09-17 2003-05-13 Micron Technology, Inc. Method of making a socket assembly for use with a solder ball
US6287890B1 (en) 1999-10-18 2001-09-11 Thin Film Module, Inc. Low cost decal material used for packaging
US6197614B1 (en) * 1999-12-20 2001-03-06 Thin Film Module, Inc. Quick turn around fabrication process for packaging substrates and high density cards
US6294477B1 (en) 1999-12-20 2001-09-25 Thin Film Module, Inc. Low cost high density thin film processing
US6420207B1 (en) * 2000-01-04 2002-07-16 Multek Hong Kong Limited Semiconductor package and enhanced FBG manufacturing
JP2001217279A (ja) * 2000-02-01 2001-08-10 Mitsubishi Electric Corp 高密度実装装置
DE50101290D1 (de) * 2000-02-11 2004-02-12 E & E Elektronik Gmbh Sensoranordnung
US6426565B1 (en) 2000-03-22 2002-07-30 International Business Machines Corporation Electronic package and method of making same
US6534852B1 (en) * 2000-04-11 2003-03-18 Advanced Semiconductor Engineering, Inc. Ball grid array semiconductor package with improved strength and electric performance and method for making the same
US6838758B1 (en) * 2000-05-10 2005-01-04 Advanced Micro Devices, Inc. Package and method for making an underfilled integrated circuit
US6459586B1 (en) * 2000-08-15 2002-10-01 Galaxy Power, Inc. Single board power supply with thermal conductors
US6518868B1 (en) 2000-08-15 2003-02-11 Galaxy Power, Inc. Thermally conducting inductors
US6395998B1 (en) 2000-09-13 2002-05-28 International Business Machines Corporation Electronic package having an adhesive retaining cavity
TW521409B (en) * 2000-10-06 2003-02-21 Shing Chen Package of LED
US7221043B1 (en) * 2000-10-20 2007-05-22 Silverbrook Research Pty Ltd Integrated circuit carrier with recesses
US6801438B1 (en) * 2000-10-24 2004-10-05 Touch Future Technolocy Ltd. Electrical circuit and method of formation
US6882042B2 (en) * 2000-12-01 2005-04-19 Broadcom Corporation Thermally and electrically enhanced ball grid array packaging
US7161239B2 (en) * 2000-12-22 2007-01-09 Broadcom Corporation Ball grid array package enhanced with a thermal and electrical connector
US20020079572A1 (en) * 2000-12-22 2002-06-27 Khan Reza-Ur Rahman Enhanced die-up ball grid array and method for making the same
US6906414B2 (en) * 2000-12-22 2005-06-14 Broadcom Corporation Ball grid array package with patterned stiffener layer
US7132744B2 (en) * 2000-12-22 2006-11-07 Broadcom Corporation Enhanced die-up ball grid array packages and method for making the same
US6853070B2 (en) 2001-02-15 2005-02-08 Broadcom Corporation Die-down ball grid array package with die-attached heat spreader and method for making the same
TW511414B (en) * 2001-04-19 2002-11-21 Via Tech Inc Data processing system and method, and control chip, and printed circuit board thereof
US7259448B2 (en) * 2001-05-07 2007-08-21 Broadcom Corporation Die-up ball grid array package with a heat spreader and method for making the same
US6903278B2 (en) * 2001-06-29 2005-06-07 Intel Corporation Arrangements to provide mechanical stiffening elements to a thin-core or coreless substrate
US6639801B2 (en) * 2001-08-10 2003-10-28 Agilent Technologies, Inc. Mechanical packaging architecture for heat dissipation
US6879039B2 (en) 2001-12-18 2005-04-12 Broadcom Corporation Ball grid array package substrates and method of making the same
TW200302685A (en) * 2002-01-23 2003-08-01 Matsushita Electric Ind Co Ltd Circuit component built-in module and method of manufacturing the same
US6861750B2 (en) * 2002-02-01 2005-03-01 Broadcom Corporation Ball grid array package with multiple interposers
US6825108B2 (en) * 2002-02-01 2004-11-30 Broadcom Corporation Ball grid array package fabrication with IC die support structures
US7550845B2 (en) 2002-02-01 2009-06-23 Broadcom Corporation Ball grid array package with separated stiffener layer
US7245500B2 (en) * 2002-02-01 2007-07-17 Broadcom Corporation Ball grid array package with stepped stiffener layer
US20030150641A1 (en) * 2002-02-14 2003-08-14 Noyan Kinayman Multilayer package for a semiconductor device
US6876553B2 (en) 2002-03-21 2005-04-05 Broadcom Corporation Enhanced die-up ball grid array package with two substrates
US7196415B2 (en) 2002-03-22 2007-03-27 Broadcom Corporation Low voltage drop and high thermal performance ball grid array package
US6835260B2 (en) * 2002-10-04 2004-12-28 International Business Machines Corporation Method to produce pedestal features in constrained sintered substrates
US7126210B2 (en) * 2003-04-02 2006-10-24 Stmicroelectronics, Inc. System and method for venting pressure from an integrated circuit package sealed with a lid
US6916697B2 (en) * 2003-10-08 2005-07-12 Lam Research Corporation Etch back process using nitrous oxide
US7432586B2 (en) 2004-06-21 2008-10-07 Broadcom Corporation Apparatus and method for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packages
US7411281B2 (en) * 2004-06-21 2008-08-12 Broadcom Corporation Integrated circuit device package having both wire bond and flip-chip interconnections and method of making the same
US7482686B2 (en) 2004-06-21 2009-01-27 Braodcom Corporation Multipiece apparatus for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packages and method of making the same
US7786591B2 (en) 2004-09-29 2010-08-31 Broadcom Corporation Die down ball grid array package
WO2006120826A1 (ja) * 2005-05-12 2006-11-16 Murata Manufacturing Co., Ltd. セラミック多層基板
US8183680B2 (en) 2006-05-16 2012-05-22 Broadcom Corporation No-lead IC packages having integrated heat spreader for electromagnetic interference (EMI) shielding and thermal enhancement
JP2008091714A (ja) * 2006-10-03 2008-04-17 Rohm Co Ltd 半導体装置
JP5197953B2 (ja) * 2006-12-27 2013-05-15 新光電気工業株式会社 リードフレーム及びその製造方法、及び半導体装置
DE102007056269A1 (de) * 2007-10-22 2009-04-23 Rohde & Schwarz Gmbh & Co. Kg Gekühltes Multichipmodul
CN101727152A (zh) * 2008-10-16 2010-06-09 鸿富锦精密工业（深圳）有限公司 电脑主板
US8612731B2 (en) 2009-11-06 2013-12-17 International Business Machines Corporation Branch target buffer for emulation environments
TW201545614A (zh) * 2014-05-02 2015-12-01 R&D Circuits Inc 製備殼體以接收用於嵌入式元件印刷電路板之元件的結構和方法
RU2584575C1 (ru) * 2014-12-25 2016-05-20 Общество с ограниченной ответственностью "ЗЕЛНАС" Интерпозер и способ его изготовления
US9460980B2 (en) 2015-02-18 2016-10-04 Qualcomm Incorporated Systems, apparatus, and methods for heat dissipation
US9401350B1 (en) 2015-07-29 2016-07-26 Qualcomm Incorporated Package-on-package (POP) structure including multiple dies
US20170309549A1 (en) * 2016-04-21 2017-10-26 Texas Instruments Incorporated Sintered Metal Flip Chip Joints
CN112888148A (zh) * 2021-01-12 2021-06-01 宁化宽信科技服务有限公司 一种印刷电路板
CN113539993B (zh) * 2021-07-07 2023-06-09 江西龙芯微科技有限公司 集成半导体器件及其制造方法
CN114252964A (zh) * 2021-12-02 2022-03-29 昂纳信息技术（深圳）有限公司 一种芯片散热装置、芯片模块和电子设备

Family Cites Families (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5683051A (en) * 1979-12-11 1981-07-07 Matsushita Electric Ind Co Ltd Semiconductor device
JPS58159355A (ja) * 1982-03-17 1983-09-21 Nec Corp 半導体装置の製造方法
JPS6035543A (ja) * 1983-08-08 1985-02-23 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS60116191A (ja) * 1983-11-29 1985-06-22 イビデン株式会社 電子部品搭載用基板の製造方法
JPS60154543A (ja) * 1984-01-24 1985-08-14 Nec Corp 合成樹脂基板を用いた半導体装置
JPS61140153A (ja) * 1984-12-12 1986-06-27 Hitachi Ltd 半導体装置
JPS61198656A (ja) * 1985-02-27 1986-09-03 Nec Corp 半導体装置
US4729061A (en) * 1985-04-29 1988-03-01 Advanced Micro Devices, Inc. Chip on board package for integrated circuit devices using printed circuit boards and means for conveying the heat to the opposite side of the package from the chip mounting side to permit the heat to dissipate therefrom
US4640010A (en) * 1985-04-29 1987-02-03 Advanced Micro Devices, Inc. Method of making a package utilizing a self-aligning photoexposure process
US4902610A (en) * 1985-08-02 1990-02-20 Shipley Company Inc. Method for manufacture of multilayer circuit board
US5246817A (en) * 1985-08-02 1993-09-21 Shipley Company, Inc. Method for manufacture of multilayer circuit board
FR2599893B1 (fr) * 1986-05-23 1996-08-02 Ricoh Kk Procede de montage d'un module electronique sur un substrat et carte a circuit integre
US4731701A (en) * 1987-05-12 1988-03-15 Fairchild Semiconductor Corporation Integrated circuit package with thermal path layers incorporating staggered thermal vias
US4993148A (en) * 1987-05-19 1991-02-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a circuit board
JP2755594B2 (ja) * 1988-03-30 1998-05-20 株式会社 東芝 セラミックス回路基板
EP0341504A3 (de) * 1988-05-09 1991-01-16 General Electric Company Plastik-Chipträgerpackung und Verfahren zum Herstellen derselben
JP2660295B2 (ja) * 1988-08-24 1997-10-08 イビデン株式会社 電子部品搭載用基板
JPH02186670A (ja) * 1989-01-13 1990-07-20 Nec Eng Ltd 半導体集積回路
US4999740A (en) * 1989-03-06 1991-03-12 Allied-Signal Inc. Electronic device for managing and dissipating heat and for improving inspection and repair, and method of manufacture thereof
JPH0322460A (ja) * 1989-06-19 1991-01-30 Nec Corp 半導体集積回路
WO1993017457A1 (en) * 1989-07-01 1993-09-02 Ryo Enomoto Substrate for mounting semiconductor and method of producing the same
JPH0360050A (ja) * 1989-07-27 1991-03-15 Nec Ic Microcomput Syst Ltd 半導体装置
US5223741A (en) * 1989-09-01 1993-06-29 Tactical Fabs, Inc. Package for an integrated circuit structure
US5355280A (en) * 1989-09-27 1994-10-11 Robert Bosch Gmbh Connection arrangement with PC board
US5036163A (en) * 1989-10-13 1991-07-30 Honeywell Inc. Universal semiconductor chip package
JP2813682B2 (ja) * 1989-11-09 1998-10-22 イビデン株式会社 電子部品搭載用基板
US5045921A (en) * 1989-12-26 1991-09-03 Motorola, Inc. Pad array carrier IC device using flexible tape
US5235211A (en) * 1990-06-22 1993-08-10 Digital Equipment Corporation Semiconductor package having wraparound metallization
JPH04129250A (ja) * 1990-09-20 1992-04-30 Nec Corp 薄型混成集積回路基板
JPH04158555A (ja) * 1990-10-22 1992-06-01 Nec Corp チップキャリア型半導体装置
FI88241C (fi) * 1990-10-30 1993-04-13 Nokia Mobile Phones Ltd Foerfarande foer framstaellning av kretskort
JP2872825B2 (ja) * 1991-05-13 1999-03-24 三菱電機株式会社 半導体装置用パッケージ
US5102829A (en) * 1991-07-22 1992-04-07 At&T Bell Laboratories Plastic pin grid array package
US5239448A (en) * 1991-10-28 1993-08-24 International Business Machines Corporation Formulation of multichip modules
JP2766920B2 (ja) * 1992-01-07 1998-06-18 三菱電機株式会社 Ｉｃパッケージ及びその実装方法
US5262280A (en) * 1992-04-02 1993-11-16 Shipley Company Inc. Radiation sensitive compositions
JPH05315778A (ja) * 1992-05-13 1993-11-26 Ibiden Co Ltd ヒートシンクを備えた電子部品搭載用基板
US5249101A (en) * 1992-07-06 1993-09-28 International Business Machines Corporation Chip carrier with protective coating for circuitized surface
US5583377A (en) * 1992-07-15 1996-12-10 Motorola, Inc. Pad array semiconductor device having a heat sink with die receiving cavity
US5285352A (en) * 1992-07-15 1994-02-08 Motorola, Inc. Pad array semiconductor device with thermal conductor and process for making the same
US5729894A (en) * 1992-07-21 1998-03-24 Lsi Logic Corporation Method of assembling ball bump grid array semiconductor packages
US5468994A (en) * 1992-12-10 1995-11-21 Hewlett-Packard Company High pin count package for semiconductor device
US5291062A (en) * 1993-03-01 1994-03-01 Motorola, Inc. Area array semiconductor device having a lid with functional contacts
US5340771A (en) * 1993-03-18 1994-08-23 Lsi Logic Corporation Techniques for providing high I/O count connections to semiconductor dies
US5355283A (en) * 1993-04-14 1994-10-11 Amkor Electronics, Inc. Ball grid array with via interconnection
US5397917A (en) * 1993-04-26 1995-03-14 Motorola, Inc. Semiconductor package capable of spreading heat
JPH06314859A (ja) * 1993-04-28 1994-11-08 Ibiden Co Ltd 電子部品搭載用基板及びその製造方法
US5474958A (en) * 1993-05-04 1995-12-12 Motorola, Inc. Method for making semiconductor device having no die supporting surface
US5485038A (en) * 1993-07-15 1996-01-16 Hughes Aircraft Company Microelectronic circuit substrate structure including photoimageable epoxy dielectric layers
US5420460A (en) * 1993-08-05 1995-05-30 Vlsi Technology, Inc. Thin cavity down ball grid array package based on wirebond technology
US5357672A (en) * 1993-08-13 1994-10-25 Lsi Logic Corporation Method and system for fabricating IC packages from laminated boards and heat spreader
US5397921A (en) * 1993-09-03 1995-03-14 Advanced Semiconductor Assembly Technology Tab grid array
US5455456A (en) * 1993-09-15 1995-10-03 Lsi Logic Corporation Integrated circuit package lid
US5490324A (en) * 1993-09-15 1996-02-13 Lsi Logic Corporation Method of making integrated circuit package having multiple bonding tiers
US5545923A (en) * 1993-10-22 1996-08-13 Lsi Logic Corporation Semiconductor device assembly with minimized bond finger connections
US5444296A (en) * 1993-11-22 1995-08-22 Sun Microsystems, Inc. Ball grid array packages for high speed applications
TW258829B (de) * 1994-01-28 1995-10-01 Ibm
US5525834A (en) * 1994-10-17 1996-06-11 W. L. Gore & Associates, Inc. Integrated circuit package
US5798909A (en) * 1995-02-15 1998-08-25 International Business Machines Corporation Single-tiered organic chip carriers for wire bond-type chips
US5648200A (en) * 1995-03-22 1997-07-15 Macdermid, Incorporated Process for creating circuitry on the surface of a photoimageable dielectric

Also Published As

Publication number Publication date
RU2146067C1 (ru) 2000-02-27
EP0809862A2 (de) 1997-12-03
PL321595A1 (en) 1997-12-08
MY140232A (en) 2009-12-31
ES2139330T3 (es) 2000-02-01
CN1041470C (zh) 1998-12-30
SG34493A1 (en) 1996-12-06
CZ225697A3 (cs) 1998-01-14
CN1134601A (zh) 1996-10-30
KR960032659A (ko) 1996-09-17
DE69605286T2 (de) 2000-05-25
TW297935B (de) 1997-02-11
ATE187014T1 (de) 1999-12-15
CZ286385B6 (cs) 2000-03-15
CN1150613C (zh) 2004-05-19
KR100213955B1 (ko) 1999-08-02
US6038137A (en) 2000-03-14
WO1996025763A3 (en) 1996-11-07
US5599747A (en) 1997-02-04
US5724232A (en) 1998-03-03
JPH08241936A (ja) 1996-09-17
JP3297287B2 (ja) 2002-07-02
TW301795B (de) 1997-04-01
CA2164901C (en) 2003-02-11
HUP9702316A2 (hu) 1998-03-02
CN1205548A (zh) 1999-01-20
HUP9702316A3 (en) 1998-12-28
CA2164901A1 (en) 1996-08-16
PL179061B1 (pl) 2000-07-31
US5798909A (en) 1998-08-25
HU216982B (hu) 1999-10-28
EP0809862B1 (de) 1999-11-24
WO1996025763A2 (en) 1996-08-22

Similar Documents

Publication Publication Date Title
DE69605286D1 (de) Organischer chipträger für chips des drahtbondtpys
KR970030203A (ko) Bga 반도체 패키지의 pcb캐리어 프레임 및 그 제조방법
MY163963A (en) Semiconductor package having oxidation-free copper wire
TW358230B (en) Semiconductor package
SG52901A1 (en) An electrode structure of semiconductor integrated circuit and method for forming the package therefor
TW200514282A (en) Package for a semiconductor light emitting device
KR20040027110A (ko) 절연성 세라믹 히트 싱크를 갖는 디스크리트 패키지
SG60102A1 (en) Lead frame semiconductor package having the same and method for manufacturing the same
TW369710B (en) Semiconductor apparatus and its producing method
TW560698U (en) Structure of chip package
FR2557755B1 (fr) Substrat de cablage multi-couche
KR900019545A (ko) 표면장착용 배선기판의 제조방법
JPS6473669A (en) Semiconductor integrated circuit
TW200516737A (en) Chip package and substrate
JPS57126154A (en) Lsi package
JPS57166051A (en) Semiconductor device
JPS5649550A (en) Semiconductor device
SG73480A1 (en) High density integrated circuit package
TW200511526A (en) Chip structure
JPS56142659A (en) Semiconductor device
JPS56159179A (en) Thermal recording head
KR960043134A (ko) 중간 도전성 베이스를 이용한 멀티칩 반도체 패키지 및 그 제조방법
JPS5730355A (en) Plating structure for semiconductor material
JP2001267351A (ja) ワイヤボンディング構造
JPS57115851A (en) Semiconductor device

Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: INTERNATIONAL BUSINESS MACHINES CORP., ARMONK,, US

8328 Change in the person/name/address of the agent

Representative=s name: DUSCHER, R., DIPL.-PHYS. DR. RER. NAT., PAT.-ASS.,