DE69606065D1 - Dynamischer speicher mit niedriger spannung - Google Patents

Dynamischer speicher mit niedriger spannung

Info

Publication number
DE69606065D1
DE69606065D1 DE69606065T DE69606065T DE69606065D1 DE 69606065 D1 DE69606065 D1 DE 69606065D1 DE 69606065 T DE69606065 T DE 69606065T DE 69606065 T DE69606065 T DE 69606065T DE 69606065 D1 DE69606065 D1 DE 69606065D1
Authority
DE
Germany
Prior art keywords
low voltage
voltage memory
dynamic low
dynamic
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69606065T
Other languages
English (en)
Other versions
DE69606065T2 (de
Inventor
Mirmajid Seyyedy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of DE69606065D1 publication Critical patent/DE69606065D1/de
Publication of DE69606065T2 publication Critical patent/DE69606065T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065Differential amplifiers of latching type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
DE69606065T 1995-11-13 1996-11-13 Dynamischer speicher mit niedriger spannung Expired - Lifetime DE69606065T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/559,183 US5636170A (en) 1995-11-13 1995-11-13 Low voltage dynamic memory
PCT/US1996/018223 WO1997018564A1 (en) 1995-11-13 1996-11-13 Low voltage dynamic memory

Publications (2)

Publication Number Publication Date
DE69606065D1 true DE69606065D1 (de) 2000-02-10
DE69606065T2 DE69606065T2 (de) 2000-08-10

Family

ID=24232613

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69606065T Expired - Lifetime DE69606065T2 (de) 1995-11-13 1996-11-13 Dynamischer speicher mit niedriger spannung

Country Status (8)

Country Link
US (2) US5636170A (de)
EP (1) EP0867026B1 (de)
JP (1) JP3472930B2 (de)
KR (1) KR100276540B1 (de)
AU (1) AU7679896A (de)
DE (1) DE69606065T2 (de)
TW (1) TW375741B (de)
WO (1) WO1997018564A1 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE40552E1 (en) * 1990-04-06 2008-10-28 Mosaid Technologies, Inc. Dynamic random access memory using imperfect isolating transistors
US5636170A (en) * 1995-11-13 1997-06-03 Micron Technology, Inc. Low voltage dynamic memory
US5835433A (en) * 1997-06-09 1998-11-10 Micron Technology, Inc. Floating isolation gate from DRAM sensing
US5875141A (en) * 1997-08-14 1999-02-23 Micron Technology, Inc. Circuit and method for a memory device with P-channel isolation gates
US5862089A (en) * 1997-08-14 1999-01-19 Micron Technology, Inc. Method and memory device for dynamic cell plate sensing with ac equilibrate
US5973352A (en) 1997-08-20 1999-10-26 Micron Technology, Inc. Ultra high density flash memory having vertically stacked devices
US6477098B1 (en) * 1997-12-19 2002-11-05 Micron Technology, Inc. Dynamic random access memory array having segmented digit lines
US6141259A (en) * 1998-02-18 2000-10-31 Texas Instruments Incorporated Dynamic random access memory having reduced array voltage
US5936898A (en) * 1998-04-02 1999-08-10 Vanguard International Semiconductor Corporation Bit-line voltage limiting isolation circuit
US6137739A (en) * 1998-06-29 2000-10-24 Hyundai Electronics Industries Co., Ltd. Multilevel sensing circuit and method thereof
US5949720A (en) * 1998-10-30 1999-09-07 Stmicroelectronics, Inc. Voltage clamping method and apparatus for dynamic random access memory devices
US6292417B1 (en) 2000-07-26 2001-09-18 Micron Technology, Inc. Memory device with reduced bit line pre-charge voltage
US6301175B1 (en) 2000-07-26 2001-10-09 Micron Technology, Inc. Memory device with single-ended sensing and low voltage pre-charge
KR100650712B1 (ko) * 2000-12-27 2006-11-27 주식회사 하이닉스반도체 게이트 분리 센스 앰프
US6424001B1 (en) 2001-02-09 2002-07-23 Micron Technology, Inc. Flash memory with ultra thin vertical body transistors
US6559491B2 (en) * 2001-02-09 2003-05-06 Micron Technology, Inc. Folded bit line DRAM with ultra thin body transistors
US6496034B2 (en) * 2001-02-09 2002-12-17 Micron Technology, Inc. Programmable logic arrays with ultra thin body transistors
US6566682B2 (en) * 2001-02-09 2003-05-20 Micron Technology, Inc. Programmable memory address and decode circuits with ultra thin vertical body transistors
US6531727B2 (en) * 2001-02-09 2003-03-11 Micron Technology, Inc. Open bit line DRAM with ultra thin body transistors
US7160577B2 (en) 2002-05-02 2007-01-09 Micron Technology, Inc. Methods for atomic-layer deposition of aluminum oxides in integrated circuits
CN100407335C (zh) * 2003-05-09 2008-07-30 联发科技股份有限公司 差动式只读存储器的预充电及检测电路
US6961277B2 (en) * 2003-07-08 2005-11-01 Micron Technology, Inc. Method of refreshing a PCRAM memory device
US7372092B2 (en) * 2005-05-05 2008-05-13 Micron Technology, Inc. Memory cell, device, and system
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
US7505341B2 (en) * 2006-05-17 2009-03-17 Micron Technology, Inc. Low voltage sense amplifier and sensing method
US7408813B2 (en) * 2006-08-03 2008-08-05 Micron Technology, Inc. Block erase for volatile memory
KR101050699B1 (ko) 2008-04-04 2011-07-20 엘피다 메모리 가부시키가이샤 반도체 메모리 디바이스
US8125829B2 (en) 2008-05-02 2012-02-28 Micron Technology, Inc. Biasing system and method
JP2013531860A (ja) * 2010-06-10 2013-08-08 モサイド・テクノロジーズ・インコーポレーテッド センス増幅器およびビット線分離を備える半導体メモリデバイス
WO2012008198A1 (ja) * 2010-07-16 2012-01-19 シャープ株式会社 光センサ付き表示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4351034A (en) * 1980-10-10 1982-09-21 Inmos Corporation Folded bit line-shared sense amplifiers
GB9007789D0 (en) * 1990-04-06 1990-06-06 Foss Richard C Method for dram sensing current control
US5280452A (en) * 1991-07-12 1994-01-18 International Business Machines Corporation Power saving semsing circuits for dynamic random access memory
US5175450A (en) * 1991-08-23 1992-12-29 Micron Technology, Inc. Apparatus for providing multi-level potentials at a sense node
JPH05159575A (ja) * 1991-12-04 1993-06-25 Oki Electric Ind Co Ltd ダイナミックランダムアクセスメモリ
EP0852381B1 (de) * 1992-11-12 2005-11-16 ProMOS Technologies, Inc. Leseverstärker mit lokalen Schreibtreibern
US5367213A (en) * 1993-06-09 1994-11-22 Micron Semiconductor, Inc. P-channel sense amplifier pull-up circuit incorporating a voltage comparator for use in DRAM memories having non-bootstrapped word lines
KR960011207B1 (ko) * 1993-11-17 1996-08-21 김광호 반도체 메모리 장치의 데이타 센싱방법 및 그 회로
US5636170A (en) * 1995-11-13 1997-06-03 Micron Technology, Inc. Low voltage dynamic memory

Also Published As

Publication number Publication date
KR19990036363A (ko) 1999-05-25
WO1997018564A1 (en) 1997-05-22
DE69606065T2 (de) 2000-08-10
TW375741B (en) 1999-12-01
JP3472930B2 (ja) 2003-12-02
US5636170A (en) 1997-06-03
KR100276540B1 (ko) 2001-01-15
JP2000505227A (ja) 2000-04-25
EP0867026B1 (de) 2000-01-05
US5856939A (en) 1999-01-05
EP0867026A1 (de) 1998-09-30
AU7679896A (en) 1997-06-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: ANWALTSKANZLEI GULDE HENGELHAUPT ZIEBIG & SCHNEIDE