DE69615568D1 - Verfahren und vorrichtung zur verifikation einer speicherzelle von einer nichtflüssigen speicherschaltung - Google Patents

Verfahren und vorrichtung zur verifikation einer speicherzelle von einer nichtflüssigen speicherschaltung

Info

Publication number
DE69615568D1
DE69615568D1 DE69615568T DE69615568T DE69615568D1 DE 69615568 D1 DE69615568 D1 DE 69615568D1 DE 69615568 T DE69615568 T DE 69615568T DE 69615568 T DE69615568 T DE 69615568T DE 69615568 D1 DE69615568 D1 DE 69615568D1
Authority
DE
Germany
Prior art keywords
sampling period
verification
state
flip
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69615568T
Other languages
English (en)
Other versions
DE69615568T2 (de
Inventor
F Roohparvar
S Briner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of DE69615568D1 publication Critical patent/DE69615568D1/de
Publication of DE69615568T2 publication Critical patent/DE69615568T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/344Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445Circuits or methods to verify correct erasure of nonvolatile memory cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3454Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459Circuits or methods to verify correct programming of nonvolatile memory cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38Response verification devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52Protection of memory contents; Detection of errors in memory contents
DE69615568T 1995-07-26 1996-07-03 Verfahren und vorrichtung zur verifikation einer speicherzelle von einer nichtflüssigen speicherschaltung Expired - Lifetime DE69615568T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/507,160 US5568426A (en) 1995-07-26 1995-07-26 Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
PCT/US1996/011354 WO1997005626A1 (en) 1995-07-26 1996-07-03 Method and apparatus for performing memory cell verification on a nonvolatile memory circuit

Publications (2)

Publication Number Publication Date
DE69615568D1 true DE69615568D1 (de) 2001-10-31
DE69615568T2 DE69615568T2 (de) 2002-06-06

Family

ID=24017488

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69615568T Expired - Lifetime DE69615568T2 (de) 1995-07-26 1996-07-03 Verfahren und vorrichtung zur verifikation einer speicherzelle von einer nichtflüssigen speicherschaltung

Country Status (8)

Country Link
US (2) US5568426A (de)
EP (1) EP0842516B1 (de)
JP (1) JP3648534B2 (de)
KR (1) KR100273179B1 (de)
AT (1) ATE206243T1 (de)
AU (1) AU6453796A (de)
DE (1) DE69615568T2 (de)
WO (1) WO1997005626A1 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5538141A (en) * 1994-09-27 1996-07-23 Intel Corporation Test flow assurance using memory imprinting
US5568426A (en) * 1995-07-26 1996-10-22 Micron Quantum Devices, Inc. Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
US5675540A (en) * 1996-01-22 1997-10-07 Micron Quantum Devices, Inc. Non-volatile memory system having internal data verification test mode
KR100223868B1 (ko) * 1996-07-12 1999-10-15 구본준 비휘발성 메모리를 프로그램하는 방법
US5907855A (en) * 1996-10-15 1999-05-25 Micron Technology, Inc. Apparatus and method for reducing programming cycles for multistate memory system
US6728825B1 (en) * 1996-10-15 2004-04-27 Micron Technology, Inc. Apparatus and method for reducing programming cycles for multistate memory system
FR2761191B1 (fr) * 1997-03-20 1999-06-25 Sgs Thomson Microelectronics Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot
US6529417B2 (en) 1997-04-18 2003-03-04 Micron Technology, Inc. Source regulation circuit for flash memory erasure
US6097632A (en) * 1997-04-18 2000-08-01 Micron Technology, Inc. Source regulation circuit for an erase operation of flash memory
US6146943A (en) * 1997-07-09 2000-11-14 Hyundai Electronics Industries Co., Ltd. Method for fabricating nonvolatile memory device
JP3749354B2 (ja) * 1997-08-11 2006-02-22 富士通株式会社 不揮発性半導体記憶装置
US6081870A (en) * 1997-11-06 2000-06-27 Micron Technology, Inc. Method and apparatus to achieve fast suspend in flash memories
US6587903B2 (en) 1998-02-27 2003-07-01 Micron Technology, Inc. Soft programming for recovery of overerasure
US6240023B1 (en) 1998-02-27 2001-05-29 Micron Technology, Inc. Method for efficiently executing soft programming of a memory block
US6285608B1 (en) 1998-03-20 2001-09-04 Micron Technology, Inc. Method and apparatus for using supply voltage for testing in semiconductor memory devices
US6044019A (en) 1998-10-23 2000-03-28 Sandisk Corporation Non-volatile memory with improved sensing and method therefor
US6490200B2 (en) * 2000-03-27 2002-12-03 Sandisk Corporation Non-volatile memory with improved sensing and method therefor
KR100390942B1 (ko) * 2000-12-29 2003-07-10 주식회사 하이닉스반도체 플래쉬 메모리 소자의 검증 회로
US6549467B2 (en) * 2001-03-09 2003-04-15 Micron Technology, Inc. Non-volatile memory device with erase address register
US6452836B1 (en) 2001-03-09 2002-09-17 Micron Technology, Inc. Non-volatile memory device with erase cycle register
US6490202B2 (en) 2001-04-06 2002-12-03 Micron Technology, Inc. Non-volatile memory device with erase register
US6385091B1 (en) 2001-05-01 2002-05-07 Micron Technology, Inc. Read reference scheme for non-volatile memory
US6614695B2 (en) 2001-08-24 2003-09-02 Micron Technology, Inc. Non-volatile memory with block erase
US7251711B2 (en) * 2002-05-28 2007-07-31 Micron Technology, Inc. Apparatus and methods having a command sequence
JP5262002B2 (ja) * 2007-07-11 2013-08-14 富士通株式会社 コンピュータ装置の試験方法及び装置及びプログラム
US7937647B2 (en) * 2007-07-27 2011-05-03 Actel Corporation Error-detecting and correcting FPGA architecture
US8460947B2 (en) * 2008-09-24 2013-06-11 Hewlett-Packard Development Company, L.P. Fluid ejection device and method
KR102567134B1 (ko) * 2018-10-01 2023-08-16 삼성전자주식회사 엑스선 조사량 측정 장치, 이를 포함하는 반도체 메모리 장치 및 반도체 메모리 장치의 테스트 방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4412327A (en) * 1981-02-25 1983-10-25 Western Electric Company, Inc. Test circuit for checking memory output state continuously during time window
US5117426A (en) * 1990-03-26 1992-05-26 Texas Instruments Incorporated Circuit, device, and method to detect voltage leakage
JP3454520B2 (ja) * 1990-11-30 2003-10-06 インテル・コーポレーション フラッシュ記憶装置の書込み状態を確認する回路及びその方法
KR960002006B1 (ko) * 1991-03-12 1996-02-09 가부시끼가이샤 도시바 2개의 기준 레벨을 사용하는 기록 검증 제어기를 갖는 전기적으로 소거 가능하고 프로그램 가능한 불휘발성 메모리 장치
JPH06259977A (ja) * 1993-03-03 1994-09-16 Nec Ic Microcomput Syst Ltd フラッシュ消去型不揮発性メモリ
US5335198A (en) * 1993-05-06 1994-08-02 Advanced Micro Devices, Inc. Flash EEPROM array with high endurance
JP2725571B2 (ja) * 1993-10-06 1998-03-11 日本電気株式会社 不揮発性半導体メモリ装置
US5568426A (en) * 1995-07-26 1996-10-22 Micron Quantum Devices, Inc. Method and apparatus for performing memory cell verification on a nonvolatile memory circuit

Also Published As

Publication number Publication date
EP0842516A4 (de) 1999-03-03
US5568426A (en) 1996-10-22
JPH10510655A (ja) 1998-10-13
US5677879A (en) 1997-10-14
WO1997005626A1 (en) 1997-02-13
KR100273179B1 (ko) 2001-01-15
JP3648534B2 (ja) 2005-05-18
KR19990035915A (ko) 1999-05-25
EP0842516A1 (de) 1998-05-20
DE69615568T2 (de) 2002-06-06
EP0842516B1 (de) 2001-09-26
AU6453796A (en) 1997-02-26
ATE206243T1 (de) 2001-10-15

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Representative=s name: ANWALTSKANZLEI GULDE HENGELHAUPT ZIEBIG & SCHNEIDE