DE69716771D1 - Benutzerprogrammierbares gatterfeld mit sich wiederholender verbindungsstruktur - Google Patents

Benutzerprogrammierbares gatterfeld mit sich wiederholender verbindungsstruktur

Info

Publication number
DE69716771D1
DE69716771D1 DE69716771T DE69716771T DE69716771D1 DE 69716771 D1 DE69716771 D1 DE 69716771D1 DE 69716771 T DE69716771 T DE 69716771T DE 69716771 T DE69716771 T DE 69716771T DE 69716771 D1 DE69716771 D1 DE 69716771D1
Authority
DE
Germany
Prior art keywords
connection structure
programmable gate
gate field
user programmable
repeatable connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69716771T
Other languages
English (en)
Other versions
DE69716771T2 (de
Inventor
P Young
J New
J Camilleri
J Bauer
Shekhar Bapat
Kamal Chaudhary
Sridhar Krishnamurthy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xilinx Inc filed Critical Xilinx Inc
Publication of DE69716771D1 publication Critical patent/DE69716771D1/de
Application granted granted Critical
Publication of DE69716771T2 publication Critical patent/DE69716771T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H03K19/17796—Structural details for adapting physical parameters for physical disposition of blocks
DE69716771T 1997-03-24 1997-08-28 Benutzerprogrammierbares gatterfeld mit sich wiederholender verbindungsstruktur Expired - Lifetime DE69716771T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/823,265 US5963050A (en) 1997-02-26 1997-03-24 Configurable logic element with fast feedback paths
PCT/US1997/015382 WO1998043354A1 (en) 1997-03-24 1997-08-28 Fpga repeatable interconnect structure

Publications (2)

Publication Number Publication Date
DE69716771D1 true DE69716771D1 (de) 2002-12-05
DE69716771T2 DE69716771T2 (de) 2003-06-12

Family

ID=25238264

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69716771T Expired - Lifetime DE69716771T2 (de) 1997-03-24 1997-08-28 Benutzerprogrammierbares gatterfeld mit sich wiederholender verbindungsstruktur

Country Status (5)

Country Link
US (5) US5963050A (de)
EP (1) EP0972344B1 (de)
JP (1) JP3948497B2 (de)
DE (1) DE69716771T2 (de)
WO (1) WO1998043354A1 (de)

Families Citing this family (291)

* Cited by examiner, † Cited by third party
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US6292022B2 (en) 2001-09-18
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US20020008541A1 (en) 2002-01-24
DE69716771T2 (de) 2003-06-12
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