DE69723530D1 - Durch einen Mikrokontroller steuerbare Makrozelle - Google Patents

Durch einen Mikrokontroller steuerbare Makrozelle

Info

Publication number
DE69723530D1
DE69723530D1 DE69723530T DE69723530T DE69723530D1 DE 69723530 D1 DE69723530 D1 DE 69723530D1 DE 69723530 T DE69723530 T DE 69723530T DE 69723530 T DE69723530 T DE 69723530T DE 69723530 D1 DE69723530 D1 DE 69723530D1
Authority
DE
Germany
Prior art keywords
microcontroller
macro cell
cell controllable
controllable
macro
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69723530T
Other languages
English (en)
Other versions
DE69723530T2 (de
Inventor
Yoram Cedar
Arye Ziklik
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69723530D1 publication Critical patent/DE69723530D1/de
Publication of DE69723530T2 publication Critical patent/DE69723530T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H03K19/17744—Structural details of routing resources for input/output signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Logic Circuits (AREA)
  • Microcomputers (AREA)
  • Information Transfer Systems (AREA)
DE69723530T 1996-11-01 1997-10-30 Durch einen Mikrokontroller steuerbare Makrozelle Expired - Fee Related DE69723530T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US742710 1996-11-01
US08/742,710 US5834947A (en) 1996-11-01 1996-11-01 Microcontroller accessible macrocell

Publications (2)

Publication Number Publication Date
DE69723530D1 true DE69723530D1 (de) 2003-08-21
DE69723530T2 DE69723530T2 (de) 2004-06-09

Family

ID=24985902

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69723530T Expired - Fee Related DE69723530T2 (de) 1996-11-01 1997-10-30 Durch einen Mikrokontroller steuerbare Makrozelle

Country Status (4)

Country Link
US (2) US5834947A (de)
EP (1) EP0840455B1 (de)
JP (1) JPH10242842A (de)
DE (1) DE69723530T2 (de)

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US6467009B1 (en) 1998-10-14 2002-10-15 Triscend Corporation Configurable processor system unit
US6851047B1 (en) 1999-10-15 2005-02-01 Xilinx, Inc. Configuration in a configurable system on a chip
US6721840B1 (en) 2000-08-18 2004-04-13 Triscend Corporation Method and system for interfacing an integrated circuit to synchronous dynamic memory and static memory
US6751723B1 (en) 2000-09-02 2004-06-15 Actel Corporation Field programmable gate array and microcontroller system-on-a-chip
US6466049B1 (en) * 2000-09-14 2002-10-15 Xilinx, Inc. Clock enable control circuit for flip flops
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US6825689B1 (en) * 2000-10-26 2004-11-30 Cypress Semiconductor Corporation Configurable input/output interface for a microcontroller
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US6725364B1 (en) 2001-03-08 2004-04-20 Xilinx, Inc. Configurable processor system
US7107374B1 (en) 2001-09-05 2006-09-12 Xilinx, Inc. Method for bus mastering for devices resident in configurable system logic
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US6670826B1 (en) * 2002-04-26 2003-12-30 Xilinx, Inc. Configurable logic block with a storage element clocked by a write strobe pulse
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US8286125B2 (en) 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8089461B2 (en) 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US7453285B2 (en) * 2006-12-22 2008-11-18 Chaologix, Inc. Dynamically configurable logic gate using a non-linear element
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US7925814B2 (en) * 2007-05-09 2011-04-12 Chaologix, Inc. Dynamically configurable high speed interconnect using a nonlinear element
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US9946667B2 (en) 2008-11-12 2018-04-17 Microchip Technology Incorporated Microcontroller with configurable logic array
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
US7791375B1 (en) * 2009-07-10 2010-09-07 Altera Corporation DQS re sync calibration
US8822946B2 (en) 2011-01-04 2014-09-02 Lawrence Livermore National Security, Llc Systems and methods of varying charged particle beam spot size
JP6428488B2 (ja) * 2015-05-28 2018-11-28 富士通株式会社 加減算器及び加減算器の制御方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5091661A (en) * 1990-09-24 1992-02-25 Altera Corporation Methods and apparatus for reducing coupling noise in programmable logic devices
US5220214A (en) * 1991-04-22 1993-06-15 Altera Corporation Registered logic macrocell with product term allocation and adjacent product term stealing
US5153462A (en) * 1991-05-21 1992-10-06 Advanced Micro Devices, Inc. Programmable logic device incorporating voltage comparator
US5231312A (en) * 1992-03-12 1993-07-27 Atmel Corporation Integrated logic circuit with functionally flexible input/output macrocells
US5386155A (en) * 1993-03-30 1995-01-31 Intel Corporation Apparatus and method for selecting polarity and output type in a programmable logic device
US5399922A (en) * 1993-07-02 1995-03-21 Altera Corporation Macrocell comprised of two look-up tables and two flip-flops
US5386115A (en) * 1993-09-22 1995-01-31 Westinghouse Electric Corporation Solid state micro-machined mass spectrograph universal gas detection sensor

Also Published As

Publication number Publication date
EP0840455A2 (de) 1998-05-06
US6066961A (en) 2000-05-23
DE69723530T2 (de) 2004-06-09
EP0840455B1 (de) 2003-07-16
US5834947A (en) 1998-11-10
EP0840455A3 (de) 2000-11-15
JPH10242842A (ja) 1998-09-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee