DE69732618D1 - Eine asymmetrische Zelle für eine Halbleiterspeichermatrix und deren Herstellungsmethode - Google Patents
Eine asymmetrische Zelle für eine Halbleiterspeichermatrix und deren HerstellungsmethodeInfo
- Publication number
- DE69732618D1 DE69732618D1 DE69732618T DE69732618T DE69732618D1 DE 69732618 D1 DE69732618 D1 DE 69732618D1 DE 69732618 T DE69732618 T DE 69732618T DE 69732618 T DE69732618 T DE 69732618T DE 69732618 D1 DE69732618 D1 DE 69732618D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor memory
- memory matrix
- asymmetric cell
- asymmetric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000011159 matrix material Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US783995 | 1997-01-15 | ||
US08/783,995 US5963808A (en) | 1997-01-15 | 1997-01-15 | Method of forming an asymmetric bird's beak cell for a flash EEPROM |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69732618D1 true DE69732618D1 (de) | 2005-04-07 |
DE69732618T2 DE69732618T2 (de) | 2005-12-29 |
Family
ID=25131045
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69732618T Expired - Lifetime DE69732618T2 (de) | 1997-01-15 | 1997-12-09 | Eine asymmetrische Zelle für eine Halbleiterspeichermatrix und deren Herstellungsmethode |
Country Status (3)
Country | Link |
---|---|
US (1) | US5963808A (de) |
EP (1) | EP0854514B1 (de) |
DE (1) | DE69732618T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5837584A (en) * | 1997-01-15 | 1998-11-17 | Macronix International Co., Ltd. | Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication |
KR100383703B1 (ko) * | 1999-04-01 | 2003-05-14 | 아사히 가세이 마이크로시스템 가부시끼가이샤 | 반도체 장치의 제조 방법 |
US6261906B1 (en) * | 1999-08-03 | 2001-07-17 | Worldwide Semiconductor Manufacturing Corp. | Method for forming a flash memory cell with improved drain erase performance |
US6579751B2 (en) * | 1999-09-01 | 2003-06-17 | Micron Technology, Inc. | Semiconductor processing methods of forming integrated circuitry |
EP1170798B1 (de) | 2000-07-04 | 2006-09-06 | STMicroelectronics S.r.l. | Architektur eines Festwertspeicherfelds |
TW461093B (en) | 2000-07-07 | 2001-10-21 | United Microelectronics Corp | Fabrication method for a high voltage electrical erasable programmable read only memory device |
JP2003023114A (ja) * | 2001-07-05 | 2003-01-24 | Fujitsu Ltd | 半導体集積回路装置およびその製造方法 |
JP2003086716A (ja) | 2001-09-11 | 2003-03-20 | Matsushita Electric Ind Co Ltd | 不揮発性半導体記憶装置及びその製造方法 |
US7115516B2 (en) * | 2001-10-09 | 2006-10-03 | Applied Materials, Inc. | Method of depositing a material layer |
DE10351030B4 (de) * | 2003-10-31 | 2008-05-29 | Qimonda Ag | Speicherzelle, DRAM und Verfahren zur Herstellung einer Transistorstruktur in einem Halbleitersubstrat |
US7390718B2 (en) * | 2004-02-20 | 2008-06-24 | Tower Semiconductor Ltd. | SONOS embedded memory with CVD dielectric |
US7294882B2 (en) * | 2004-09-28 | 2007-11-13 | Sandisk Corporation | Non-volatile memory with asymmetrical doping profile |
US7959749B2 (en) * | 2006-01-31 | 2011-06-14 | Tk Holdings, Inc. | Gas generating composition |
US20070278557A1 (en) * | 2006-05-31 | 2007-12-06 | Texas Instruments Incorporated | Novel method to form memory cells to improve programming performance of embedded memory technology |
US7705387B2 (en) * | 2006-09-28 | 2010-04-27 | Sandisk Corporation | Non-volatile memory with local boosting control implant |
US7977186B2 (en) * | 2006-09-28 | 2011-07-12 | Sandisk Corporation | Providing local boosting control implant for non-volatile memory |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4852062A (en) * | 1987-09-28 | 1989-07-25 | Motorola, Inc. | EPROM device using asymmetrical transistor characteristics |
US5060195A (en) * | 1989-12-29 | 1991-10-22 | Texas Instruments Incorporated | Hot electron programmable, tunnel electron erasable contactless EEPROM |
US5021848A (en) * | 1990-03-13 | 1991-06-04 | Chiu Te Long | Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof |
US5077230A (en) * | 1990-08-03 | 1991-12-31 | Intel Corporation | Method for improving erase characteristics of buried bit line flash EPROM devices by use of a thin nitride layer formed during field oxide growth |
JPH05304277A (ja) * | 1992-04-28 | 1993-11-16 | Rohm Co Ltd | 半導体装置の製法 |
JP2877641B2 (ja) * | 1992-12-25 | 1999-03-31 | ローム株式会社 | 半導体記憶装置およびその駆動方式 |
US5306658A (en) * | 1993-05-27 | 1994-04-26 | Texas Instruments Incorporated | Method of making virtual ground memory cell array |
US5352619A (en) * | 1993-07-22 | 1994-10-04 | United Microelectronics Corporation | Method for improving erase characteristics and coupling ratios of buried bit line flash EPROM devices |
JP3093096B2 (ja) * | 1993-08-27 | 2000-10-03 | シャープ株式会社 | 不揮発性メモリの製造方法 |
US5384272A (en) * | 1994-06-28 | 1995-01-24 | Advanced Micro Devices, Inc. | Method for manufacturing a non-volatile, virtual ground memory element |
US5837584A (en) * | 1997-01-15 | 1998-11-17 | Macronix International Co., Ltd. | Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication |
-
1997
- 1997-01-15 US US08/783,995 patent/US5963808A/en not_active Expired - Lifetime
- 1997-12-09 DE DE69732618T patent/DE69732618T2/de not_active Expired - Lifetime
- 1997-12-09 EP EP97309918A patent/EP0854514B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69732618T2 (de) | 2005-12-29 |
EP0854514B1 (de) | 2005-03-02 |
US5963808A (en) | 1999-10-05 |
EP0854514A1 (de) | 1998-07-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69732618D1 (de) | Eine asymmetrische Zelle für eine Halbleiterspeichermatrix und deren Herstellungsmethode | |
DE59814170D1 (de) | Speicherzellenanordnung und Verfahren zu deren Herstellung | |
DE69836960D1 (de) | Solarzellenmodul und herstellungsverfahren | |
DE59900872D1 (de) | Speicherzellenanordnung und entsprechendes Herstellungsverfahren | |
DE69720080D1 (de) | Herstellungsverfahren für eine flash-speicherzelle | |
DE69734631D1 (de) | Sonnenzelle, und Montage- und Herstellungsmethode dafür | |
DE69637334D1 (de) | Photovoltaische Zelle und Herstellungsverfahren | |
DE60028034D1 (de) | Elektrode und herstellungsmethode für eine elektrode | |
DE59812443D1 (de) | Solarzelle und Herstellungsverfahren | |
DE69935095D1 (de) | Halbleiterbauelement und deren Herstellungsverfahren | |
DE59601720D1 (de) | Anodensubstrat für eine hochtemperatur-brennstoffzelle | |
DE69834561D1 (de) | Halbleiteranordnung und herstellungsverfahren dafür | |
DE69942628D1 (de) | Halbleiterspeichersystem und Zugriffverfahren für Halbleiterspeicher und Halbleiterspeicher | |
DE69533233D1 (de) | Halbleitervorrichtung und deren Herstellungsverfahren | |
DE69524645T2 (de) | Speicherzelle mit programmierbarer Antischmelzsicherungstechnologie | |
DE69931336D1 (de) | Abdeckung für Tastschalter und deren Herstellungsmethode | |
DE59803426D1 (de) | Speicherzellenanordnung und entsprechendes Herstellungsverfahren | |
DE69738012D1 (de) | Halbleitervorrichtung und deren Herstellungsverfahren | |
DE69839034D1 (de) | Halbleiter-Speicher-Vorrichtung und Verfahren zu deren Herstellung | |
DE69828834D1 (de) | Ferroelektrische Speicherzelle und deren Herstellungsverfahren | |
DE50011386D1 (de) | Nichtflüchtige halbleiter-speicherzelle mit einem metalloxid-dielektrikum und verfahren zu deren herstellung | |
DE69425367T2 (de) | Leseschaltkreis für Speichermatrixzelle | |
DE69840486D1 (de) | Halbleiterspeicher und Zugriffsverfahren hierauf | |
DE69305986T2 (de) | Schaltungsstruktur für Speichermatrix und entsprechende Herstellungsverfahren | |
DE59704333D1 (de) | Speicherzellenanordnung und verfahren zu deren herstellung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |