DE69733076D1 - Hochleistungsdatenweg mit sofortigem xor - Google Patents

Hochleistungsdatenweg mit sofortigem xor

Info

Publication number
DE69733076D1
DE69733076D1 DE69733076T DE69733076T DE69733076D1 DE 69733076 D1 DE69733076 D1 DE 69733076D1 DE 69733076 T DE69733076 T DE 69733076T DE 69733076 T DE69733076 T DE 69733076T DE 69733076 D1 DE69733076 D1 DE 69733076D1
Authority
DE
Germany
Prior art keywords
data
xor
bus
data path
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69733076T
Other languages
English (en)
Other versions
DE69733076T2 (de
Inventor
C Solomon
K Bailey
Robert Yates
Peter Everdell
H Reeves
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
EMC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EMC Corp filed Critical EMC Corp
Publication of DE69733076D1 publication Critical patent/DE69733076D1/de
Application granted granted Critical
Publication of DE69733076T2 publication Critical patent/DE69733076T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/10—Indexing scheme relating to G06F11/10
    • G06F2211/1002—Indexing scheme relating to G06F11/1076
    • G06F2211/1054—Parity-fast hardware, i.e. dedicated fast hardware for RAID systems with parity
DE69733076T 1996-11-14 1997-10-08 Hochleistungsdatenweg mit sofortigem xor Expired - Fee Related DE69733076T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US74931296A 1996-11-14 1996-11-14
US749312 1996-11-14
US08/815,193 US6161165A (en) 1996-11-14 1997-03-11 High performance data path with XOR on the fly
US815193 1997-03-11
PCT/US1997/018523 WO1998021656A1 (en) 1996-11-14 1997-10-08 High performance data path with xor on the fly

Publications (2)

Publication Number Publication Date
DE69733076D1 true DE69733076D1 (de) 2005-05-25
DE69733076T2 DE69733076T2 (de) 2006-02-23

Family

ID=27115094

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69733076T Expired - Fee Related DE69733076T2 (de) 1996-11-14 1997-10-08 Hochleistungsdatenweg mit sofortigem xor

Country Status (7)

Country Link
US (1) US6161165A (de)
EP (1) EP0938704B1 (de)
JP (2) JP3606881B2 (de)
AU (1) AU4820197A (de)
CA (1) CA2268548A1 (de)
DE (1) DE69733076T2 (de)
WO (1) WO1998021656A1 (de)

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US6918007B2 (en) * 2002-09-09 2005-07-12 Hewlett-Packard Development Company, L.P. Memory controller interface with XOR operations on memory read to accelerate RAID operations
US7096407B2 (en) * 2003-02-18 2006-08-22 Hewlett-Packard Development Company, L.P. Technique for implementing chipkill in a memory system
US20040163027A1 (en) * 2003-02-18 2004-08-19 Maclaren John M. Technique for implementing chipkill in a memory system with X8 memory devices
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US7281177B2 (en) * 2003-07-14 2007-10-09 International Business Machines Corporation Autonomic parity exchange
US7379974B2 (en) * 2003-07-14 2008-05-27 International Business Machines Corporation Multipath data retrieval from redundant array
US7428691B2 (en) * 2003-11-12 2008-09-23 Norman Ken Ouchi Data recovery from multiple failed data blocks and storage units
US7913148B2 (en) * 2004-03-12 2011-03-22 Nvidia Corporation Disk controller methods and apparatus with improved striping, redundancy operations and interfaces
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US8458377B2 (en) * 2010-03-05 2013-06-04 Lsi Corporation DMA engine capable of concurrent data manipulation
JP5635621B2 (ja) * 2010-09-10 2014-12-03 株式会社日立製作所 ストレージシステム及びストレージシステムのデータ転送方法
FR2991799B1 (fr) * 2012-06-11 2015-05-29 St Microelectronics Rousset Adaptation d'un circuit d'antenne pour terminal de communication en champ proche
US10236043B2 (en) 2016-06-06 2019-03-19 Altera Corporation Emulated multiport memory element circuitry with exclusive-OR based control circuitry
US10372531B2 (en) 2017-01-05 2019-08-06 Texas Instruments Incorporated Error-correcting code memory
US10365967B2 (en) 2017-08-23 2019-07-30 Toshiba Memory Corporation On the fly raid parity calculation
US11662955B2 (en) * 2021-09-27 2023-05-30 GRAID Technology Inc. Direct memory access data path for RAID storage
US11726715B2 (en) 2021-10-11 2023-08-15 Western Digital Technologies, Inc. Efficient data path in compare command execution

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Also Published As

Publication number Publication date
JP3606881B2 (ja) 2005-01-05
JP2001500654A (ja) 2001-01-16
US6161165A (en) 2000-12-12
AU4820197A (en) 1998-06-03
EP0938704B1 (de) 2005-04-20
CA2268548A1 (en) 1998-05-22
EP0938704A1 (de) 1999-09-01
JP2005032265A (ja) 2005-02-03
WO1998021656A1 (en) 1998-05-22
DE69733076T2 (de) 2006-02-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee