DE69737434D1 - Niedrigtemperatur-Aluminiumaufschmelzen für mehrschichtige Metallisierung - Google Patents

Niedrigtemperatur-Aluminiumaufschmelzen für mehrschichtige Metallisierung

Info

Publication number
DE69737434D1
DE69737434D1 DE69737434T DE69737434T DE69737434D1 DE 69737434 D1 DE69737434 D1 DE 69737434D1 DE 69737434 T DE69737434 T DE 69737434T DE 69737434 T DE69737434 T DE 69737434T DE 69737434 D1 DE69737434 D1 DE 69737434D1
Authority
DE
Germany
Prior art keywords
low temperature
temperature aluminum
multilayer metallization
aluminum reflow
reflow
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69737434T
Other languages
English (en)
Inventor
Melvin Joseph Desilva
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69737434D1 publication Critical patent/DE69737434D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76882—Reflowing or applying of pressure to better fill the contact hole

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
  • ing And Chemical Polishing (AREA)
DE69737434T 1996-10-30 1997-10-30 Niedrigtemperatur-Aluminiumaufschmelzen für mehrschichtige Metallisierung Expired - Lifetime DE69737434D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/741,255 US5926736A (en) 1996-10-30 1996-10-30 Low temperature aluminum reflow for multilevel metallization

Publications (1)

Publication Number Publication Date
DE69737434D1 true DE69737434D1 (de) 2007-04-19

Family

ID=24979981

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69737434T Expired - Lifetime DE69737434D1 (de) 1996-10-30 1997-10-30 Niedrigtemperatur-Aluminiumaufschmelzen für mehrschichtige Metallisierung

Country Status (4)

Country Link
US (2) US5926736A (de)
EP (1) EP0840370B1 (de)
JP (1) JP4799715B2 (de)
DE (1) DE69737434D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5994217A (en) * 1996-12-16 1999-11-30 Chartered Semiconductor Manufacturing Ltd. Post metallization stress relief annealing heat treatment for ARC TiN over aluminum layers
US7510961B2 (en) * 1997-02-14 2009-03-31 Micron Technology, Inc. Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure
US6218277B1 (en) * 1998-01-26 2001-04-17 Texas Instruments Incorporated Method for filling a via opening or contact opening in an integrated circuit
JP2000133712A (ja) * 1998-08-18 2000-05-12 Seiko Epson Corp 半導体装置の製造方法
US6399486B1 (en) * 1999-11-22 2002-06-04 Taiwan Semiconductor Manufacturing Company Method of improved copper gap fill
KR100390822B1 (ko) * 1999-12-28 2003-07-10 주식회사 하이닉스반도체 이미지센서에서의 암전류 감소 방법
US6509274B1 (en) * 2000-08-04 2003-01-21 Applied Materials, Inc. Method for forming aluminum lines over aluminum-filled vias in a semiconductor substrate
US6903000B2 (en) * 2001-12-28 2005-06-07 Texas Instruments Incorporated System for improving thermal stability of copper damascene structure
WO2007106180A2 (en) * 2005-11-07 2007-09-20 Applied Materials, Inc. Photovoltaic contact and wiring formation
DE102007035837A1 (de) * 2007-07-31 2009-02-05 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit einer Kornorientierungsschicht
US20130045595A1 (en) * 2011-08-16 2013-02-21 Tsun-Min Cheng Method for processing metal layer
CN103187361A (zh) * 2011-12-31 2013-07-03 中芯国际集成电路制造(上海)有限公司 铜互连层的制造方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62205792A (ja) 1986-03-04 1987-09-10 Lion Corp アルカロイドの製造方法
US4782380A (en) * 1987-01-22 1988-11-01 Advanced Micro Devices, Inc. Multilayer interconnection for integrated circuit structure having two or more conductive metal layers
JPS6447051A (en) * 1987-08-18 1989-02-21 Fujitsu Ltd Formation of multilayer interconnection
EP0307272A3 (de) * 1987-09-09 1989-07-12 STMicroelectronics, Inc. Halbleiterverbindungen aus einer Aluminiumlegierung mit einer Barriere-Schicht aus Titan oder Niobium hoher Reinheit
JPH0316130A (ja) * 1989-03-31 1991-01-24 Oki Electric Ind Co Ltd レーザフロー技術を用いた電極配線の形成方法
US4997518A (en) * 1989-03-31 1991-03-05 Oki Electric Industry Co., Ltd. Method for forming an electrode layer by a laser flow technique
US5658828A (en) * 1989-11-30 1997-08-19 Sgs-Thomson Microelectronics, Inc. Method for forming an aluminum contact through an insulating layer
US5066611A (en) * 1990-08-31 1991-11-19 Micron Technology, Inc. Method for improving step coverage of a metallization layer on an integrated circuit by use of molybdenum as an anti-reflective coating
KR960001601B1 (ko) * 1992-01-23 1996-02-02 삼성전자주식회사 반도체 장치의 접촉구 매몰방법 및 구조
DE4200809C2 (de) * 1991-03-20 1996-12-12 Samsung Electronics Co Ltd Verfahren zur Bildung einer metallischen Verdrahtungsschicht in einem Halbleiterbauelement
JPH05267471A (ja) * 1991-04-05 1993-10-15 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US5124780A (en) * 1991-06-10 1992-06-23 Micron Technology, Inc. Conductive contact plug and a method of forming a conductive contact plug in an integrated circuit using laser planarization
JP3142310B2 (ja) * 1991-07-05 2001-03-07 沖電気工業株式会社 半導体素子の製造方法
US5610105A (en) * 1992-10-23 1997-03-11 Vlsi Technology, Inc. Densification in an intermetal dielectric film
KR960010056B1 (ko) * 1992-12-10 1996-07-25 삼성전자 주식회사 반도체장치 및 그 제조 방법
JPH06244287A (ja) * 1993-02-15 1994-09-02 Matsushita Electron Corp 半導体装置の製造方法
JPH0774247A (ja) * 1993-06-14 1995-03-17 Sony Corp 半導体装置及びその作製方法
JPH0758199A (ja) * 1993-08-11 1995-03-03 Kawasaki Steel Corp 半導体装置の製造方法
KR0140646B1 (ko) * 1994-01-12 1998-07-15 문정환 반도체장치의 제조방법
JPH0822966A (ja) * 1994-07-05 1996-01-23 Hitachi Ltd 半導体装置及びその製造方法
JPH08153794A (ja) * 1994-09-30 1996-06-11 Ricoh Co Ltd 半導体装置
TW290717B (en) * 1994-10-28 1996-11-11 Advanced Micro Devices Inc Method to prevent formation of defects during multilayer interconnect processing
US5523259A (en) * 1994-12-05 1996-06-04 At&T Corp. Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer
JPH08241923A (ja) * 1995-03-02 1996-09-17 Sony Corp 配線形成方法およびこれに用いる配線形成装置
US5668055A (en) * 1995-05-05 1997-09-16 Applied Materials, Inc. Method of filling of contact openings and vias by self-extrusion of overlying compressively stressed matal layer
JPH0917785A (ja) * 1995-06-30 1997-01-17 Sony Corp 半導体装置のアルミニウム系金属配線
US5604155A (en) * 1995-07-17 1997-02-18 Winbond Electronics Corp. Al-based contact formation process using Ti glue layer to prevent nodule-induced bridging

Also Published As

Publication number Publication date
JPH10135212A (ja) 1998-05-22
EP0840370A1 (de) 1998-05-06
US5926736A (en) 1999-07-20
US6215188B1 (en) 2001-04-10
JP4799715B2 (ja) 2011-10-26
EP0840370B1 (de) 2007-03-07

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Legal Events

Date Code Title Description
8332 No legal effect for de