DE69811945D1 - Verfahren zur herstellung von schaltungselementen für eine z-achsenzwischenverbindung - Google Patents

Verfahren zur herstellung von schaltungselementen für eine z-achsenzwischenverbindung

Info

Publication number
DE69811945D1
DE69811945D1 DE69811945T DE69811945T DE69811945D1 DE 69811945 D1 DE69811945 D1 DE 69811945D1 DE 69811945 T DE69811945 T DE 69811945T DE 69811945 T DE69811945 T DE 69811945T DE 69811945 D1 DE69811945 D1 DE 69811945D1
Authority
DE
Germany
Prior art keywords
circuit elements
intermediate connection
producing circuit
axis intermediate
axis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69811945T
Other languages
English (en)
Other versions
DE69811945T2 (de
Inventor
Yu Chen
A Gerber
E Schreiber
W Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
3M Co
Original Assignee
Minnesota Mining and Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minnesota Mining and Manufacturing Co filed Critical Minnesota Mining and Manufacturing Co
Publication of DE69811945D1 publication Critical patent/DE69811945D1/de
Application granted granted Critical
Publication of DE69811945T2 publication Critical patent/DE69811945T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125Reinforcing structures
    • H01L2224/10126Bump collar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1183Reworking, e.g. shaping
    • H01L2224/1184Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13021Disposition the bump connector being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13022Disposition the bump connector being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731Location prior to the connecting process
    • H01L2224/73101Location prior to the connecting process on the same surface
    • H01L2224/73103Bump and layer connectors
    • H01L2224/73104Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01049Indium [In]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0195Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0305Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025Abrading, e.g. grinding or sand blasting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0769Dissolving insulating materials, e.g. coatings, not used for developing resist after exposure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
DE69811945T 1997-12-08 1998-04-14 Verfahren zur herstellung von schaltungselementen für eine z-achsenzwischenverbindung Expired - Fee Related DE69811945T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/986,882 US6063647A (en) 1997-12-08 1997-12-08 Method for making circuit elements for a z-axis interconnect
PCT/US1998/007847 WO1999030543A1 (en) 1997-12-08 1998-04-14 Method for making circuit elements for a z-axis interconnect

Publications (2)

Publication Number Publication Date
DE69811945D1 true DE69811945D1 (de) 2003-04-10
DE69811945T2 DE69811945T2 (de) 2003-12-18

Family

ID=25532851

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69811945T Expired - Fee Related DE69811945T2 (de) 1997-12-08 1998-04-14 Verfahren zur herstellung von schaltungselementen für eine z-achsenzwischenverbindung

Country Status (7)

Country Link
US (2) US6063647A (de)
EP (1) EP1038420B1 (de)
JP (1) JP2001526469A (de)
KR (1) KR20010032805A (de)
AU (1) AU7134098A (de)
DE (1) DE69811945T2 (de)
WO (1) WO1999030543A1 (de)

Families Citing this family (58)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6074895A (en) * 1997-09-23 2000-06-13 International Business Machines Corporation Method of forming a flip chip assembly
DE69737914T2 (de) * 1997-12-22 2008-02-07 Hitachi, Ltd. Kartenförmige vorrichtung mit einem halbleiterelement
US6893896B1 (en) * 1998-03-27 2005-05-17 The Trustees Of Princeton University Method for making multilayer thin-film electronics
US6930390B2 (en) * 1999-01-20 2005-08-16 Sony Chemicals Corp. Flexible printed wiring boards
US6352881B1 (en) * 1999-07-22 2002-03-05 National Semiconductor Corporation Method and apparatus for forming an underfill adhesive layer
US6756253B1 (en) * 1999-08-27 2004-06-29 Micron Technology, Inc. Method for fabricating a semiconductor component with external contact polymer support layer
US6492738B2 (en) * 1999-09-02 2002-12-10 Micron Technology, Inc. Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer
JP2001077501A (ja) * 1999-09-03 2001-03-23 Seiko Epson Corp フレキシブル配線基板、電気光学装置および電子機器
US6461891B1 (en) 1999-09-13 2002-10-08 Intel Corporation Method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple
DE10084996T1 (de) * 1999-09-20 2002-11-07 Nas Interplex Ind Inc Lottragender Wafer zur Verwendung bei Lötvorgängen
US6613605B2 (en) * 1999-12-15 2003-09-02 Benedict G Pace Interconnection method entailing protuberances formed by melting metal over contact areas
JP3625268B2 (ja) * 2000-02-23 2005-03-02 富士通株式会社 半導体装置の実装方法
DE10046296C2 (de) * 2000-07-17 2002-10-10 Infineon Technologies Ag Elektronisches Chipbauteil mit einer integrierten Schaltung und Verfahren zu seiner Herstellung
US6576495B1 (en) 2000-08-30 2003-06-10 Micron Technology, Inc. Microelectronic assembly with pre-disposed fill material and associated method of manufacture
US6504242B1 (en) 2001-11-15 2003-01-07 Intel Corporation Electronic assembly having a wetting layer on a thermally conductive heat spreader
US6854633B1 (en) 2002-02-05 2005-02-15 Micron Technology, Inc. System with polymer masking flux for fabricating external contacts on semiconductor components
US6844618B2 (en) * 2002-04-04 2005-01-18 Micron Technology, Inc. Microelectronic package with reduced underfill and methods for forming such packages
US7109588B2 (en) * 2002-04-04 2006-09-19 Micron Technology, Inc. Method and apparatus for attaching microelectronic substrates and support members
US6933221B1 (en) * 2002-06-24 2005-08-23 Micron Technology, Inc. Method for underfilling semiconductor components using no flow underfill
US7423337B1 (en) 2002-08-19 2008-09-09 National Semiconductor Corporation Integrated circuit device package having a support coating for improved reliability during temperature cycling
JP3585904B2 (ja) * 2002-11-01 2004-11-10 株式会社 大昌電子 保持搬送用治具
US20050161814A1 (en) * 2002-12-27 2005-07-28 Fujitsu Limited Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus
US7301222B1 (en) 2003-02-12 2007-11-27 National Semiconductor Corporation Apparatus for forming a pre-applied underfill adhesive layer for semiconductor wafer level chip-scale packages
DE10318074B4 (de) * 2003-04-17 2009-05-20 Qimonda Ag Verfahren zur Herstellung von BOC Modul Anordnungen mit verbesserten mechanischen Eigenschaften
JP2005101527A (ja) * 2003-08-21 2005-04-14 Seiko Epson Corp 電子部品の実装構造、電気光学装置、電子機器及び電子部品の実装方法
US7183495B2 (en) * 2004-03-29 2007-02-27 Hirose Electric Co., Ltd. Electrical connector
US7282375B1 (en) 2004-04-14 2007-10-16 National Semiconductor Corporation Wafer level package design that facilitates trimming and testing
CN101010757B (zh) * 2004-06-28 2010-05-12 Tdk株式会社 叠层型电子部件的制造方法
US8278751B2 (en) * 2005-02-08 2012-10-02 Micron Technology, Inc. Methods of adhering microfeature workpieces, including a chip, to a support member
US7364945B2 (en) 2005-03-31 2008-04-29 Stats Chippac Ltd. Method of mounting an integrated circuit package in an encapsulant cavity
US7354800B2 (en) 2005-04-29 2008-04-08 Stats Chippac Ltd. Method of fabricating a stacked integrated circuit package system
JP5109662B2 (ja) * 2005-11-04 2012-12-26 住友ベークライト株式会社 積層回路基板の製造方法および回路板の製造方法
US7456088B2 (en) 2006-01-04 2008-11-25 Stats Chippac Ltd. Integrated circuit package system including stacked die
US7768125B2 (en) * 2006-01-04 2010-08-03 Stats Chippac Ltd. Multi-chip package system
US7750482B2 (en) 2006-02-09 2010-07-06 Stats Chippac Ltd. Integrated circuit package system including zero fillet resin
US7631423B2 (en) * 2006-02-13 2009-12-15 Sanmina-Sci Corporation Method and process for embedding electrically conductive elements in a dielectric layer
US8704349B2 (en) 2006-02-14 2014-04-22 Stats Chippac Ltd. Integrated circuit package system with exposed interconnects
US7385299B2 (en) * 2006-02-25 2008-06-10 Stats Chippac Ltd. Stackable integrated circuit package system with multiple interconnect interface
US7710045B2 (en) * 2006-03-17 2010-05-04 3M Innovative Properties Company Illumination assembly with enhanced thermal conductivity
JP4920330B2 (ja) * 2006-07-18 2012-04-18 ソニー株式会社 実装構造体の実装方法、発光ダイオードディスプレイの実装方法、発光ダイオードバックライトの実装方法および電子機器の実装方法
US20080084671A1 (en) * 2006-10-10 2008-04-10 Ronnie Dean Stahlhut Electrical circuit assembly for high-power electronics
US7903417B2 (en) * 2006-10-10 2011-03-08 Deere & Company Electrical circuit assembly for high-power electronics
US20090188105A1 (en) * 2008-01-28 2009-07-30 Ming-Chin Chien Slim battery packaging method
US20090306811A1 (en) * 2008-06-06 2009-12-10 Raytheon Company Ball grid array cleaning system
US8345435B2 (en) * 2009-08-07 2013-01-01 Semiconductor Energy Laboratory Co., Ltd. Terminal structure and manufacturing method thereof, and electronic device and manufacturing method thereof
JP5621311B2 (ja) * 2010-05-11 2014-11-12 富士通株式会社 回路基板の製造方法
JP2012044214A (ja) * 2011-10-28 2012-03-01 Sony Chemical & Information Device Corp 接続装置、及び接続構造体の製造方法
US9202714B2 (en) * 2012-04-24 2015-12-01 Micron Technology, Inc. Methods for forming semiconductor device packages
KR20140067723A (ko) * 2012-11-27 2014-06-05 삼성전기주식회사 절연층 도통방법
RU2017110525A (ru) * 2014-09-02 2018-10-03 Филипс Лайтинг Холдинг Б.В. Способ нанесения устройства освещения на поверхность и поверхность освещения
US10410779B2 (en) 2015-10-09 2019-09-10 Lexmark International, Inc. Methods of making physical unclonable functions having magnetic and non-magnetic particles
US20170100862A1 (en) 2015-10-09 2017-04-13 Lexmark International, Inc. Injection-Molded Physical Unclonable Function
KR102458034B1 (ko) 2015-10-16 2022-10-25 삼성전자주식회사 반도체 패키지, 반도체 패키지의 제조방법, 및 반도체 모듈
JP2017103362A (ja) * 2015-12-02 2017-06-08 リンテック株式会社 半導体装置の製造方法
US10168524B2 (en) * 2016-08-10 2019-01-01 Kla-Tencor Corporation Optical measurement of bump hieght
US10359613B2 (en) * 2016-08-10 2019-07-23 Kla-Tencor Corporation Optical measurement of step size and plated metal thickness
US10212300B2 (en) * 2016-12-09 2019-02-19 Lexmark International, Inc. Magnetic keys having a plurality of magnetic plates
US20190139909A1 (en) 2017-11-09 2019-05-09 Lexmark International, Inc. Physical Unclonable Functions in Integrated Circuit Chip Packaging for Security

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3148310A (en) * 1964-09-08 Methods of making same
US3795047A (en) * 1972-06-15 1974-03-05 Ibm Electrical interconnect structuring for laminate assemblies and fabricating methods therefor
FR2204940B1 (de) * 1972-10-27 1976-01-30 Thomson Csf Fr
JPH07112041B2 (ja) * 1986-12-03 1995-11-29 シャープ株式会社 半導体装置の製造方法
US4749120A (en) * 1986-12-18 1988-06-07 Matsushita Electric Industrial Co., Ltd. Method of connecting a semiconductor device to a wiring board
JPH01164041A (ja) * 1987-12-21 1989-06-28 Oki Electric Ind Co Ltd バンプ構造を有するic素子とその製造方法
US5502889A (en) * 1988-06-10 1996-04-02 Sheldahl, Inc. Method for electrically and mechanically connecting at least two conductive layers
JPH07101691B2 (ja) 1988-07-12 1995-11-01 シャープ株式会社 電極の形成方法
US5175399A (en) * 1989-08-29 1992-12-29 Mitsubishi Denki Kabushiki Kaisha Wiring panel including wiring having a surface-reforming layer and method for producing the same
US5046238A (en) * 1990-03-15 1991-09-10 Rogers Corporation Method of manufacturing a multilayer circuit board
JPH0636472B2 (ja) * 1990-05-28 1994-05-11 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層配線基板の製造方法
US5282312A (en) * 1991-12-31 1994-02-01 Tessera, Inc. Multi-layer circuit construction methods with customization features
JPH06260772A (ja) * 1993-03-03 1994-09-16 Hitachi Ltd 機械研磨傷の低減方法
US5329423A (en) * 1993-04-13 1994-07-12 Scholz Kenneth D Compressive bump-and-socket interconnection scheme for integrated circuits
JPH0828580B2 (ja) * 1993-04-21 1996-03-21 日本電気株式会社 配線基板構造及びその製造方法
US5401913A (en) * 1993-06-08 1995-03-28 Minnesota Mining And Manufacturing Company Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board
US5487215A (en) * 1994-02-18 1996-01-30 Multifastener Corporation Self-adjusting head
JPH0817860A (ja) * 1994-06-30 1996-01-19 Oki Electric Ind Co Ltd 電子部品の製造方法
US5896276A (en) * 1994-08-31 1999-04-20 Nec Corporation Electronic assembly package including connecting member between first and second substrates
US5650667A (en) * 1995-10-30 1997-07-22 National Semiconductor Corporation Process of forming conductive bumps on the electrodes of semiconductor chips using lapping and the bumps thereby created
US5808360A (en) * 1996-05-15 1998-09-15 Micron Technology, Inc. Microbump interconnect for bore semiconductor dice
US5897336A (en) * 1996-08-05 1999-04-27 International Business Machines Corporation Direct chip attach for low alpha emission interconnect system
US5956605A (en) * 1996-09-20 1999-09-21 Micron Technology, Inc. Use of nitrides for flip-chip encapsulation

Also Published As

Publication number Publication date
US6791036B1 (en) 2004-09-14
EP1038420B1 (de) 2003-03-05
WO1999030543A1 (en) 1999-06-17
US6063647A (en) 2000-05-16
EP1038420A1 (de) 2000-09-27
JP2001526469A (ja) 2001-12-18
DE69811945T2 (de) 2003-12-18
AU7134098A (en) 1999-06-28
KR20010032805A (ko) 2001-04-25

Similar Documents

Publication Publication Date Title
DE69811945D1 (de) Verfahren zur herstellung von schaltungselementen für eine z-achsenzwischenverbindung
DE59813564D1 (de) Verfahren zur Herstellung einer Chipkarte
DE69933933D1 (de) Verfahren zur herstellung einer leiterbahnstruktur für eine integrierte schaltung
DE69809387T2 (de) Verfahren zur herstellung von resisten
DE69833193D1 (de) Verfahren zur herstellung mehrerer elektronischer bauteile
DE69818485D1 (de) Verfahren zur herstellung von elektronischen bauteilen
ATE315588T1 (de) Verfahren zur herstellung von heparin
DE59803946D1 (de) Verfahren zur herstellung von polyamiden
DE69516400T2 (de) Verfahren zur herstellung von nikotinsäure
DE69833087D1 (de) Verfahren zur Herstellung von Dickfilmschaltungen
DE69819191D1 (de) Verfahren zur herstellung von pentafluorethan
DE69920374D1 (de) Verfahren zur herstellung von polytetrahydrofuran
DE59805920D1 (de) Verfahren zur herstellung von oxazaphosphorin-2-aminen
DE69902190D1 (de) Verfahren zur herstellung von polyester
DE69733152D1 (de) Verfahren zur herstellung von tetrazolylbenzopyranen
DE69806759T2 (de) Verfahren zur herstellung von pentafluorethan
DE59802548D1 (de) Verfahren zur herstellung von webware
DE69802546T2 (de) Verfahren zur herstellung von tuftingware
DE59805432D1 (de) Verfahren zur herstellung von 2-cyclododecyl-1-propanol
DE69813588D1 (de) Verfahren zur herstellung von 3-ispchromanon
DE59811807D1 (de) Verfahren zur herstellung von chlorbenzoxazolen
ATA238294A (de) Verfahren zur herstellung von 2-hydroxy-4-phenylbuttersäure
ATE256665T1 (de) Verfahren zur herstellung von 1-phenylpyrazolin-3-carbonsäure-derivaten
ATE207920T1 (de) Verfahren zur herstellung von 4h-4-oxo-chinolizin-3-carbonsäure-derivaten
DE69808100T2 (de) Verfahren zur herstellung von 3-isochromanon

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee