DE69921172D1 - Grabenisolation für bauelemente mit selektiver dotierung - Google Patents
Grabenisolation für bauelemente mit selektiver dotierungInfo
- Publication number
- DE69921172D1 DE69921172D1 DE1999621172 DE69921172T DE69921172D1 DE 69921172 D1 DE69921172 D1 DE 69921172D1 DE 1999621172 DE1999621172 DE 1999621172 DE 69921172 T DE69921172 T DE 69921172T DE 69921172 D1 DE69921172 D1 DE 69921172D1
- Authority
- DE
- Germany
- Prior art keywords
- trench
- isolation device
- components
- trench isolation
- trench insulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/765—Making of isolation regions between components by field effect
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/143,585 US6781212B1 (en) | 1998-08-31 | 1998-08-31 | Selectively doped trench device isolation |
US143585 | 1998-08-31 | ||
PCT/US1999/017812 WO2000013208A2 (en) | 1998-08-31 | 1999-08-03 | Selectively doped trench device isolation |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69921172D1 true DE69921172D1 (de) | 2004-11-18 |
DE69921172T2 DE69921172T2 (de) | 2006-02-16 |
Family
ID=22504709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69921172T Expired - Lifetime DE69921172T2 (de) | 1998-08-31 | 1999-08-03 | Grabenisolation für bauelemente mit selektiver dotierung |
Country Status (7)
Country | Link |
---|---|
US (3) | US6781212B1 (de) |
EP (2) | EP1473766A3 (de) |
AT (1) | ATE279785T1 (de) |
AU (1) | AU1516000A (de) |
DE (1) | DE69921172T2 (de) |
TW (1) | TWM258414U (de) |
WO (1) | WO2000013208A2 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6781212B1 (en) * | 1998-08-31 | 2004-08-24 | Micron Technology, Inc | Selectively doped trench device isolation |
KR100620218B1 (ko) * | 2003-12-31 | 2006-09-11 | 동부일렉트로닉스 주식회사 | 반도체 소자 |
DE102004028679A1 (de) * | 2004-06-14 | 2006-01-05 | Infineon Technologies Ag | Isolationsgrabenanordnung |
US7371627B1 (en) | 2005-05-13 | 2008-05-13 | Micron Technology, Inc. | Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines |
US7120046B1 (en) | 2005-05-13 | 2006-10-10 | Micron Technology, Inc. | Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines |
US7902598B2 (en) * | 2005-06-24 | 2011-03-08 | Micron Technology, Inc. | Two-sided surround access transistor for a 4.5F2 DRAM cell |
US7888721B2 (en) | 2005-07-06 | 2011-02-15 | Micron Technology, Inc. | Surround gate access transistors with grown ultra-thin bodies |
US7768051B2 (en) | 2005-07-25 | 2010-08-03 | Micron Technology, Inc. | DRAM including a vertical surround gate transistor |
US7696567B2 (en) | 2005-08-31 | 2010-04-13 | Micron Technology, Inc | Semiconductor memory device |
JP2007194259A (ja) * | 2006-01-17 | 2007-08-02 | Toshiba Corp | 半導体装置及びその製造方法 |
DE102007018098B4 (de) | 2007-04-17 | 2016-06-16 | Austriamicrosystems Ag | Verfahren zum Herstellen eines Halbleiterkörpers mit einem Graben und Halbleiterkörper mit einem Graben |
TWI416660B (zh) * | 2008-03-19 | 2013-11-21 | Vanguard Int Semiconduct Corp | 半導體元件及其製造方法 |
JP6026914B2 (ja) | 2013-02-12 | 2016-11-16 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US9502414B2 (en) | 2015-02-26 | 2016-11-22 | Qualcomm Incorporated | Adjacent device isolation |
US9822723B2 (en) * | 2015-03-04 | 2017-11-21 | Denso Corporation | Fuel level sensor diagnosis device |
CN109346467A (zh) * | 2018-08-17 | 2019-02-15 | 矽力杰半导体技术(杭州)有限公司 | 半导体结构、驱动芯片和半导体结构的制造方法 |
CN113054004B (zh) * | 2021-03-11 | 2022-08-23 | 电子科技大学 | 一种应用于集成电路高低压隔离的反向电场耦合隔离结构 |
Family Cites Families (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4180416A (en) | 1978-09-27 | 1979-12-25 | International Business Machines Corporation | Thermal migration-porous silicon technique for forming deep dielectric isolation |
US4470062A (en) | 1979-08-31 | 1984-09-04 | Hitachi, Ltd. | Semiconductor device having isolation regions |
US4624046A (en) | 1982-01-04 | 1986-11-25 | Fairchild Camera & Instrument Corp. | Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM |
DE3242113A1 (de) | 1982-11-13 | 1984-05-24 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren zur herstellung einer duennen dielektrischen isolation in einem siliciumhalbleiterkoerper |
EP0220108A3 (de) | 1985-10-07 | 1990-04-11 | Thomson Components-Mostek Corporation | Seitenwanddotierung für Grabenisolation |
US4824797A (en) | 1985-10-31 | 1989-04-25 | International Business Machines Corporation | Self-aligned channel stop |
JPS62131539A (ja) | 1985-12-03 | 1987-06-13 | Fujitsu Ltd | 半導体装置の製造方法 |
US4666556A (en) | 1986-05-12 | 1987-05-19 | International Business Machines Corporation | Trench sidewall isolation by polysilicon oxidation |
US4980747A (en) * | 1986-12-22 | 1990-12-25 | Texas Instruments Inc. | Deep trench isolation with surface contact to substrate |
US4819052A (en) * | 1986-12-22 | 1989-04-04 | Texas Instruments Incorporated | Merged bipolar/CMOS technology using electrically active trench |
JPH0713871B2 (ja) * | 1987-06-11 | 1995-02-15 | 三菱電機株式会社 | ダイナミツクram |
JPH01138730A (ja) | 1987-11-25 | 1989-05-31 | Fujitsu Ltd | 半導体装置 |
US5073509A (en) | 1989-12-11 | 1991-12-17 | Micron Technology, Inc. | Blanket CMOS channel-stop implant |
US5459346A (en) * | 1988-06-28 | 1995-10-17 | Ricoh Co., Ltd. | Semiconductor substrate with electrical contact in groove |
US4839301A (en) | 1988-12-19 | 1989-06-13 | Micron Technology, Inc. | Blanket CMOS channel stop implant employing a combination of n-channel and p-channel punch-through implants |
JP2512216B2 (ja) | 1989-08-01 | 1996-07-03 | 松下電器産業株式会社 | 半導体装置の製造方法 |
US5179038A (en) | 1989-12-22 | 1993-01-12 | North American Philips Corp., Signetics Division | High density trench isolation for MOS circuits |
US5173438A (en) | 1991-02-13 | 1992-12-22 | Micron Technology, Inc. | Method of performing a field implant subsequent to field oxide fabrication by utilizing selective tungsten deposition to produce encroachment-free isolation |
US5087586A (en) | 1991-07-03 | 1992-02-11 | Micron Technology, Inc. | Process for creating fully-recessed field isolation regions by oxidizing a selectively-grown epitaxial silicon layer |
US5191509A (en) | 1991-12-11 | 1993-03-02 | International Business Machines Corporation | Textured polysilicon stacked trench capacitor |
US5358894A (en) | 1992-02-06 | 1994-10-25 | Micron Technology, Inc. | Oxidation enhancement in narrow masked field regions of a semiconductor wafer |
JP3688726B2 (ja) | 1992-07-17 | 2005-08-31 | 株式会社東芝 | 半導体装置の製造方法 |
JP3252518B2 (ja) | 1993-03-19 | 2002-02-04 | ソニー株式会社 | ドライエッチング方法 |
US5302233A (en) | 1993-03-19 | 1994-04-12 | Micron Semiconductor, Inc. | Method for shaping features of a semiconductor structure using chemical mechanical planarization (CMP) |
US5356828A (en) | 1993-07-01 | 1994-10-18 | Digital Equipment Corporation | Method of forming micro-trench isolation regions in the fabrication of semiconductor devices |
JPH0776700A (ja) * | 1993-07-14 | 1995-03-20 | Senju Pharmaceut Co Ltd | コンタクトレンズ用剤の安定化方法 |
US5470783A (en) | 1994-06-06 | 1995-11-28 | At&T Ipm Corp. | Method for integrated circuit device isolation |
US5436190A (en) * | 1994-11-23 | 1995-07-25 | United Microelectronics Corporation | Method for fabricating semiconductor device isolation using double oxide spacers |
US5530293A (en) | 1994-11-28 | 1996-06-25 | International Business Machines Corporation | Carbon-free hydrogen silsesquioxane with dielectric constant less than 3.2 annealed in hydrogen for integrated circuits |
US5492736A (en) | 1994-11-28 | 1996-02-20 | Air Products And Chemicals, Inc. | Fluorine doped silicon oxide process |
US5859466A (en) | 1995-06-07 | 1999-01-12 | Nippon Steel Semiconductor Corporation | Semiconductor device having a field-shield device isolation structure and method for making thereof |
JPH0964164A (ja) | 1995-08-24 | 1997-03-07 | Nittetsu Semiconductor Kk | 半導体装置およびその製造方法 |
US5702976A (en) | 1995-10-24 | 1997-12-30 | Micron Technology, Inc. | Shallow trench isolation using low dielectric constant insulator |
US5914523A (en) * | 1998-02-17 | 1999-06-22 | National Semiconductor Corp. | Semiconductor device trench isolation structure with polysilicon bias voltage contact |
US6781212B1 (en) * | 1998-08-31 | 2004-08-24 | Micron Technology, Inc | Selectively doped trench device isolation |
-
1998
- 1998-08-31 US US09/143,585 patent/US6781212B1/en not_active Expired - Lifetime
-
1999
- 1999-08-03 EP EP04077069A patent/EP1473766A3/de not_active Withdrawn
- 1999-08-03 AT AT99957461T patent/ATE279785T1/de not_active IP Right Cessation
- 1999-08-03 AU AU15160/00A patent/AU1516000A/en not_active Abandoned
- 1999-08-03 WO PCT/US1999/017812 patent/WO2000013208A2/en active IP Right Grant
- 1999-08-03 EP EP99957461A patent/EP1125326B1/de not_active Expired - Lifetime
- 1999-08-03 DE DE69921172T patent/DE69921172T2/de not_active Expired - Lifetime
- 1999-09-28 TW TW092216335U patent/TWM258414U/zh not_active IP Right Cessation
-
2004
- 2004-08-17 US US10/920,579 patent/US7259442B2/en not_active Expired - Fee Related
-
2006
- 2006-05-03 US US11/417,807 patent/US20060220109A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20050012174A1 (en) | 2005-01-20 |
EP1125326A2 (de) | 2001-08-22 |
TWM258414U (en) | 2005-03-01 |
DE69921172T2 (de) | 2006-02-16 |
EP1125326B1 (de) | 2004-10-13 |
US20060220109A1 (en) | 2006-10-05 |
WO2000013208A2 (en) | 2000-03-09 |
AU1516000A (en) | 2000-03-21 |
WO2000013208A9 (en) | 2000-08-17 |
EP1473766A3 (de) | 2004-12-15 |
WO2000013208A3 (en) | 2000-06-02 |
EP1473766A2 (de) | 2004-11-03 |
US6781212B1 (en) | 2004-08-24 |
ATE279785T1 (de) | 2004-10-15 |
US7259442B2 (en) | 2007-08-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |