DE69937485D1 - Methode zur herstellung zwei- oder dreidimensionaler elektrisch leitender oder halbleitender strukturen, eine löschmethode derselben und ein generator/modulator eines elektrischen feldes zum gebrauch in der herstellungsmethode - Google Patents
Methode zur herstellung zwei- oder dreidimensionaler elektrisch leitender oder halbleitender strukturen, eine löschmethode derselben und ein generator/modulator eines elektrischen feldes zum gebrauch in der herstellungsmethodeInfo
- Publication number
- DE69937485D1 DE69937485D1 DE69937485T DE69937485T DE69937485D1 DE 69937485 D1 DE69937485 D1 DE 69937485D1 DE 69937485 T DE69937485 T DE 69937485T DE 69937485 T DE69937485 T DE 69937485T DE 69937485 D1 DE69937485 D1 DE 69937485D1
- Authority
- DE
- Germany
- Prior art keywords
- structures
- modulator
- generator
- producing
- electrically conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title abstract 3
- 230000005684 electric field Effects 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 2
- 239000000463 material Substances 0.000 abstract 5
- 239000011159 matrix material Substances 0.000 abstract 2
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/50—Forming devices by joining two substrates together, e.g. lamination techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
- H01L21/76894—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NO980385A NO980385D0 (no) | 1998-01-28 | 1998-01-28 | Kretser generert ved omvandling in situ |
NO980385 | 1998-01-28 | ||
NO982518 | 1998-06-02 | ||
NO982518A NO308149B1 (no) | 1998-06-02 | 1998-06-02 | Skalerbar, integrert databehandlingsinnretning |
PCT/NO1999/000022 WO1999044229A1 (en) | 1998-01-28 | 1999-01-28 | A method for generating electrical conducting or semiconducting structures in two or three dimensions, a method for erasing the same structures and an electric field generator/modulator for use with the method for generating |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69937485D1 true DE69937485D1 (de) | 2007-12-20 |
DE69937485T2 DE69937485T2 (de) | 2008-08-21 |
Family
ID=26648814
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69937485T Expired - Fee Related DE69937485T2 (de) | 1998-01-28 | 1999-01-28 | Methode zur herstellung zwei- oder dreidimensionaler elektrisch leitender oder halbleitender strukturen, eine löschmethode derselben und ein generator/modulator eines elektrischen feldes zum gebrauch in der herstellungsmethode |
Country Status (12)
Country | Link |
---|---|
US (3) | US6432739B1 (de) |
EP (2) | EP1051745B1 (de) |
JP (2) | JP4272353B2 (de) |
KR (2) | KR100375864B1 (de) |
CN (2) | CN1187793C (de) |
AT (1) | ATE377842T1 (de) |
AU (2) | AU739848B2 (de) |
CA (2) | CA2319430C (de) |
DE (1) | DE69937485T2 (de) |
HK (2) | HK1035602A1 (de) |
RU (2) | RU2183882C2 (de) |
WO (2) | WO1999044229A1 (de) |
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US6545291B1 (en) | 1999-08-31 | 2003-04-08 | E Ink Corporation | Transistor design for use in the construction of an electronically driven display |
JP2003513475A (ja) * | 1999-11-02 | 2003-04-08 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 薄膜超小型電子装置間の垂直相互接続を形成する方法及びそのような垂直相互接続を備えた製品 |
EP1136942A1 (de) * | 2000-03-22 | 2001-09-26 | Infineon Technologies AG | Schaltungsanordnung zum Schützen einer Schaltung gegen Analyse und Manipulation |
US7893435B2 (en) | 2000-04-18 | 2011-02-22 | E Ink Corporation | Flexible electronic circuits and displays including a backplane comprising a patterned metal foil having a plurality of apertures extending therethrough |
JP2004506985A (ja) * | 2000-08-18 | 2004-03-04 | シーメンス アクチエンゲゼルシヤフト | 封入された有機電子構成素子、その製造方法および使用 |
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