EP0474366A3 - Graphics display system including a video random access memory with a split serial register and a run counter - Google Patents

Graphics display system including a video random access memory with a split serial register and a run counter Download PDF

Info

Publication number: EP0474366A3
Authority: EP; European Patent Office
Prior art keywords: random access; access memory; system including; display system; graphics display
Prior art date: 1990-08-06
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

EP19910307222

Other versions

EP0474366A2 (en

EP0474366B1 (en

Inventor

Andre J. Guillemaud

Anthony M. Balistreri

Karl M. Guttag

Richard D. Simpson

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Texas Instruments Inc

Original Assignee

Texas Instruments Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1990-08-06

Filing date

1991-08-06

Publication date

1992-11-19

1990-08-06 Priority claimed from US07/563,469 external-priority patent/US5517609A/en

1991-08-06 Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc

1992-03-11 Publication of EP0474366A2 publication Critical patent/EP0474366A2/en

1992-11-19 Publication of EP0474366A3 publication Critical patent/EP0474366A3/en

1996-07-03 Application granted granted Critical

1996-07-03 Publication of EP0474366B1 publication Critical patent/EP0474366B1/en

2011-08-06 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

EP19910307222 1990-08-06 1991-08-06 Graphics display system including a video random access memory with a split serial register and a run counter Expired - Lifetime EP0474366B1 (en)

Applications Claiming Priority (4)

Application Number	Priority Date	Filing Date	Title
US56347290A	1990-08-06	1990-08-06
US07/563,469 US5517609A (en)	1990-08-06	1990-08-06	Graphics display system using tiles of data
US563472		1990-08-06
US563469		1990-08-06

Publications (3)

Publication Number	Publication Date
EP0474366A2 EP0474366A2 (en)	1992-03-11
EP0474366A3 true EP0474366A3 (en)	1992-11-19
EP0474366B1 EP0474366B1 (en)	1996-07-03

Family

ID=27073299

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
EP19910307222 Expired - Lifetime EP0474366B1 (en)	1990-08-06	1991-08-06	Graphics display system including a video random access memory with a split serial register and a run counter

Country Status (3)

Country	Link
EP (1)	EP0474366B1 (en)
JP (1)	JPH06102842A (en)
DE (1)	DE69120616T2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP3435205B2 (en) *	1994-03-16	2003-08-11	株式会社東芝	Semiconductor storage device
US5694143A (en)	1994-06-02	1997-12-02	Accelerix Limited	Single chip frame buffer and graphics accelerator
JPH10502181A (en)	1994-06-20	1998-02-24	ネオマジック・コーポレイション	Graphics controller integrated circuit without memory interface
CN101751908B (en) *	2008-11-28	2011-12-14	旭曜科技股份有限公司	Frame memory access method and the display drive thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4825411A (en) *	1986-06-24	1989-04-25	Mitsubishi Denki Kabushiki Kaisha	Dual-port memory with asynchronous control of serial data memory transfer
EP0398511A2 (en) *	1989-05-16	1990-11-22	International Business Machines Corporation	Video random access memory

1991
- 1991-08-05 JP JP3195475A patent/JPH06102842A/en active Pending
- 1991-08-06 EP EP19910307222 patent/EP0474366B1/en not_active Expired - Lifetime
- 1991-08-06 DE DE1991620616 patent/DE69120616T2/en not_active Expired - Fee Related

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4825411A (en) *	1986-06-24	1989-04-25	Mitsubishi Denki Kabushiki Kaisha	Dual-port memory with asynchronous control of serial data memory transfer
EP0398511A2 (en) *	1989-05-16	1990-11-22	International Business Machines Corporation	Video random access memory

Also Published As

Publication number	Publication date
DE69120616T2 (en)	1996-11-28
EP0474366A2 (en)	1992-03-11
DE69120616D1 (en)	1996-08-08
EP0474366B1 (en)	1996-07-03
JPH06102842A (en)	1994-04-15

Legal Events

Date	Code	Title	Description
1992-01-24	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
1992-03-11	AK	Designated contracting states	Kind code of ref document: A2 Designated state(s): DE FR GB IT NL
1992-10-03	PUAL	Search report despatched	Free format text: ORIGINAL CODE: 0009013
1992-11-19	AK	Designated contracting states	Kind code of ref document: A3 Designated state(s): DE FR GB IT NL
1993-04-21	17P	Request for examination filed	Effective date: 19930223
1994-11-02	17Q	First examination report despatched	Effective date: 19940915
1996-01-09	GRAH	Despatch of communication of intention to grant a patent	Free format text: ORIGINAL CODE: EPIDOS IGRA
1996-04-23	GRAH	Despatch of communication of intention to grant a patent	Free format text: ORIGINAL CODE: EPIDOS IGRA
1996-05-17	GRAA	(expected) grant	Free format text: ORIGINAL CODE: 0009210
1996-07-03	AK	Designated contracting states	Kind code of ref document: B1 Designated state(s): DE FR GB IT NL
1996-08-08	REF	Corresponds to:	Ref document number: 69120616 Country of ref document: DE Date of ref document: 19960808
1996-08-19	ITF	It: translation for a ep patent filed	Owner name: BARZANO' E ZANARDO ROMA S.P.A.
1996-10-31	ET	Fr: translation filed
1997-05-09	PLBE	No opposition filed within time limit	Free format text: ORIGINAL CODE: 0009261
1997-05-09	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT
1997-06-25	26N	No opposition filed
2002-01-01	REG	Reference to a national code	Ref country code: GB Ref legal event code: IF02
2006-07-06	PGFP	Annual fee paid to national office [announced via postgrant information from national office to epo]	Ref country code: GB Payment date: 20060706 Year of fee payment: 16
2006-07-10	PGFP	Annual fee paid to national office [announced via postgrant information from national office to epo]	Ref country code: NL Payment date: 20060710 Year of fee payment: 16
2006-08-03	PGFP	Annual fee paid to national office [announced via postgrant information from national office to epo]	Ref country code: FR Payment date: 20060803 Year of fee payment: 16
2006-08-31	PGFP	Annual fee paid to national office [announced via postgrant information from national office to epo]	Ref country code: IT Payment date: 20060831 Year of fee payment: 16 Ref country code: DE Payment date: 20060831 Year of fee payment: 16
2008-04-23	GBPC	Gb: european patent ceased through non-payment of renewal fee	Effective date: 20070806
2008-04-30	PG25	Lapsed in a contracting state [announced via postgrant information from national office to epo]	Ref country code: NL Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080301
2008-05-01	NLV4	Nl: lapsed or anulled due to non-payment of the annual fee	Effective date: 20080301
2008-07-25	REG	Reference to a national code	Ref country code: FR Ref legal event code: ST Effective date: 20080430
2008-07-31	PG25	Lapsed in a contracting state [announced via postgrant information from national office to epo]	Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080301
2008-10-31	PG25	Lapsed in a contracting state [announced via postgrant information from national office to epo]	Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20070831
2008-11-28	PG25	Lapsed in a contracting state [announced via postgrant information from national office to epo]	Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20070806
2009-09-30	PG25	Lapsed in a contracting state [announced via postgrant information from national office to epo]	Ref country code: IT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20070806

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