EP0600046B1 - Microprocessor watch-dog monitor for electronic trip units - Google Patents
Microprocessor watch-dog monitor for electronic trip units Download PDFInfo
- Publication number
- EP0600046B1 EP0600046B1 EP93907198A EP93907198A EP0600046B1 EP 0600046 B1 EP0600046 B1 EP 0600046B1 EP 93907198 A EP93907198 A EP 93907198A EP 93907198 A EP93907198 A EP 93907198A EP 0600046 B1 EP0600046 B1 EP 0600046B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor
- switching transistor
- resistor
- watch
- dog monitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0428—Safety, monitoring
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/02—Details
- H02H3/05—Details with means for increasing reliability, e.g. redundancy arrangements
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24125—Watchdog, check at timed intervals
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
- Y04S20/20—End-user application control systems
Definitions
- This invention relates generally to solid-state circuit interrupters in electrical distribution systems and more particularly, it relates to an improved microprocessor watch-dog monitor for electronic trip units used in circuit interrupters so as to maintain the integrity of the trip units.
- circuit breakers have been widely used in commercial and industrial applications for protecting electrical conductors and apparatus connected thereto from damage due to excessive current flow.
- Circuit breakers typically included trip systems which were designed to interrupt when the current flowing through them exceeded a predetermined level.
- most simple trip systems utilized an electromagnet to trip the circuit in response to current or voltage fluctuations.
- the electromagnet provided a magnetic field in response to current flowing through the circuit breaker.
- the magnetic field trips" a mechanism which causes a set of circuit breaker contacts to release, thereby "opening" or "breaking" the circuit path.
- the present invention is directed to an improved microprocessor watch-dog monitor which provides for more reliable operation and performance at a reduced cost.
- the microprocessor watch-dog monitor of the instant invention includes a comparator circuit formed of a first bipolar transistor of the PNP-type conductivity and a second bipolar transistor of the NPN-type conductivity.
- the present invention is concerned with the provision of and improved microprocessor watch-dog monitor for electronic trip units which includes an input transistor, a timing circuit, and a comparator circuit.
- the input transistor has its gate coupled to an input terminal and its source connected to a ground potential.
- a first resistor has its one end connected to the drain of the input transistor and its other end connected to an internal node.
- the timing circuit is formed of a second resistor and a capacitor.
- the second resistor has its one end connected to a power supply potential and its other end connected to one end of the capacitor and to the internal node. The other end of the capacitor is connected to the ground potential.
- the comparator circuit is formed of a first switching transistor and a second switching transistor.
- the first switching transistor has its emitter connected to the internal node.
- the second switching transistor has its base connected to the collector of the first switching transistor, its collector connected to the base of the first switching transistor, and its emitter coupled to an output terminal.
- a voltage divider is formed of third and fourth resistors.
- the third resistor has its one end connected to the power supply potential and its other end connected to the collector of the second switching transistor and to one end of the fourth resistor. The other end of the fourth resistor is connected to the ground potential.
- FIG. 1 a detailed schematic circuit diagram of an improved microprocessor watch-dog monitoring circuit 10 for use in association with microcomputer-based electronic trip units employed in solid-state circuit interrupters.
- the watch-dog monitoring circuit 10 serves to maintain the integrity of the microcomputer-based electronic trip units. In other words, the watch-dog monitoring circuit protects the trip units in the event of microcomputer malfunctions. Therefore, the watch-dog monitoring circuit 10 is designed to engage a trip solenoid 11 for breaking the current path in the circuit interrupter if the microcomputer 12 fails to reset it within a predetermined time period.
- the watch-dog monitoring circuit 10 is comprised of an input switching circuit 14, a timing circuit 16, and a comparator circuit 18.
- the input circuit 14 includes an N-channel input field-effect transistor Q1, a current-limiting collector resistor R1, a base resistor R6, an input resistor R5, and a diode D1.
- the transistor Q1 has its drain connected to one end of the current-limiting resistor R1, its gate connected to one end of the base resistor R6, and its source connected to a ground potential GND.
- the anode of the diode D1 is also connected to the ground potential and to one end of the input resistor R5, and the cathode of the diode D1 is connected to the gate of the transistor Q1.
- the other end of the resistor R5 is connected to the other end of the base resistor R6.
- the other end of the resistor R1 is connected to an internal node A.
- the monitoring circuit 10 further includes an input terminal 20 and an output terminal 22.
- the input terminal 20 is coupled to the microcomputer 12 for receiving reset pulses in the form of a pulse train, each pulse having a pulse width of approximately 200 ms and a period of 500 ms. The amplitude of the pulses varies between zero and +5.0 volts.
- the input terminal 20 is connected to one end of an input resistor R18.
- the other end of the resistor R18 is connected to one end of a coupling capacitor C3.
- the other end of the capacitor C3 is connected to the junction of the resistors R5 and R6.
- a second input transistor Q2 may be optionally provided for testing the watch-dog monitoring circuit by simulating a malfunction of the microcomputer 12 (i.e., reset pulses are stopped).
- the transistor Q2 has its collector connected to one end of the capacitor C3, its base coupled to a second input terminal 24 via a current-limiting resistor R9, and its emitter connected to the ground potential.
- the second input terminal 20 has applied thereto a voltage of +5.0 volts, thereby rendering the transistor Q1 non-conductive.
- the timing circuit 16 is formed of a resistor R2 and a timing capacitor C1.
- One end of the resistor R2 is connected to a power supply potential VCC, which is typically at +12.0 volts.
- the other end of the resistor R2 is connected to one end of the capacitor C1 and to the internal node A.
- the other end of the capacitor C1 is connected to the ground potential.
- the comparator circuit 18 includes a bipolar PNP-type switching transistor Q3, a bipolar NPN-type switching transistor Q4, and a voltage divider formed of resistors R7 and R8.
- the transistor Q3 has its emitter connected to the junction of the resistor R2 and the capacitor C1 at the internal node A, its base connected to the collector of the transistor Q4, and its collector connected to the base of the transistor Q4.
- One end of the resistor R7 is also connected to the power supply potential VCC.
- the other end of the resistor R7 is connected to one end of the resistor R8 and to the collector of the transistor Q4.
- the other end of the resistor R8 is connected to the ground potential.
- a diode D2 has its anode connected to the emitter of the transistor Q4 and its cathode connected to the output terminal 22.
- the output terminal 22 provides an output signal for energizing the trip solenoid 11.
- the logic high reset pulses on the input terminal 20 will be regularly generated (every 200 ms) by the microcomputer 12.
- the reset pulses are passed through the resistor R18, the capacitor C3, and the resistor R6 to the gate of the input transistor Q1.
- the input transistor Q1 will be turned on periodically so as to discharge the capacitor C1 via the resistor R1 and the drain-source junction of the transistor Q1.
- the microcomputer 12 malfunctions so as to stop the generation of the periodic reset pulses the input transistor Q1 will remain in the non-conductive state. It should be noted that this "failed" condition can be simulated by supplying a voltage of +5.0 volts to the base of the second input transistor Q2.
- the capacitor C1 will begin to charge up along the waveform 28 in Figure 2.
- the transistor Q3 will be turned on so as to pull up the base of the transistor Q4. Consequently, the transistor Q4 will also be rendered conductive.
- the output voltage V out of +6.18 on the waveform 30 in Figure 2 will appear at the output terminal 24 at the time t3. This high voltage on the output terminal 24 is used to engage or energize the trip solenoid 11, thereby interrupting the current path in the circuit breaker.
- the output voltage will be generated in approximately 133 ms after the malfunction of the microcomputer 12 or interruption of the reset pulses.
- the present invention provides an improved microprocessor watch-dog monitor for electronic trip units which includes a comparator circuit formed of a first bipolar transistor of the PNP-type conductivity and a second bipolar transistor of the NPN-type conductivity.
- the watch-dog monitor of the present invention provides for more reliable operation and performance at reduced cost than those traditionally available.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Debugging And Monitoring (AREA)
- Electronic Switches (AREA)
Abstract
Description
- This invention relates generally to solid-state circuit interrupters in electrical distribution systems and more particularly, it relates to an improved microprocessor watch-dog monitor for electronic trip units used in circuit interrupters so as to maintain the integrity of the trip units.
- As is generally well-known in the art, circuit breakers have been widely used in commercial and industrial applications for protecting electrical conductors and apparatus connected thereto from damage due to excessive current flow. Circuit breakers typically included trip systems which were designed to interrupt when the current flowing through them exceeded a predetermined level. Specifically, most simple trip systems utilized an electromagnet to trip the circuit in response to current or voltage fluctuations. The electromagnet provided a magnetic field in response to current flowing through the circuit breaker. When the current level increased beyond the predetermined level or trip point, the magnetic field "trips" a mechanism which causes a set of circuit breaker contacts to release, thereby "opening" or "breaking" the circuit path.
- Gradually, however, there has arisen a need in the industry for more sophisticated and elaborate tripping systems as the complexity of electrical distribution systems increased. For example, in many commercial and industrial equipment today it is desired to have circuit breakers that perform both an instantaneous and delayed tripping (i.e., time-current interrupting characteristics) so as to provide improved accuracy and flexibility on the equipment to be controlled. For this reason, many microprocessor-based solid-state circuit interrupters have been also developed in the prior art in an attempt to provide more accurate and reliable control operations on the electrical distribution system on which the circuit interrupter was being employed. To this end, a microcomputer is provided which is coupled between the current path and a trip solenoid controlling the mechanism for breaking the current path. The microcomputer stores trip points which activate the trip solenoid when the current within the current path exceeds the trip points.
- Therefore, in order to enhance system dependability there is generally required a watch-dog circuit for protecting the tripping system in the event of a microcomputer malfunction. Prior art watch-dog circuits are known to exist which include either an operational amplifier or a discrete programmable unijunction transistor. While these prior art circuits performed their function adequately, they suffer from the disadvantage of being high in cost and having a low reliability.
- Accordingly, the present invention is directed to an improved microprocessor watch-dog monitor which provides for more reliable operation and performance at a reduced cost. Specifically, the microprocessor watch-dog monitor of the instant invention includes a comparator circuit formed of a first bipolar transistor of the PNP-type conductivity and a second bipolar transistor of the NPN-type conductivity.
- Accordingly, it is a general object of the present invention to provide an improved microprocessor watch-dog monitor for electronic trip units which is relatively simple and economical to manufacture and assemble, but yet overcomes the disadvantages of the prior art circuits.
- It is an object of the present invention to provide an improved microprocessor watch-dog monitor for electronic trip units which has a high reliability in its operation.
- It is another object of the present invention to provide an improved microprocessor watch-dog monitor for electronic trip units which is formed of components with relatively low cost.
- It is still another object of the present invention to provide an improved microprocessor watch-dog monitor for electronic trip units which includes a comparator circuit formed of a first bipolar transistor of the PNP-type conductivity and a second bipolar transistor of the NPN-type conductivity.
- In accordance with these aims and objectives, the present invention is concerned with the provision of and improved microprocessor watch-dog monitor for electronic trip units which includes an input transistor, a timing circuit, and a comparator circuit. The input transistor has its gate coupled to an input terminal and its source connected to a ground potential. A first resistor has its one end connected to the drain of the input transistor and its other end connected to an internal node. The timing circuit is formed of a second resistor and a capacitor. The second resistor has its one end connected to a power supply potential and its other end connected to one end of the capacitor and to the internal node. The other end of the capacitor is connected to the ground potential.
- The comparator circuit is formed of a first switching transistor and a second switching transistor. The first switching transistor has its emitter connected to the internal node. The second switching transistor has its base connected to the collector of the first switching transistor, its collector connected to the base of the first switching transistor, and its emitter coupled to an output terminal. A voltage divider is formed of third and fourth resistors. The third resistor has its one end connected to the power supply potential and its other end connected to the collector of the second switching transistor and to one end of the fourth resistor. The other end of the fourth resistor is connected to the ground potential.
- These and other objects and advantages of the present invention will become more fully apparent from the following detailed description when read in conjunction with the accompanying drawings with like reference numerals indicating corresponding parts throughout, wherein:
- Figure 1 is a detailed schematic circuit diagram of a microprocessor watch-dog monitor, constructed in accordance with the principles of the present invention; and
- Figure 2 are waveforms at various points in the circuit of Figure 1, useful in understanding its operation.
- Referring now to the drawings, there is shown in Figure 1 a detailed schematic circuit diagram of an improved microprocessor watch-
dog monitoring circuit 10 for use in association with microcomputer-based electronic trip units employed in solid-state circuit interrupters. The watch-dog monitoring circuit 10 serves to maintain the integrity of the microcomputer-based electronic trip units. In other words, the watch-dog monitoring circuit protects the trip units in the event of microcomputer malfunctions. Therefore, the watch-dog monitoring circuit 10 is designed to engage a trip solenoid 11 for breaking the current path in the circuit interrupter if themicrocomputer 12 fails to reset it within a predetermined time period. - The watch-
dog monitoring circuit 10 is comprised of aninput switching circuit 14, atiming circuit 16, and acomparator circuit 18. Theinput circuit 14 includes an N-channel input field-effect transistor Q1, a current-limiting collector resistor R1, a base resistor R6, an input resistor R5, and a diode D1. The transistor Q1 has its drain connected to one end of the current-limiting resistor R1, its gate connected to one end of the base resistor R6, and its source connected to a ground potential GND. The anode of the diode D1 is also connected to the ground potential and to one end of the input resistor R5, and the cathode of the diode D1 is connected to the gate of the transistor Q1. The other end of the resistor R5 is connected to the other end of the base resistor R6. The other end of the resistor R1 is connected to an internal node A. - The
monitoring circuit 10 further includes an input terminal 20 and anoutput terminal 22. The input terminal 20 is coupled to themicrocomputer 12 for receiving reset pulses in the form of a pulse train, each pulse having a pulse width of approximately 200 ms and a period of 500 ms. The amplitude of the pulses varies between zero and +5.0 volts. The input terminal 20 is connected to one end of an input resistor R18. The other end of the resistor R18 is connected to one end of a coupling capacitor C3. The other end of the capacitor C3 is connected to the junction of the resistors R5 and R6. - A second input transistor Q2 may be optionally provided for testing the watch-dog monitoring circuit by simulating a malfunction of the microcomputer 12 (i.e., reset pulses are stopped). As can be seen, the transistor Q2 has its collector connected to one end of the capacitor C3, its base coupled to a
second input terminal 24 via a current-limiting resistor R9, and its emitter connected to the ground potential. In order to simulate a failure, the second input terminal 20 has applied thereto a voltage of +5.0 volts, thereby rendering the transistor Q1 non-conductive. - The
timing circuit 16 is formed of a resistor R2 and a timing capacitor C1. One end of the resistor R2 is connected to a power supply potential VCC, which is typically at +12.0 volts. The other end of the resistor R2 is connected to one end of the capacitor C1 and to the internal node A. The other end of the capacitor C1 is connected to the ground potential. - The
comparator circuit 18 includes a bipolar PNP-type switching transistor Q3, a bipolar NPN-type switching transistor Q4, and a voltage divider formed of resistors R7 and R8. The transistor Q3 has its emitter connected to the junction of the resistor R2 and the capacitor C1 at the internal node A, its base connected to the collector of the transistor Q4, and its collector connected to the base of the transistor Q4. One end of the resistor R7 is also connected to the power supply potential VCC. The other end of the resistor R7 is connected to one end of the resistor R8 and to the collector of the transistor Q4. The other end of the resistor R8 is connected to the ground potential. - A diode D2 has its anode connected to the emitter of the transistor Q4 and its cathode connected to the
output terminal 22. Theoutput terminal 22 provides an output signal for energizing the trip solenoid 11. - The operation of the microprocessor watch-
dog monitoring circuit 10 will now be explained with reference to the waveforms of Figure 2. Under normal operating conditions, the logic high reset pulses on the input terminal 20 will be regularly generated (every 200 ms) by themicrocomputer 12. The reset pulses are passed through the resistor R18, the capacitor C3, and the resistor R6 to the gate of the input transistor Q1. As a result, the input transistor Q1 will be turned on periodically so as to discharge the capacitor C1 via the resistor R1 and the drain-source junction of the transistor Q1. However, if themicrocomputer 12 malfunctions so as to stop the generation of the periodic reset pulses the input transistor Q1 will remain in the non-conductive state. It should be noted that this "failed" condition can be simulated by supplying a voltage of +5.0 volts to the base of the second input transistor Q2. - In the "failed" condition, as designated at time t1 in the
waveform 26 in Figure 2, the capacitor C1 will begin to charge up along thewaveform 28 in Figure 2. At the time t2 when the voltage defining a turn-on signal on the capacitor C1 is greater than the reference voltage Vref on the base of the transistor Q3 by a Vbe, the transistor Q3 will be turned on so as to pull up the base of the transistor Q4. Consequently, the transistor Q4 will also be rendered conductive. When the transistor Q4 turns on, the output voltage Vout of +6.18 on thewaveform 30 in Figure 2 will appear at theoutput terminal 24 at the time t3. This high voltage on theoutput terminal 24 is used to engage or energize the trip solenoid 11, thereby interrupting the current path in the circuit breaker. As can be seen, the output voltage will be generated in approximately 133 ms after the malfunction of themicrocomputer 12 or interruption of the reset pulses. - For completeness in the disclosure of the above described microprocessor watch-dog monitoring circuit but not for the purposes of limitation, the following representative values and component identifications are submitted. These values and components were employed in a circuit that was constructed and tested and which provides a high quality performance. Those skilled in the art will recognize that many alternative elements and values may be employed in constructing circuits in accordance with the present invention.
PART TYPE or VALUE R1 18 ohms R2 75K ohms R5 27K ohms R6 .1 ohms R7 10K ohms R8 14K ohms R9 1K ohms R18 100 ohms C1 .22 uf C3 .001 uf D1 IN4148 D2 BAZ 170 Q2 BS 170 Q3 2N3906 Q1,Q4 2N3904 - From the foregoing detailed description, it can thus be seen that the present invention provides an improved microprocessor watch-dog monitor for electronic trip units which includes a comparator circuit formed of a first bipolar transistor of the PNP-type conductivity and a second bipolar transistor of the NPN-type conductivity. The watch-dog monitor of the present invention provides for more reliable operation and performance at reduced cost than those traditionally available.
- While there has been illustrated and described what is at present considered to be a preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made, and equivalents may be substituted for elements thereof without departing from the true scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the central scope thereof. Therefore, it is intended that this invention not be limited to the particular embodiment disclosed as the best mode contemplated for carrying out the invention, but that the invention will include all embodiments falling within the scope of the appended claims.
Claims (15)
- A microprocessor watch-dog monitor for electronic trip units comprising:an input transistor (Q1) having its gate coupled to an input terminal (20) and its source connected to a ground potential;a first resistor (R1) having its one end connected to the drain of said input transistor (Q1) and its other end connected to an internal node (A);a timing circuit (16) of a second resistor (R2) and a capacitor (C1), said second resistor (R2) having its one end connected to a power supply potential (VCC) and its other end connected to one end of said capacitor (C1) and to said internal node (A), the other end of said capacitor (C1) being connected to the ground potential;a comparator circuit (18) formed of a first switching transistor (Q3) and a second switching transistor (Q4);said first switching transistor (Q3) having its emitter connected to said internal node (A);said second switching transistor (Q4) having its base connected to the collector of said first switching transistor (Q3), its collector connected to the base of said first switching transistor (Q3), and its emitter coupled to an output terminal (22); anda voltage divider formed of third and fourth resistors (R7, R8), said third resistor (R7) having its one end connected to the power supply potential (VCC) and its other end connected to the collector of said second switching transistor (Q3) and to one end of said fourth resistor (R8), the other end of said fourth resistor (R8) being connected to the ground potential.
- A microprocessor watch-dog monitor as claimed in Claim 1, wherein said input transistor (Q1) is comprised of an N-channel field-effect transistor.
- A microprocessor watch-dog monitor as claimed in Claim 2, wherein said first switching transistor (Q3) is a bipolar transistor of the PNP-type conductivity.
- A microprocessor watch-dog monitor as claimed in Claim 3, wherein said second switching transistor (Q4) is a bipolar transistor of the NPN-type conductivity.
- A microprocessor watch-dog monitor as claimed in Claim 1, further comprising a second input transistor (Q2) having its base coupled to a second input terminal (24), its collector coupled to the base of said first input transistor (Q1), and its emitter connected to the ground potential.
- A microprocessor watch-dog monitor as claimed in Claim 1, wherein said first input terminal (20) is connected to a microcomputer (12) for receiving reset pulses to render periodically said input transistor (Q1) to be conductive.
- A microprocessor watch-dog monitor as claimed in Claim 6, wherein said timing circuit (16) generates a turn-on signal to the emitter of said first switching transistor (Q3) after the absence of the reset pulses for a predetermined time to render said first and second switching transistors (Q3, Q4) to be conductive thereby producing an output signal at the output terminal (22).
- A microprocessor watch-dog monitor as claimed in Claim 7, further comprising a trip solenoid which is energized in response to said output voltage for interrupting a current path in a circuit interrupter.
- A microprocessor watch-dog monitor as claimed in Claim 1, further comprising a diode having its cathode connected to the base of said input transistor (Q1) and its anode connected to the ground potential.
- A microprocessor watch-dog monitor for electronic trip units, comprising:input transistor means (14) responsive to reset pulses for resetting periodically timing means (16);said timing means (16) for generating a turn-on signal after the absence of the reset pulses for a predetermined time at an internal node (A);a comparator circuit (18) formed of a first switching transistor (Q3) and a second switching transistor (Q4);said first switching transistor (Q3) having its emitter connected to said internal node (A);said second switching transistor (Q4) having its base connected to the collector of said first switching transistor (Q3), its collector connected to the base of said first switching transistor (Q3), and its emitter coupled to an output terminal (22);a voltage divider formed of first and second resistors (R7, R8), said first resistor (R7) having its one end connected to a power supply potential (VCC) and its other end connected to the collector of said second switching transistor (Q3) and to one end of said second resistor (R8), the other end of said second resistor (R8) being connected to a ground potential; andsaid first and second switching transistors (Q3, Q4) being turned on in response to said turn-on signal to produce an output signal at the output terminal.
- A microprocessor watch-dog monitor as claimed in Claim 10, wherein said input transistor (Q1) is comprised of an N-channel field-effect transistor.
- A microprocessor watch-dog monitor as claimed in Claim 11, wherein said first switching transistor (Q3) is a bipolar transistor of the PNP-type conductivity.
- A microprocessor watch-dog monitor as claimed in Claim 12, wherein said second switching transistor (Q4) is a bipolar transistor of the NPN-type conductivity.
- A microprocessor watch-dog monitor as claimed in Claim 10, further comprising second input transistor means coupled to said first input transistor means for testing the operation of said watch-dog monitor.
- A microprocessor watch-dog monitor as claimed in Claim 10, further comprising a trip solenoid which is energized in response to said output Voltage for interrupting a current path in a circuit interrupter.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/901,364 US5214560A (en) | 1992-06-19 | 1992-06-19 | Microprocessor watch-dog monitor for electronic trip units |
US901364 | 1992-06-19 | ||
PCT/US1993/001946 WO1994000899A1 (en) | 1992-06-19 | 1993-03-05 | Microprocessor watch-dog monitor for electronic trip units |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0600046A1 EP0600046A1 (en) | 1994-06-08 |
EP0600046A4 EP0600046A4 (en) | 1994-11-23 |
EP0600046B1 true EP0600046B1 (en) | 1997-01-02 |
Family
ID=25414027
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP93907198A Expired - Lifetime EP0600046B1 (en) | 1992-06-19 | 1993-03-05 | Microprocessor watch-dog monitor for electronic trip units |
Country Status (6)
Country | Link |
---|---|
US (1) | US5214560A (en) |
EP (1) | EP0600046B1 (en) |
CA (1) | CA2115665C (en) |
DE (1) | DE69307110T2 (en) |
MX (1) | MX9302426A (en) |
WO (1) | WO1994000899A1 (en) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7400477B2 (en) | 1998-08-24 | 2008-07-15 | Leviton Manufacturing Co., Inc. | Method of distribution of a circuit interrupting device with reset lockout and reverse wiring protection |
US6487057B1 (en) * | 2000-06-13 | 2002-11-26 | Eaton Corporation | Ground fault current interrupter/arc fault current interrupter circuit breaker with fail safe mechanism |
GB0120748D0 (en) | 2001-08-25 | 2001-10-17 | Lucas Aerospace Power Equip | Generator |
EP1479145B1 (en) * | 2002-02-25 | 2014-11-05 | General Electric Company | Integrated protection, monitoring and control system |
US7111195B2 (en) * | 2002-02-25 | 2006-09-19 | General Electric Company | Method and system for external clock to obtain multiple synchronized redundant computers |
US7058482B2 (en) * | 2002-02-25 | 2006-06-06 | General Electric Company | Data sample and transmission modules for power distribution systems |
US7747356B2 (en) | 2002-02-25 | 2010-06-29 | General Electric Company | Integrated protection, monitoring, and control system |
US20030212473A1 (en) * | 2002-02-25 | 2003-11-13 | General Electric Company | Processing system for a power distribution system |
US7532955B2 (en) * | 2002-02-25 | 2009-05-12 | General Electric Company | Distributed protection system for power distribution systems |
DE10210920B4 (en) * | 2002-03-13 | 2005-02-03 | Moeller Gmbh | Circuit breaker with electronic release |
US7636616B2 (en) * | 2003-02-25 | 2009-12-22 | General Electric Company | Protection system for power distribution systems |
US7039822B2 (en) * | 2003-02-27 | 2006-05-02 | Promos Technologies Inc. | Integrated circuit memory architecture with selectively offset data and address delays to minimize skew and provide synchronization of signals at the input/output section |
GB2401467B (en) * | 2003-05-09 | 2006-01-25 | Autoliv Dev | Improvements in or relating to a movable or removable unit for a motor vehicle |
DE10322385B3 (en) * | 2003-05-17 | 2004-11-11 | Moeller Gmbh | Method and circuit arrangement for monitoring the function of an electronic-mechanical position switch |
DE102004015932A1 (en) * | 2004-04-01 | 2005-10-20 | Moeller Gmbh | Method and circuit arrangement for operating a magnetic drive |
US7372678B2 (en) * | 2005-08-24 | 2008-05-13 | Leviton Manufacturing Co., Inc. | Circuit interrupting device with automatic test |
US7852606B2 (en) * | 2005-08-24 | 2010-12-14 | Leviton Manufacturing Company, Inc. | Self-testing circuit interrupting device |
US7554796B2 (en) * | 2006-01-20 | 2009-06-30 | Adc Telecommunications, Inc. | Modular power distribution system and methods |
US7911746B2 (en) * | 2006-06-01 | 2011-03-22 | Leviton Manufacturing Co., Inc. | GFCI with self-test and remote annunciation capabilities |
CN101910856B (en) | 2008-01-29 | 2014-06-18 | 立维腾制造有限公司 | Self testing fault circuit interrupter apparatus and method |
US8183869B2 (en) * | 2008-09-23 | 2012-05-22 | Leviton Manufacturing Co., Inc. | Circuit interrupter with continuous self-testing feature |
US8116056B2 (en) * | 2008-11-14 | 2012-02-14 | Schneider Electric USA, Inc. | Low voltage startup timer for a microcontroller-based circuit breaker |
JP5989687B2 (en) * | 2014-01-20 | 2016-09-07 | 中国電力株式会社 | Transmission line relay panel recovery device |
US9759758B2 (en) | 2014-04-25 | 2017-09-12 | Leviton Manufacturing Co., Inc. | Ground fault detector |
US9697065B1 (en) | 2016-03-09 | 2017-07-04 | Nxp Usa, Inc. | Systems and methods for managing reset |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5875255A (en) * | 1981-10-29 | 1983-05-06 | Nec Home Electronics Ltd | Runaway detector for microcomputer |
US5166887A (en) * | 1988-03-31 | 1992-11-24 | Square D Company | Microcomputer-controlled circuit breaker system |
US5081625A (en) * | 1988-10-05 | 1992-01-14 | Ford Motor Company | Watchdog circuit for use with a microprocessor |
JPH061860Y2 (en) * | 1988-10-31 | 1994-01-19 | 自動車電機工業株式会社 | Automatic vehicle speed controller |
US5089928A (en) * | 1989-08-31 | 1992-02-18 | Square D Company | Processor controlled circuit breaker trip system having reliable status display |
US5017846A (en) * | 1990-04-05 | 1991-05-21 | General Electric Company | Stall protection circuit for an electronically commutated motor |
US5151854A (en) * | 1990-07-20 | 1992-09-29 | Honeywell Inc. | Integrated low voltage detect and watchdog circuit |
-
1992
- 1992-06-19 US US07/901,364 patent/US5214560A/en not_active Expired - Fee Related
-
1993
- 1993-03-05 DE DE69307110T patent/DE69307110T2/en not_active Expired - Fee Related
- 1993-03-05 EP EP93907198A patent/EP0600046B1/en not_active Expired - Lifetime
- 1993-03-05 WO PCT/US1993/001946 patent/WO1994000899A1/en active IP Right Grant
- 1993-03-05 CA CA002115665A patent/CA2115665C/en not_active Expired - Fee Related
- 1993-04-26 MX MX9302426A patent/MX9302426A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0600046A4 (en) | 1994-11-23 |
EP0600046A1 (en) | 1994-06-08 |
WO1994000899A1 (en) | 1994-01-06 |
US5214560A (en) | 1993-05-25 |
DE69307110T2 (en) | 1997-07-03 |
CA2115665A1 (en) | 1994-01-06 |
CA2115665C (en) | 1999-01-05 |
DE69307110D1 (en) | 1997-02-13 |
MX9302426A (en) | 1994-01-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0600046B1 (en) | Microprocessor watch-dog monitor for electronic trip units | |
EP0600042B1 (en) | Overtemperature sensing and signaling circuit | |
US4442472A (en) | Solid state trip circuit with digital timer | |
EP1150410B1 (en) | Solid state protection circuit for electrical apparatus | |
EP0055816A1 (en) | Electric switch operation monitoring circuitry | |
US6885745B1 (en) | Voltage and protection arrangement for a telephone subscriber line interface circuit | |
US3919600A (en) | Overload current protector for A. C. motors | |
US11444448B2 (en) | Leakage current detection and protection device, and power connector and electrical appliance employing the same | |
KR960003201B1 (en) | Trip control device for circuit breaker | |
CA1129060A (en) | Circuit breaker having an electronic fault sensing and trip initiating unit | |
US4736264A (en) | Primary switched-mode power supply unit | |
US6717416B2 (en) | Circuit configuration for the voltage supply of a two-wire sensor | |
US4918564A (en) | Load driver with delayed turn-off | |
US6111736A (en) | Static relay with condition detecting | |
CN115173363A (en) | Overcurrent protection circuit and servo driver | |
CN210468782U (en) | Power line leakage protection device, electric connection equipment and electrical appliance | |
US5834958A (en) | Power on system | |
US7944665B2 (en) | Control and protection system for an output of automation equipment | |
CA2115358A1 (en) | Trip energy monitor | |
US4603366A (en) | High-speed voltage-sensitive circuit breaker | |
KR950003489Y1 (en) | Over current breaker | |
WO1994000900A1 (en) | Logic level current and voltage independent restraint system | |
JPH0223028A (en) | Overcurrent protective circuit | |
US3353171A (en) | Magnetic device for indicating the occurrence of an electrical signal | |
JPH10107605A (en) | Overcurrent protective circuit of transistor |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 19940311 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB |
|
RHK1 | Main classification (correction) |
Ipc: H02H 3/05 |
|
A4 | Supplementary search report drawn up and despatched |
Effective date: 19941003 |
|
AK | Designated contracting states |
Kind code of ref document: A4 Designated state(s): DE FR GB |
|
GRAG | Despatch of communication of intention to grant |
Free format text: ORIGINAL CODE: EPIDOS AGRA |
|
17Q | First examination report despatched |
Effective date: 19960305 |
|
GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB |
|
REF | Corresponds to: |
Ref document number: 69307110 Country of ref document: DE Date of ref document: 19970213 |
|
ET | Fr: translation filed | ||
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed | ||
REG | Reference to a national code |
Ref country code: GB Ref legal event code: IF02 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20020205 Year of fee payment: 10 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20020228 Year of fee payment: 10 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20020327 Year of fee payment: 10 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20030305 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20031001 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20030305 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20031127 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST |