EP1839154A4 - System and method of erasing non-volatile recording media - Google Patents

System and method of erasing non-volatile recording media

Info

Publication number
EP1839154A4
EP1839154A4 EP04813277A EP04813277A EP1839154A4 EP 1839154 A4 EP1839154 A4 EP 1839154A4 EP 04813277 A EP04813277 A EP 04813277A EP 04813277 A EP04813277 A EP 04813277A EP 1839154 A4 EP1839154 A4 EP 1839154A4
Authority
EP
European Patent Office
Prior art keywords
recording medium
volatile recording
erasure
erasure area
area identifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04813277A
Other languages
German (de)
French (fr)
Other versions
EP1839154A1 (en
Inventor
Peter Jensen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TEAC Aerospace Technologies Inc
Original Assignee
TEAC Aerospace Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TEAC Aerospace Technologies Inc filed Critical TEAC Aerospace Technologies Inc
Publication of EP1839154A1 publication Critical patent/EP1839154A1/en
Publication of EP1839154A4 publication Critical patent/EP1839154A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/62Protecting access to data via a platform, e.g. using keys or access control rules
    • G06F21/6209Protecting access to data via a platform, e.g. using keys or access control rules to a single file or object, e.g. in a secure envelope, encrypted and accessed using a key, or with access control rules appended to the object itself
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/062Securing storage systems
    • G06F3/0623Securing storage systems in relation to content
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0674Disk device
    • G06F3/0676Magnetic disk device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2143Clearing memory, e.g. to prevent the data from being stolen
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

Definitions

  • the disclosure relates to secure and efficient erasure of data.
  • the disclosure relates to erasure of data that is stored on a recording medium.
  • non-volatile recording media can be a hard drive, solid state flash drive, PCMCIA card, PC card, magnetic tape, or optical storage medium. Other types of non-volatile recording media can also be used.
  • a complete and secure erasure methodology is utilized in high security systems such as those used in the military to ensure that data once stored in non-volatile recording media can never be recovered. Further, lower level security systems can utilize complete erasure to protect personal or confidential data.
  • One current method for erasing data is deleting the pointer that points to the target data to be erased. Although the data is inaccessible through the deleted pointer, the data remains recorded in memory and is potentially accessible through other means. The erased data can potentially be revived if, for example, the nonvolatile recording medium is entirely parsed out memory location by memory location. Accordingly, solely erasing the pointer does not securely erase the data from the non-volatile recording medium.
  • a data pattern can include a variety of digits and/or alphanumeric characters.
  • the data pattern can include a series of ones, zeroes, or a random combination of ones and zeroes.
  • the erasure procedure may leave traces of the value previously stored in a particular memory location. Although these traces are not easily read, the traces can be read by using extraordinary measures.
  • an erasure area identifier is transmitted from a processor in a computing device to a non-volatile recording medium controller.
  • the erasure area identifier corresponds to a plurality of memory locations in an erasure area in the non-volatile recording medium.
  • the non-volatile recording medium controller is operably connected with the non-volatile recording medium.
  • a data pattern is also transmitted from the processor in the computing device to the non-volatile recording medium controller.
  • the data pattern is transmitted in a single transfer.
  • an erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller.
  • the non-volatile recording medium controller constructs a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writes at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • the erasure area identifier is randomly generated. In another aspect, the erasure area identifier is inputted by the user. In another aspect, the erasure area identifier includes a start memory location in the erasure area and a memory location count. In another aspect, the erasure area identifier defines the erasure area according to a cylinder-head-sector addressing scheme. In yet another aspect, the erasure area identifier defines the erasure area according to a logical block addressing scheme.
  • the erasure area identifier or the data pattern are pre-stored in a storage device, the storage device coupled with the processor in the computing device.
  • the data pattern is randomly generated or inputted by the user.
  • the processor in the computing device a signal indicative of a status of the data in the erasure area of the non-volatile recording medium.
  • the non-volatile recording medium is a hard disk. In another aspect, the non-volatile recording medium is a solid-state PROM memory. In another aspect, the non-volatile recording medium is a solid-state flash memory. In another aspect, the non-volatile recording medium is a magnetic tape.
  • a method of securely erasing data from a non-volatile recording medium An erasure command is transmitted from a processor in a computing device to a non-volatile recording medium controller.
  • the non-volatile recording medium controller is operably connected with the non-volatile recording medium.
  • a plurality of instructions are constructed to overwrite a plurality of memory locations corresponding to an erasure area identified by a pre-stored erasure area identifier.
  • Each of the instructions writes at least one of the memory locations in the erasure area identified by the pre-stored erasure area identifier with a pre-stored data pattern.
  • the erasure area or the data pattern are pre-stored in the non-volatile recording medium.
  • a erasure area identifier is transmitted from a processor in a computing device to a non-volatile recording medium controller, wherein the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium, and wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium.
  • a data pattern is transmitted from the processor in the computing device to the nonvolatile recording medium controller, wherein the data pattern is being transmitted a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area.
  • an erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller, the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • a non-volatile recording medium erasure system There is a processor in a computing device that transmits an erasure area identifier, a data pattern and an erasure command.
  • the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium.
  • the non-volatile recording medium controller is operably connected with the non-volatile recording medium, and constructs a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier.
  • Each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • the data pattern can being transmitted a single time or a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area. In another aspect, if the erasure area identifier is zero, all memory locations in the non-volatile recording medium are written with the data pattern.
  • a data pattern and an erasure area identifier are transmitted from a processor in a computing device to a non-volatile recording medium controller in a single transfer.
  • the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium.
  • the non-volatile recording medium controller is operably connected with the non-volatile recording medium.
  • An erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller.
  • the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • Figure 1 A illustrates a computing system for securely erasing data stored in a non-volatile recording medium.
  • Figure 1 B illustrates a computing system wherein the non-volatile recording medium is a hard disk drive.
  • Figure 2A illustrates a tabular diagram of the content of an erasure message sent to a hard drive with cylinder-head-sector addressing.
  • Figure 2B illustrates a tabular diagram of the content of an erasure message sent to a hard drive with logical block addressing.
  • Figure 3 illustrates a flow diagram of a non-volatile recording medium erasure.
  • the method and system described below provide faster erasure of data stored on non-volatile recording media than previously seen.
  • erasure of data on a non-volatile recording medium involves the use of a data pattern.
  • the data pattern is usually sent to the non-volatile recording medium every time a memory location is overwritten.
  • a large number of transfers of the data pattern is usually required because a secure erase generally involves overwriting thousands, if not millions, of memory locations on the non-volatile recording medium.
  • the transfer of each data pattern to the non-volatile recording medium requires a significant amount of time.
  • the method and system described below reduces the amount of time needed to perform a secure erasure by reducing the number of transfers of the data pattern to the non-volatile recording medium.
  • FIG. 1A illustrates a computing system 100 for securely erasing data stored in a non-volatile recording medium 130.
  • the non-volatile recording medium 130 includes a controller 120 and a storage module 125.
  • the controller 120 can be a computer processor that stores data in the storage module 125 by directing the reading and writing of data on the storage module 125.
  • the controller 120 communicates with external devices such as a computing device 140.
  • the computing device 140 communicates with the controller 120 to manage the data that is written and erased from the storage module 125.
  • the computing device 140 includes a CPU 110 and a random access memory (“RAM”) 180.
  • the CPU 110 manages the RAM memory 180.
  • the computing device 140 may receive user input through an input/output device 150.
  • the input/output device 150 can be a keyboard, a mouse, a touchpad, a joystick, a touch-screen, a voice recognition system, etc.
  • the computing device 140 can be a personal computer, a laptop, a cellular phone, a personal data assistant, a media player, a media recorder, a server, a digital video recorder, an embedded control system in a media recorder, an embedded control system in a digital video recorder, an embedded control system in any other electrical device, etc.
  • a user enters an erasure command to erase specific data from the storage module 125.
  • the computing device 140 receives the erasure command entered by the user through the input/output device 150.
  • the input/output device 150 then provides the erasure command entered by the user to the CPU 110.
  • the erasure command is triggered or generated by the CPU 110.
  • the CPU 110 communicates with the controller 120 by transmitting and receiving various commands in relation to the data to be stored in the storage module 125.
  • One such message that is sent from the CPU 110 to the controller 120 is an erasure message.
  • the erasure message can include an erasure command, a data pattern, and an erasure area identifier.
  • the CPU 110 generates the data pattern.
  • the data pattern is randomly generated from a random number generator.
  • the CPU 110 has a random number generator.
  • the user inputs the data pattern.
  • the erasure area identifier specifies a collection of memory locations in the storage module 125 where the data to be erased resides.
  • the erasure area identifier is either inputted by the user or generated by the CPU 110.
  • a user may input the name of a file to be deleted.
  • the CPU 110 can search the corresponding address of the file in the nonvolatile recording medium.
  • the CPU 110 can then generate the erasure area identifier based on the size of the file and the starting address in the non-volatile recording medium.
  • an application running on the computer device 140 may require a file to be deleted, and the CPU 110 generates the erasure area identifier based on the address of the file in the non-volatile recording medium.
  • the user specifies the erasure area identifier through the input/output device 150.
  • the erasure area identifier may define the erasure area in various manners.
  • the erasure area identifier can be a list of memory locations.
  • the erasure area identifier can be a starting memory location and an ending memory location.
  • the erasure area identifier can be a starting memory location and a memory location count.
  • the erasure area identifier can be a flag which indicates that all the writeable locations on the storage module 125 are to be written with the data pattern.
  • the erasure message is transmitted a single time from the CPU 110 to the controller 120. After the controller 120 receives the message, the controller 120 writes the data pattern to the memory locations in the storage module 125 that correspond to the erasure area identifier.
  • the data pattern would normally have to be transferred to the non-volatile recording medium sixty billion times. If the data pattern is only transferred once, the transfer time becomes negligible. The total erasure time is then reduced to the amount of time it takes to write the data in the non-volatile recording medium. In this particular example, the total erasure time is reduced by fifteen minutes. Furthermore, in this example, fifteen minutes would be saved for each additional data pattern used. Thus, if a secure erase requires three data patterns to be used as part of the erasure, 0x55, OxAA, OxFF, the total time saved would be forty-five minutes.
  • the CPU 110 sends multiple erasure messages to the controller 120.
  • all erasure messages contain the same data pattern but different erasure area identifiers.
  • the number of erasure messages is less than the number of total memory locations to be overwritten.
  • the controller 120 receives a first erasure message with a first erasure area identifier and a first data pattern.
  • the controller 120 starts writing the first data pattern on the memory locations of the storage module 120 specified by the first erasure area identifier.
  • the controller 120 receives a second message with a second erasure area and the first data pattern.
  • the number of messages sent to the controller is less than the sum of the number of memory locations in the erasure area of the storage module 125 specified by the erasure area identifier. Therefore, the total transfer time is reduced because not every memory location requires a transfer.
  • multiple erasure messages can contain the same erasure area identifier but different data patterns. For instance, a first erasure message can overwrite a rage of memory locations with a first data pattern while a second erasure message can erase the same set of memory locations with a second data pattern to ensure a secure erasure with multiple data patterns.
  • the first erasure message can overwrite a first range of memory locations, with the first data pattern, and the second erasure message can overwrite a second range of memory locations with the second data pattern.
  • the controller 120 can write to multiple locations at a time. In one embodiment, the controller 120 starts writing the second erasure area before the first erasure command is completed. As a result of the controller 120 simultaneously writing to multiple memory locations of the storage module 125, the time needed to overwrite the data stored in the memory locations is further reduced.
  • the erasure message does not contain a data pattern.
  • the data pattern can be pre-stored in the storage module 125.
  • the controller 120 acquires the data pattern by retrieving the data pattern from the storage module 125.
  • the storage module stores a collection of data patterns to be retrieved by the controller 120.
  • the data pattern is hardwired on the controller 120.
  • the erasure message does not contain the erasure area identifier because the erasure area identifier is pre-stored in the storage module 125.
  • the controller 120 acquires the erasure area identifier by retrieving the erasure area from the storage module 125.
  • the erasure area identifier is hardwired on the controller 120.
  • Figure 1 B illustrates a computing system 101 wherein the non-volatile recording medium is a hard disk drive 130.
  • the computing system 101 includes the computing device 110 which communicates with the hard disk drive 130 by sending and receiving commands related to data storage.
  • the hard disk drive 130 includes a hard disk controller 120 that operates the write and read commands on the hard disk 170.
  • the erasure message is then transmitted to the hard disk controller 120 in the hard disk drive 130.
  • the hard disk controller 120 parses the erasure message and identifies the parameters contained in the erasure message such as the erasure command, the data pattern, and the erasure area identifier.
  • Figure 2A illustrates a tabular diagram 200 of the content of an erasure message sent to a non-volatile recording medium which has cylinder-head-sector ("CHS") addressing.
  • the erasure message illustrated by the tabular diagram 200 is used to write data to the erasure area of the hard disk 170.
  • the erasure message 200 is used to write data to the erasure area of a non-volatile recording medium with a logical memory structure similar to that of the hard disk 170.
  • the erasure message contains an erasure command, an erasure area identifier, and a data pattern.
  • the erasure message utilizes seven registers.
  • the command register 207 contains a "Fill" command. The name of the "Fill” command suggests that the erasure area is to be "filled” with the data pattern contained in the feature register 201. It will be apparent to one skilled in the art, that the name of the command may have many other variations such as Erase, SecureErase, Delete, SecureDelete, etc.
  • the erasure area identifier can be stored in registers 202 through 206.
  • registers 202 through 206 contain a starting address and a sector count.
  • the starting address can be defined by a combination of a cylinder number, a head number and a sector number.
  • the head number is stored in register 206 containing the drive information in bits 1-4, and containing the head information in bit 0.
  • the cylinder information is contained in a cylinder high register 205 for a cylinder high parameter; a cylinder low register 204 for a cylinder low parameter.
  • the cylinder number uses one or both registers depending on the length of the cylinder.
  • a sector number register 203 indicates the first sector for writing.
  • the sector count register 202 indicates the number of sectors to be written with the same data pattern. In another embodiment, if the sector count is zero then the entire non-volatile recording medium is written with the data pattern. In another embodiment, if the sector count is the total number of sectors in the non-volatile recording medium, then the entire non-volatile recording medium is written with the data pattern.
  • the data pattern is contained in the feature register 201.
  • Figure 2B illustrates a tabular diagram 201 of the content of an erasure message sent to a non-volatile recording medium that has logical block addressing ("LBA").
  • the erasure message illustrated by the tabular diagram 200 is used to write data to the erasure area of the hard disk 170 ( Figure 1 B).
  • the erasure message 201 is used to write data to the erasure area of a non-volatile recording medium with a logical memory structure similar to that of a hard disk 170 ( Figure 1 B).
  • the erasure area identifier can be stored in registers 202 to 206.
  • the starting address is defined by a sector number stored in one of the registers of the erasure message.
  • the starting address is stored in multiple registers of the erasure message.
  • bit 0 in the driver/head register 206, cylinder high register 205, cylinder low register 204, and sector number register 203 are registers used to store the LBA address at which the erasure area starts.
  • the LBA address may be large enough to use some or all of these registers.
  • Figure 3 illustrates a process 300 of erasing data from non-volatile recording medium.
  • the data pattern is set.
  • the data pattern can be set by user input, computer random generation, computer calculation, etc.
  • the erasure area identifier is set.
  • the set erasure area identifier, the set data pattern, and an erasure command are transmitted to the non-volatile recording medium.
  • the data pattern, the erasure command and the erasure area identifier are transmitted to a hard disk drive controller.
  • the data pattern, the erasure command and the erasure area identifier are transmitted to a flash memory controller.
  • all three components can be transmitted together in a single erasure message.
  • a subcombination of the three components can be transmitted in a single erasure message.
  • a construction instruction is performed at process block 318.
  • the construction instruction creates a write instruction that includes the memory address to be overwritten, the data pattern used, and a write command.
  • the write instruction is interpreted and the data pattern is written to the memory location indicated by the write instruction.
  • a decision block 325 logic is utilized to decide whether to continue writing or not. To accomplish this, the erasure area identifier is examined to determine whether there are remaining locations in the erasure area to write the data pattern. If there are remaining locations in the erasure area, another write instruction is constructed by process block 318 and executed by process block 320. After the write instruction is executed at process block 320, the erasure area identifier is examined again at decision block 325 to determine whether there are any more locations to write the data pattern. If so, another write instruction is constructed and execute on the next memory location, and so on.
  • a counter may be used and initialized with a value equivalent to the memory location count value. The counter can then be decreased every time a memory location is written with the data pattern. If the counter value is zero, then there are no more memory locations to be written over. In another embodiment, the counter can be initialized with a value of zero, and increased by a value of one every time a memory location is written with the data pattern. If the counter value is equivalent to the number of memory locations in the erasure area then there are no more memory locations to be written over. [0048] Once all memory locations have been written over, a status signal can be sent at process block 330 from the non-volatile recording medium indicating that the secure erase has been successful. In one embodiment, the CPU receives the status signal.
  • the method 300 starts over from the beginning.
  • a data pattern is set at process block 305
  • an erasure area identifier is set at process block 310, and then the data pattern, the erasure area identifier and the erasure command are transmitted at process block 315 to the non-volatile recording medium.
  • all the write instructions are constructed at process block 318 and the memory locations in the erasure area are written over at process block 320. If a third erasure is desired, the method 300 starts over again, and so on.
  • a user may decide to complete another erasure on the non-volatile recording medium.
  • the user can choose the number and the sequence of erasure messages. For example, a user may choose to send four subsequent erasure messages to the hard disk controller 120 as part of a secure erase procedure.
  • Common data patterns that are written consecutively to a hard disk or another non-volatile recording medium are the hexadecimal values 0x55, OxAA, OxFF, and 0x00. By consecutively writing different binary data patterns to the same memory location, any traces of the original file data values are obliterated.
  • a computing device may logically calculate that another erasure is necessary and start method 300 again. The computing device can have the hexadecimal values stored in memory and use them randomly when issuing a new erasure in the non-volatile recording medium.

Abstract

A method and system for the erasing of data from a non-volatile recording medium includes a non-volatile recording medium controller, a non-volatile recording medium, and a CPU. A data pattern used in an erasure command is sent to the non-volatile recording medium a single time. Consequently, the amount of data transferred to the non-volatile recording medium controller is reduced to a minimum. After receiving the erasure command, the non-volatile recording medium controller overwrites an erasure area with the data pattern.

Description

SYSTEM AND METHOD OF ERASING
NON-VOLATILE RECORDING MEDIA
BY PETER JENSEN
BACKGROUND OF THE DISCLOSURE
1. FIELD OF THE DISCLOSURE
[0001] The disclosure relates to secure and efficient erasure of data. In particular, the disclosure relates to erasure of data that is stored on a recording medium.
2. GENERAL BACKGROUND
[0002] Many electronic systems rely on non-volatile recording media to store data. The non-volatile recording medium can be a hard drive, solid state flash drive, PCMCIA card, PC card, magnetic tape, or optical storage medium. Other types of non-volatile recording media can also be used. A complete and secure erasure methodology is utilized in high security systems such as those used in the military to ensure that data once stored in non-volatile recording media can never be recovered. Further, lower level security systems can utilize complete erasure to protect personal or confidential data.
[0003] One current method for erasing data is deleting the pointer that points to the target data to be erased. Although the data is inaccessible through the deleted pointer, the data remains recorded in memory and is potentially accessible through other means. The erased data can potentially be revived if, for example, the nonvolatile recording medium is entirely parsed out memory location by memory location. Accordingly, solely erasing the pointer does not securely erase the data from the non-volatile recording medium.
[0004] Overwriting the erasure area in its entirety is helpful in providing a complete erasure. To overwrite the erasure area entirely, the memory locations in the erasure area are recorded with a predetermined data pattern. Thus, the data originally recorded in the erasure area is overwritten. A data pattern can include a variety of digits and/or alphanumeric characters. For instance, the data pattern can include a series of ones, zeroes, or a random combination of ones and zeroes.
[0005] Generally, if an erasure procedure uses only one data pattern, the erasure procedure may leave traces of the value previously stored in a particular memory location. Although these traces are not easily read, the traces can be read by using extraordinary measures.
SUMMARY
[0006] In one aspect, there is a method of securely erasing data from a nonvolatile recording medium. An erasure area identifier is transmitted from a processor in a computing device to a non-volatile recording medium controller. The erasure area identifier corresponds to a plurality of memory locations in an erasure area in the non-volatile recording medium. The non-volatile recording medium controller is operably connected with the non-volatile recording medium. A data pattern is also transmitted from the processor in the computing device to the non-volatile recording medium controller. The data pattern is transmitted in a single transfer. Finally, an erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller. The non-volatile recording medium controller constructs a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writes at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
[0007] In another aspect, the erasure area identifier is randomly generated. In another aspect, the erasure area identifier is inputted by the user. In another aspect, the erasure area identifier includes a start memory location in the erasure area and a memory location count. In another aspect, the erasure area identifier defines the erasure area according to a cylinder-head-sector addressing scheme. In yet another aspect, the erasure area identifier defines the erasure area according to a logical block addressing scheme.
[0008] In one aspect, the erasure area identifier or the data pattern are pre-stored in a storage device, the storage device coupled with the processor in the computing device. In another aspect, the data pattern is randomly generated or inputted by the user. In another aspect, the processor in the computing device a signal indicative of a status of the data in the erasure area of the non-volatile recording medium.
[0009] In another aspect, the non-volatile recording medium is a hard disk. In another aspect, the non-volatile recording medium is a solid-state PROM memory. In another aspect, the non-volatile recording medium is a solid-state flash memory. In another aspect, the non-volatile recording medium is a magnetic tape.
[0010] In one aspect there is a method of securely erasing data from a non-volatile recording medium. An erasure command is transmitted from a processor in a computing device to a non-volatile recording medium controller. The non-volatile recording medium controller is operably connected with the non-volatile recording medium. A plurality of instructions are constructed to overwrite a plurality of memory locations corresponding to an erasure area identified by a pre-stored erasure area identifier. Each of the instructions writes at least one of the memory locations in the erasure area identified by the pre-stored erasure area identifier with a pre-stored data pattern. The erasure area or the data pattern are pre-stored in the non-volatile recording medium.
[0011] In one aspect, there is a method of securely erasing data from a nonvolatile recording medium. A erasure area identifier is transmitted from a processor in a computing device to a non-volatile recording medium controller, wherein the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium, and wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium. A data pattern is transmitted from the processor in the computing device to the nonvolatile recording medium controller, wherein the data pattern is being transmitted a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area. Also, an erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller, the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern. [0012] In one aspect, there is a non-volatile recording medium erasure system. There is a processor in a computing device that transmits an erasure area identifier, a data pattern and an erasure command. The erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium. There is a non-volatile recording medium controller that receives transmissions from the processor in the computing device. The non-volatile recording medium controller is operably connected with the non-volatile recording medium, and constructs a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
[0013] In another aspect, the data pattern can being transmitted a single time or a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area. In another aspect, if the erasure area identifier is zero, all memory locations in the non-volatile recording medium are written with the data pattern.
[0014] In one aspect, there is a method of securely erasing data from a nonvolatile recording medium. A data pattern and an erasure area identifier are transmitted from a processor in a computing device to a non-volatile recording medium controller in a single transfer. The erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium. The non-volatile recording medium controller is operably connected with the non-volatile recording medium. An erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller. The non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
BRIEF DESCRIPTION OF THE DRAWINGS
[0015] By way of example, reference will now be made to the accompanying drawings. [0016] Figure 1 A illustrates a computing system for securely erasing data stored in a non-volatile recording medium.
[0017] Figure 1 B illustrates a computing system wherein the non-volatile recording medium is a hard disk drive.
[0018] Figure 2A illustrates a tabular diagram of the content of an erasure message sent to a hard drive with cylinder-head-sector addressing.
[0019] Figure 2B illustrates a tabular diagram of the content of an erasure message sent to a hard drive with logical block addressing.
[0020] Figure 3 illustrates a flow diagram of a non-volatile recording medium erasure.
DETAILED DESCRIPTION
[0021] The method and system described below provide faster erasure of data stored on non-volatile recording media than previously seen. Normally, erasure of data on a non-volatile recording medium involves the use of a data pattern. The data pattern is usually sent to the non-volatile recording medium every time a memory location is overwritten. As a consequence, a large number of transfers of the data pattern is usually required because a secure erase generally involves overwriting thousands, if not millions, of memory locations on the non-volatile recording medium. The transfer of each data pattern to the non-volatile recording medium requires a significant amount of time. The method and system described below reduces the amount of time needed to perform a secure erasure by reducing the number of transfers of the data pattern to the non-volatile recording medium.
[0022] It will be apparent to one skilled in the art that this erasure method can be applied to multiple types of non-volatile recording media including optical, magnetic and solid state recording media. These and other features will be discussed below.
[0023] Figure 1A illustrates a computing system 100 for securely erasing data stored in a non-volatile recording medium 130. In one embodiment, the non-volatile recording medium 130 includes a controller 120 and a storage module 125. The controller 120 can be a computer processor that stores data in the storage module 125 by directing the reading and writing of data on the storage module 125. The controller 120 communicates with external devices such as a computing device 140. The computing device 140 communicates with the controller 120 to manage the data that is written and erased from the storage module 125. The computing device 140 includes a CPU 110 and a random access memory ("RAM") 180. The CPU 110 manages the RAM memory 180. The computing device 140 may receive user input through an input/output device 150. The input/output device 150 can be a keyboard, a mouse, a touchpad, a joystick, a touch-screen, a voice recognition system, etc. The computing device 140 can be a personal computer, a laptop, a cellular phone, a personal data assistant, a media player, a media recorder, a server, a digital video recorder, an embedded control system in a media recorder, an embedded control system in a digital video recorder, an embedded control system in any other electrical device, etc.
[0024] In one embodiment, a user enters an erasure command to erase specific data from the storage module 125. The computing device 140 receives the erasure command entered by the user through the input/output device 150. The input/output device 150 then provides the erasure command entered by the user to the CPU 110. In another embodiment, the erasure command is triggered or generated by the CPU 110.
[0025] The CPU 110 communicates with the controller 120 by transmitting and receiving various commands in relation to the data to be stored in the storage module 125. One such message that is sent from the CPU 110 to the controller 120 is an erasure message.
[0026] The erasure message can include an erasure command, a data pattern, and an erasure area identifier. In one embodiment, the CPU 110 generates the data pattern. In another embodiment, the data pattern is randomly generated from a random number generator. In one embodiment, the CPU 110 has a random number generator. In yet another embodiment, the user inputs the data pattern.
[0027] The erasure area identifier specifies a collection of memory locations in the storage module 125 where the data to be erased resides. The erasure area identifier is either inputted by the user or generated by the CPU 110. In one embodiment, a user may input the name of a file to be deleted. Based on the name inputted by the user, the CPU 110 can search the corresponding address of the file in the nonvolatile recording medium. The CPU 110 can then generate the erasure area identifier based on the size of the file and the starting address in the non-volatile recording medium.
[0028] In yet another embodiment, an application running on the computer device 140 may require a file to be deleted, and the CPU 110 generates the erasure area identifier based on the address of the file in the non-volatile recording medium. In yet another embodiment, the user specifies the erasure area identifier through the input/output device 150.
[0029] The erasure area identifier may define the erasure area in various manners. In one embodiment, the erasure area identifier can be a list of memory locations. In another embodiment, the erasure area identifier can be a starting memory location and an ending memory location. In another embodiment, the erasure area identifier can be a starting memory location and a memory location count. In another embodiment, the erasure area identifier can be a flag which indicates that all the writeable locations on the storage module 125 are to be written with the data pattern.
[0030] In one embodiment, the erasure message is transmitted a single time from the CPU 110 to the controller 120. After the controller 120 receives the message, the controller 120 writes the data pattern to the memory locations in the storage module 125 that correspond to the erasure area identifier.
[0031] For example, in a situation where a secure erasure requires complete erasure of a non-volatile recording medium with a capacity of sixty (60) gigabytes, the data pattern would normally have to be transferred to the non-volatile recording medium sixty billion times. If the data pattern is only transferred once, the transfer time becomes negligible. The total erasure time is then reduced to the amount of time it takes to write the data in the non-volatile recording medium. In this particular example, the total erasure time is reduced by fifteen minutes. Furthermore, in this example, fifteen minutes would be saved for each additional data pattern used. Thus, if a secure erase requires three data patterns to be used as part of the erasure, 0x55, OxAA, OxFF, the total time saved would be forty-five minutes.
[0032] In yet another embodiment, the CPU 110 sends multiple erasure messages to the controller 120. In one embodiment, all erasure messages contain the same data pattern but different erasure area identifiers. Thus, the number of erasure messages is less than the number of total memory locations to be overwritten. For example, the controller 120 receives a first erasure message with a first erasure area identifier and a first data pattern. The controller 120 starts writing the first data pattern on the memory locations of the storage module 120 specified by the first erasure area identifier. Subsequently, the controller 120 receives a second message with a second erasure area and the first data pattern. The number of messages sent to the controller is less than the sum of the number of memory locations in the erasure area of the storage module 125 specified by the erasure area identifier. Therefore, the total transfer time is reduced because not every memory location requires a transfer.
[0033] In an alternative embodiment, multiple erasure messages can contain the same erasure area identifier but different data patterns. For instance, a first erasure message can overwrite a rage of memory locations with a first data pattern while a second erasure message can erase the same set of memory locations with a second data pattern to ensure a secure erasure with multiple data patterns. In another embodiment, the first erasure message can overwrite a first range of memory locations, with the first data pattern, and the second erasure message can overwrite a second range of memory locations with the second data pattern.
[0034] When multiple erasure messages are sent to the controller 120, the controller 120 can write to multiple locations at a time. In one embodiment, the controller 120 starts writing the second erasure area before the first erasure command is completed. As a result of the controller 120 simultaneously writing to multiple memory locations of the storage module 125, the time needed to overwrite the data stored in the memory locations is further reduced.
[0035] In one embodiment, the erasure message does not contain a data pattern. The data pattern can be pre-stored in the storage module 125. Thus, after receiving the erasure message, the controller 120 acquires the data pattern by retrieving the data pattern from the storage module 125. In another embodiment, the storage module stores a collection of data patterns to be retrieved by the controller 120. In another embodiment, the data pattern is hardwired on the controller 120.
[0036] In one embodiment, the erasure message does not contain the erasure area identifier because the erasure area identifier is pre-stored in the storage module 125. The controller 120 acquires the erasure area identifier by retrieving the erasure area from the storage module 125. In another embodiment, the erasure area identifier is hardwired on the controller 120.
[0037] Figure 1 B illustrates a computing system 101 wherein the non-volatile recording medium is a hard disk drive 130. The computing system 101 includes the computing device 110 which communicates with the hard disk drive 130 by sending and receiving commands related to data storage. The hard disk drive 130 includes a hard disk controller 120 that operates the write and read commands on the hard disk 170.
[0038] In one embodiment, after the erasure message is constructed in the CPU 110, the erasure message is then transmitted to the hard disk controller 120 in the hard disk drive 130. The hard disk controller 120 parses the erasure message and identifies the parameters contained in the erasure message such as the erasure command, the data pattern, and the erasure area identifier.
[0039] Figure 2A illustrates a tabular diagram 200 of the content of an erasure message sent to a non-volatile recording medium which has cylinder-head-sector ("CHS") addressing. In one embodiment, the erasure message illustrated by the tabular diagram 200 is used to write data to the erasure area of the hard disk 170. In another embodiment, the erasure message 200 is used to write data to the erasure area of a non-volatile recording medium with a logical memory structure similar to that of the hard disk 170.
[0040] The erasure message contains an erasure command, an erasure area identifier, and a data pattern. In one embodiment, the erasure message utilizes seven registers. In another embodiment, the command register 207 contains a "Fill" command. The name of the "Fill" command suggests that the erasure area is to be "filled" with the data pattern contained in the feature register 201. It will be apparent to one skilled in the art, that the name of the command may have many other variations such as Erase, SecureErase, Delete, SecureDelete, etc.
[0041] As illustrated in Figure 2A, the erasure area identifier can be stored in registers 202 through 206. In one embodiment, registers 202 through 206 contain a starting address and a sector count. The starting address can be defined by a combination of a cylinder number, a head number and a sector number. The head number is stored in register 206 containing the drive information in bits 1-4, and containing the head information in bit 0. The cylinder information is contained in a cylinder high register 205 for a cylinder high parameter; a cylinder low register 204 for a cylinder low parameter. The cylinder number uses one or both registers depending on the length of the cylinder. A sector number register 203 indicates the first sector for writing. In one embodiment, the sector count register 202 indicates the number of sectors to be written with the same data pattern. In another embodiment, if the sector count is zero then the entire non-volatile recording medium is written with the data pattern. In another embodiment, if the sector count is the total number of sectors in the non-volatile recording medium, then the entire non-volatile recording medium is written with the data pattern. The data pattern is contained in the feature register 201.
[0042] Figure 2B illustrates a tabular diagram 201 of the content of an erasure message sent to a non-volatile recording medium that has logical block addressing ("LBA"). In one embodiment, the erasure message illustrated by the tabular diagram 200 is used to write data to the erasure area of the hard disk 170 (Figure 1 B). In another embodiment, the erasure message 201 is used to write data to the erasure area of a non-volatile recording medium with a logical memory structure similar to that of a hard disk 170 (Figure 1 B).
[0043] The erasure area identifier can be stored in registers 202 to 206. In one embodiment, the starting address is defined by a sector number stored in one of the registers of the erasure message. In another embodiment, the starting address is stored in multiple registers of the erasure message. In particular, bit 0 in the driver/head register 206, cylinder high register 205, cylinder low register 204, and sector number register 203, are registers used to store the LBA address at which the erasure area starts. The LBA address may be large enough to use some or all of these registers.
[0044] Figure 3 illustrates a process 300 of erasing data from non-volatile recording medium. In a process block 305, the data pattern is set. The data pattern can be set by user input, computer random generation, computer calculation, etc. Further, at a process block 310, the erasure area identifier is set. Next, at a process block 315, the set erasure area identifier, the set data pattern, and an erasure command are transmitted to the non-volatile recording medium. In one embodiment, the data pattern, the erasure command and the erasure area identifier are transmitted to a hard disk drive controller. In another embodiment, the data pattern, the erasure command and the erasure area identifier are transmitted to a flash memory controller. In another embodiment, all three components can be transmitted together in a single erasure message. In yet another embodiment, a subcombination of the three components can be transmitted in a single erasure message.
[0045] After the data pattern, the erasure command and the erasure area identifier have been received, a construction instruction is performed at process block 318. The construction instruction creates a write instruction that includes the memory address to be overwritten, the data pattern used, and a write command. Subsequently, at a process block 320, the write instruction is interpreted and the data pattern is written to the memory location indicated by the write instruction.
[0046] After the first write, at a decision block 325, logic is utilized to decide whether to continue writing or not. To accomplish this, the erasure area identifier is examined to determine whether there are remaining locations in the erasure area to write the data pattern. If there are remaining locations in the erasure area, another write instruction is constructed by process block 318 and executed by process block 320. After the write instruction is executed at process block 320, the erasure area identifier is examined again at decision block 325 to determine whether there are any more locations to write the data pattern. If so, another write instruction is constructed and execute on the next memory location, and so on.
[0047] Determining that all of the memory locations in the erasure area have been exhausted can be achieved in different ways. In one embodiment, a counter may be used and initialized with a value equivalent to the memory location count value. The counter can then be decreased every time a memory location is written with the data pattern. If the counter value is zero, then there are no more memory locations to be written over. In another embodiment, the counter can be initialized with a value of zero, and increased by a value of one every time a memory location is written with the data pattern. If the counter value is equivalent to the number of memory locations in the erasure area then there are no more memory locations to be written over. [0048] Once all memory locations have been written over, a status signal can be sent at process block 330 from the non-volatile recording medium indicating that the secure erase has been successful. In one embodiment, the CPU receives the status signal.
[0049] If another erasure is desired, the method 300 starts over from the beginning. A data pattern is set at process block 305, an erasure area identifier is set at process block 310, and then the data pattern, the erasure area identifier and the erasure command are transmitted at process block 315 to the non-volatile recording medium. Subsequently, all the write instructions are constructed at process block 318 and the memory locations in the erasure area are written over at process block 320. If a third erasure is desired, the method 300 starts over again, and so on.
[0050] In one embodiment, a user may decide to complete another erasure on the non-volatile recording medium. The user can choose the number and the sequence of erasure messages. For example, a user may choose to send four subsequent erasure messages to the hard disk controller 120 as part of a secure erase procedure. Common data patterns that are written consecutively to a hard disk or another non-volatile recording medium are the hexadecimal values 0x55, OxAA, OxFF, and 0x00. By consecutively writing different binary data patterns to the same memory location, any traces of the original file data values are obliterated. In another embodiment, a computing device may logically calculate that another erasure is necessary and start method 300 again. The computing device can have the hexadecimal values stored in memory and use them randomly when issuing a new erasure in the non-volatile recording medium.
[0051] While the above description contains many specifics, these should not be construed as limitations on the scope of the disclosure, but rather as an exemplification of preferred embodiments thereof. The disclosure includes any combination or subcombination of the elements from the different species and/or embodiments disclosed herein. One skilled in the art will recognize that these features, and thus the scope of this disclosure, should be interpreted in light of the following claims and any equivalents thereto.

Claims

I CLAIM:
Claim 1. A method of securely erasing data from a non-volatile recording medium, comprising: transmitting an erasure area identifier from a processor in a computing device to a non-volatile recording medium controller, wherein the erasure area identifier corresponds to a plurality of memory locations in an erasure area in the non-volatile recording medium, and wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium; transmitting a data pattern from the processor in the computing device to the non-volatile recording medium controller in a single transfer; and transmitting an erasure command from the processor in the computing device to the non-volatile recording medium controller, the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
Claim 2. The method of claim 1 , wherein the erasure area identifier is randomly generated.
Claim 3. The method of claim 1 , wherein the erasure area identifier is inputted by the user.
Claim 4. The method of claim 1 , wherein the erasure area identifier includes a start memory location in the erasure area and a memory location count.
Claim 5. The method of claim 1 , wherein the erasure area identifier defines the erasure area according to a cylinder-head-sector addressing scheme.
Claim 6. The method of claim 1 , wherein the erasure area identifier defines the erasure area according to a logical block addressing scheme.
Claim 7. The method of claim 1 , wherein the erasure area identifier is pre-stored in a storage device, the storage device coupled with the processor in the computing device. Claim 8. The method of claim 1 , wherein the data pattern is randomly generated.
Claim 9. The method of claim 1 , wherein the data pattern is inputted by the user.
Claim 10. The method of claim 1 , wherein the data pattern is pre-stored in a storage device, the storage device coupled with the processor in the computing device.
Claim 11. The method of claim 1, wherein the non-volatile recording medium is a hard disk.
Claim 12. The method of claim 1 , wherein the non-volatile recording medium is a solid state PROM memory.
Claim 13. The method of claim 1 , wherein the non-volatile recording medium is a solid state flash memory.
Claim 14. The method of claim 1 , wherein the non-volatile recording medium is a magnetic tape.
Claim 15. The method of claim 1 , wherein the non-volatile recording medium and the non-volatile recording medium controller are enclosed by a housing.
Claim 16. The method of claim 1 , further comprising the step of transmitting to the processor in the computing device a signal indicative of a status of the data in the erasure area of the non-volatile recording medium.
Claim 17. A method of securely erasing data from a non-volatile recording medium, comprising: transmitting an erasure command from a processor in a computing device to a non-volatile recording medium controller, wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium; and, constructing a plurality of instructions to overwrite a plurality of memory locations corresponding to an erasure area identified by a pre-stored erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the pre-stored erasure area identifier with a pre-stored data pattern.
Claim 18. The method of claim 17, wherein the erasure area is pre-stored in the non-volatile recording medium.
Claim 19. The method of claim 17, wherein the data pattern is pre-stored in the non-volatile recording medium.
Claim 20. A method of securely erasing data from a non-volatile recording medium, comprising: transmitting an erasure area identifier from a processor in a computing device to a non-volatile recording medium controller, wherein the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium, and wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium; transmitting a data pattern from the processor in the computing device to the non-volatile recording medium controller, wherein the data pattern is being transmitted a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area; and transmitting an erasure command from the processor in the computing device to the non-volatile recording medium controller, the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
Claim 21. A non-volatile recording medium erasure system, comprising: a processor in a computing device, wherein the processor in the computing device transmits an erasure area identifier, a data pattern and an erasure command, wherein the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium; and a non-volatile recording medium controller, wherein the non-volatile recording medium controller receives transmissions from the processor in the computing device; wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium; wherein the non-volatile recording medium controller constructs a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
Claim 22. The system of claim 21 , wherein the data pattern is being transmitted a single time.
Claim 23. The system of claim 21 , wherein the data pattern is being transmitted a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area.
Claim 24. The system of claim 21 , wherein if the erasure area identifier is zero, all memory locations in the non-volatile recording medium are written with the data pattern.
Claim 25. A method of securely erasing data from a non-volatile recording medium, comprising: transmitting a data pattern and an erasure area identifier from a processor in a computing device to a non-volatile recording medium controller in a single transfer, wherein the erasure area identifier corresponds to a plurality of memory locations in the erasure area in the non-volatile recording medium, and wherein the non-volatile recording medium controller is operably connected with the non-volatile recording medium; and transmitting an erasure command from the processor in the computing device to the non-volatile recording medium controller, the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
EP04813277A 2004-12-06 2004-12-06 System and method of erasing non-volatile recording media Withdrawn EP1839154A4 (en)

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Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100876084B1 (en) 2007-02-13 2008-12-26 삼성전자주식회사 Computing system capable of delivering deletion information to flash storage
US8935302B2 (en) 2006-12-06 2015-01-13 Intelligent Intellectual Property Holdings 2 Llc Apparatus, system, and method for data block usage information synchronization for a non-volatile storage volume
WO2008070814A2 (en) * 2006-12-06 2008-06-12 Fusion Multisystems, Inc. (Dba Fusion-Io) Apparatus, system, and method for a scalable, composite, reconfigurable backplane
US8489817B2 (en) 2007-12-06 2013-07-16 Fusion-Io, Inc. Apparatus, system, and method for caching data
US9495241B2 (en) 2006-12-06 2016-11-15 Longitude Enterprise Flash S.A.R.L. Systems and methods for adaptive data storage
US9519540B2 (en) 2007-12-06 2016-12-13 Sandisk Technologies Llc Apparatus, system, and method for destaging cached data
US7836226B2 (en) 2007-12-06 2010-11-16 Fusion-Io, Inc. Apparatus, system, and method for coordinating storage requests in a multi-processor/multi-thread environment
US8195874B2 (en) 2009-04-10 2012-06-05 Hitachi, Ltd. Storage apparatus and method for shredding storage medium
CN102696010B (en) 2009-09-08 2016-03-23 才智知识产权控股公司(2) For by the device of data cache on solid storage device, system and method
US9122579B2 (en) 2010-01-06 2015-09-01 Intelligent Intellectual Property Holdings 2 Llc Apparatus, system, and method for a storage layer
US9223514B2 (en) 2009-09-09 2015-12-29 SanDisk Technologies, Inc. Erase suspend/resume for memory
US8289801B2 (en) 2009-09-09 2012-10-16 Fusion-Io, Inc. Apparatus, system, and method for power reduction management in a storage device
US8601222B2 (en) 2010-05-13 2013-12-03 Fusion-Io, Inc. Apparatus, system, and method for conditional and atomic storage operations
WO2011031903A2 (en) 2009-09-09 2011-03-17 Fusion-Io, Inc. Apparatus, system, and method for allocating storage
US8725934B2 (en) 2011-12-22 2014-05-13 Fusion-Io, Inc. Methods and appratuses for atomic storage operations
US8984216B2 (en) 2010-09-09 2015-03-17 Fusion-Io, Llc Apparatus, system, and method for managing lifetime of a storage device
US9047178B2 (en) 2010-12-13 2015-06-02 SanDisk Technologies, Inc. Auto-commit memory synchronization
US10817502B2 (en) 2010-12-13 2020-10-27 Sandisk Technologies Llc Persistent memory management
US9218278B2 (en) 2010-12-13 2015-12-22 SanDisk Technologies, Inc. Auto-commit memory
EP2652623B1 (en) 2010-12-13 2018-08-01 SanDisk Technologies LLC Apparatus, system, and method for auto-commit memory
US10817421B2 (en) 2010-12-13 2020-10-27 Sandisk Technologies Llc Persistent data structures
US9208071B2 (en) 2010-12-13 2015-12-08 SanDisk Technologies, Inc. Apparatus, system, and method for accessing memory
US20120239860A1 (en) 2010-12-17 2012-09-20 Fusion-Io, Inc. Apparatus, system, and method for persistent data management on a non-volatile storage media
US9213594B2 (en) 2011-01-19 2015-12-15 Intelligent Intellectual Property Holdings 2 Llc Apparatus, system, and method for managing out-of-service conditions
US9201677B2 (en) 2011-05-23 2015-12-01 Intelligent Intellectual Property Holdings 2 Llc Managing data input/output operations
US9003104B2 (en) 2011-02-15 2015-04-07 Intelligent Intellectual Property Holdings 2 Llc Systems and methods for a file-level cache
US8874823B2 (en) 2011-02-15 2014-10-28 Intellectual Property Holdings 2 Llc Systems and methods for managing data input/output operations
US9141527B2 (en) 2011-02-25 2015-09-22 Intelligent Intellectual Property Holdings 2 Llc Managing cache pools
US9563555B2 (en) 2011-03-18 2017-02-07 Sandisk Technologies Llc Systems and methods for storage allocation
US8966191B2 (en) 2011-03-18 2015-02-24 Fusion-Io, Inc. Logical interface for contextual storage
US9274937B2 (en) 2011-12-22 2016-03-01 Longitude Enterprise Flash S.A.R.L. Systems, methods, and interfaces for vector input/output operations
US9251086B2 (en) 2012-01-24 2016-02-02 SanDisk Technologies, Inc. Apparatus, system, and method for managing a cache
US9116812B2 (en) 2012-01-27 2015-08-25 Intelligent Intellectual Property Holdings 2 Llc Systems and methods for a de-duplication cache
US10359972B2 (en) 2012-08-31 2019-07-23 Sandisk Technologies Llc Systems, methods, and interfaces for adaptive persistence
US10339056B2 (en) 2012-07-03 2019-07-02 Sandisk Technologies Llc Systems, methods and apparatus for cache transfers
US9612966B2 (en) 2012-07-03 2017-04-04 Sandisk Technologies Llc Systems, methods and apparatus for a virtual machine cache
US8799612B2 (en) 2012-07-17 2014-08-05 International Business Machines Corporation Monitoring of extent of writing of unobscured data to improve erase performance on a magnetic medium
US8995071B2 (en) 2012-07-17 2015-03-31 International Business Machines Corporation Monitoring of residual encrypted data to improve erase performance on a magnetic medium
US10318495B2 (en) 2012-09-24 2019-06-11 Sandisk Technologies Llc Snapshots for a non-volatile device
US10509776B2 (en) 2012-09-24 2019-12-17 Sandisk Technologies Llc Time sequence data management
US9842053B2 (en) 2013-03-15 2017-12-12 Sandisk Technologies Llc Systems and methods for persistent cache logging
US10102144B2 (en) 2013-04-16 2018-10-16 Sandisk Technologies Llc Systems, methods and interfaces for data virtualization
US10558561B2 (en) 2013-04-16 2020-02-11 Sandisk Technologies Llc Systems and methods for storage metadata management
US9842128B2 (en) 2013-08-01 2017-12-12 Sandisk Technologies Llc Systems and methods for atomic storage operations
US9304709B2 (en) * 2013-09-06 2016-04-05 Western Digital Technologies, Inc. High performance system providing selective merging of dataframe segments in hardware
US10019320B2 (en) 2013-10-18 2018-07-10 Sandisk Technologies Llc Systems and methods for distributed atomic storage operations
US10073630B2 (en) 2013-11-08 2018-09-11 Sandisk Technologies Llc Systems and methods for log coordination
US9946607B2 (en) 2015-03-04 2018-04-17 Sandisk Technologies Llc Systems and methods for storage error management
GB2620445A (en) * 2022-07-08 2024-01-10 Kirintec Ltd Data erasure system

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5530828A (en) * 1992-06-22 1996-06-25 Hitachi, Ltd. Semiconductor storage device including a controller for continuously writing data to and erasing data from a plurality of flash memories
US6338114B1 (en) * 1999-08-18 2002-01-08 International Business Machines Corporation Method, system, and program for using a table to determine an erase operation to perform
US20020181134A1 (en) * 2001-06-04 2002-12-05 Xerox Corporation Secure data file erasure
US6658438B1 (en) * 2000-08-14 2003-12-02 Matrix Semiconductor, Inc. Method for deleting stored digital data from write-once memory device
US6748482B1 (en) * 2000-09-27 2004-06-08 Intel Corporation Multiple non-contiguous block erase in flash memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69034227T2 (en) * 1989-04-13 2007-05-03 Sandisk Corp., Sunnyvale EEprom system with block deletion
US6212600B1 (en) * 1998-01-21 2001-04-03 Infraworks Corporation Method and apparatus for sanitization of fixed storage devices
US6507911B1 (en) * 1998-07-22 2003-01-14 Entrust Technologies Limited System and method for securely deleting plaintext data
US6034882A (en) * 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US20010025343A1 (en) * 2000-03-27 2001-09-27 Roy Chrisop Random bit mask generation for obscuring data on nonvolatile memory device
JP2003140835A (en) * 2001-11-02 2003-05-16 Nec Gumma Ltd Data storage device
JP3673213B2 (en) * 2001-11-30 2005-07-20 株式会社東芝 Disk storage device and data erasing method applied to the same
US6983351B2 (en) * 2002-04-11 2006-01-03 International Business Machines Corporation System and method to guarantee overwrite of expired data in a virtual tape server
US7461176B2 (en) * 2003-05-02 2008-12-02 Hitachi, Ltd. Method for initialization of storage systems
JP2005018415A (en) * 2003-06-26 2005-01-20 Toshiba Corp Information processor and data erasing method used in the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5530828A (en) * 1992-06-22 1996-06-25 Hitachi, Ltd. Semiconductor storage device including a controller for continuously writing data to and erasing data from a plurality of flash memories
US6338114B1 (en) * 1999-08-18 2002-01-08 International Business Machines Corporation Method, system, and program for using a table to determine an erase operation to perform
US6658438B1 (en) * 2000-08-14 2003-12-02 Matrix Semiconductor, Inc. Method for deleting stored digital data from write-once memory device
US6748482B1 (en) * 2000-09-27 2004-06-08 Intel Corporation Multiple non-contiguous block erase in flash memory
US20020181134A1 (en) * 2001-06-04 2002-12-05 Xerox Corporation Secure data file erasure

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
GUTMANN P: "Secure Deletion of Data from Magnetic and Solid-State Memory", PROCEEDINGS OF THE USENIX SECURITY SYMPOSIUM, XX, XX, 22 July 1996 (1996-07-22), pages 14COMPLETE, XP002190890 *
See also references of WO2006062511A1 *

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EP1839154A1 (en) 2007-10-03
CA2591333A1 (en) 2006-06-15

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