EP1926140A3 - Semiconductor devices having air gaps - Google Patents

Semiconductor devices having air gaps Download PDF

Info

Publication number
EP1926140A3
EP1926140A3 EP08101681A EP08101681A EP1926140A3 EP 1926140 A3 EP1926140 A3 EP 1926140A3 EP 08101681 A EP08101681 A EP 08101681A EP 08101681 A EP08101681 A EP 08101681A EP 1926140 A3 EP1926140 A3 EP 1926140A3
Authority
EP
European Patent Office
Prior art keywords
insulating material
region
air gaps
workpiece
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP08101681A
Other languages
German (de)
French (fr)
Other versions
EP1926140A2 (en
Inventor
Alois Gutmann
Markus Naujok
Muhammed Shafi Kurikka Valappil Pallachalil
Hermann Wendt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1926140A2 publication Critical patent/EP1926140A2/en
Publication of EP1926140A3 publication Critical patent/EP1926140A3/en
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Devices are obtained by using methods of forming air gaps between interconnects of integrated circuits and structures thereof. A first insulating material is deposited over a workpiece, and a second insulating material having a sacrificial portion is deposited over the first insulating material. Conductive lines are formed in the first and second insulating layers. The second insulating material is treated to remove the sacrificial portion, and at least a portion of the first insulating material is removed, forming air gaps between the conductive lines. The second insulating material is impermeable as deposited and permeable after treating it to remove the sacrificial portion. A first region of the workpiece may be masked during the treatment, so that the second insulating material becomes permeable in a second region of the workpiece yet remains impermeable in the first region, thus allowing the formation of the air gaps in the second region, but not the first region.
EP08101681A 2005-06-13 2006-06-09 Semiconductor devices having air gaps Ceased EP1926140A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/151,134 US7629225B2 (en) 2005-06-13 2005-06-13 Methods of manufacturing semiconductor devices and structures thereof
EP06115226A EP1739737A1 (en) 2005-06-13 2006-06-09 Methods of manufacturing air dielectric structures

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
EP06115226A Division EP1739737A1 (en) 2005-06-13 2006-06-09 Methods of manufacturing air dielectric structures

Publications (2)

Publication Number Publication Date
EP1926140A2 EP1926140A2 (en) 2008-05-28
EP1926140A3 true EP1926140A3 (en) 2008-07-09

Family

ID=37198931

Family Applications (3)

Application Number Title Priority Date Filing Date
EP08101681A Ceased EP1926140A3 (en) 2005-06-13 2006-06-09 Semiconductor devices having air gaps
EP06115226A Ceased EP1739737A1 (en) 2005-06-13 2006-06-09 Methods of manufacturing air dielectric structures
EP08167853A Ceased EP2015355A3 (en) 2005-06-13 2006-06-09 Methods of manufacturing semiconductor structures with air dielectric

Family Applications After (2)

Application Number Title Priority Date Filing Date
EP06115226A Ceased EP1739737A1 (en) 2005-06-13 2006-06-09 Methods of manufacturing air dielectric structures
EP08167853A Ceased EP2015355A3 (en) 2005-06-13 2006-06-09 Methods of manufacturing semiconductor structures with air dielectric

Country Status (3)

Country Link
US (4) US7629225B2 (en)
EP (3) EP1926140A3 (en)
JP (2) JP2006352124A (en)

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US8329573B2 (en) 2008-05-06 2012-12-11 Gautham Viswanadam Wafer level integration module having controlled resistivity interconnects
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US8227336B2 (en) * 2009-01-20 2012-07-24 International Business Machines Corporation Structure with self aligned resist layer on an interconnect surface and method of making same
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KR101298114B1 (en) * 2009-06-02 2013-08-20 한국과학기술원 Package and packaging method of micro electro mechanical system and micro electro mechanical system device
CN102891100B (en) * 2011-07-22 2015-04-29 中芯国际集成电路制造(上海)有限公司 Shallow-trench isolation structure and formation method thereof
KR20130025207A (en) 2011-09-01 2013-03-11 삼성전자주식회사 Semiconductor device and forming the same
CN103839821B (en) * 2012-11-27 2016-08-31 中芯国际集成电路制造(上海)有限公司 Transistor and manufacture method thereof
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US9142451B2 (en) * 2013-09-16 2015-09-22 Globalfoundries Inc. Reduced capacitance interlayer structures and fabrication methods
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KR20150090472A (en) 2014-01-29 2015-08-06 삼성전자주식회사 Variable resistance memory devices and methods of manufacturing the same
EP3216819A4 (en) 2014-10-10 2018-09-05 Toray Industries, Inc. Polyimide solution, heat-resistant non-woven fabric, and method for manufacturing same
CN107004601B (en) * 2014-12-22 2021-05-14 英特尔公司 Via self-alignment and short circuit improvement benefiting from air gap integrated capacitance
US10177031B2 (en) 2014-12-23 2019-01-08 International Business Machines Corporation Subtractive etch interconnects
US9824982B1 (en) * 2016-08-09 2017-11-21 International Business Machines Corporation Structure and fabrication method for enhanced mechanical strength crack stop
US10727114B2 (en) 2017-01-13 2020-07-28 International Business Machines Corporation Interconnect structure including airgaps and substractively etched metal lines
JP6685945B2 (en) * 2017-01-31 2020-04-22 キオクシア株式会社 Semiconductor device and manufacturing method thereof
CN110277389B (en) * 2018-03-14 2021-10-08 联华电子股份有限公司 Semiconductor structure with conductive line and manufacturing method of stop layer
CN113013141A (en) * 2019-12-18 2021-06-22 台湾积体电路制造股份有限公司 Semiconductor structure
JP7390194B2 (en) 2020-01-17 2023-12-01 東京エレクトロン株式会社 Air gap formation method
CN111474756B (en) * 2020-05-27 2022-11-08 成都中电熊猫显示科技有限公司 Display panel and method for manufacturing the same
US11462406B2 (en) * 2020-07-29 2022-10-04 Nanya Technology Corporation Semiconductor device structure with fine boron nitride spacer patterns and method for forming the same

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Also Published As

Publication number Publication date
EP2015355A2 (en) 2009-01-14
EP1926140A2 (en) 2008-05-28
JP2006352124A (en) 2006-12-28
JP5308414B2 (en) 2013-10-09
US20100032841A1 (en) 2010-02-11
US20110278730A1 (en) 2011-11-17
US8013364B2 (en) 2011-09-06
EP1739737A1 (en) 2007-01-03
US8148235B2 (en) 2012-04-03
US20060281295A1 (en) 2006-12-14
US9401322B2 (en) 2016-07-26
EP2015355A3 (en) 2010-01-06
JP2011009769A (en) 2011-01-13
US20100144112A1 (en) 2010-06-10
US7629225B2 (en) 2009-12-08

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